1 /* 2 * Copyright (c) 2017, Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 //! 23 //! \file mhw_sfc_hwcmd_g9_X.h 24 //! \brief Auto-generated constructors for MHW and states. 25 //! \details This file may not be included outside of g9_X as other components 26 //! should use MHW interface to interact with MHW commands and states. 27 //! 28 #ifndef __MHW_SFC_HWCMD_G9_X_H__ 29 #define __MHW_SFC_HWCMD_G9_X_H__ 30 31 #pragma once 32 #pragma pack(1) 33 34 #include <cstdint> 35 #include <cstddef> 36 37 class mhw_sfc_g9_X 38 { 39 public: 40 // Internal Macros 41 #define __CODEGEN_MAX(_a, _b) (((_a) > (_b)) ? (_a) : (_b)) 42 #define __CODEGEN_BITFIELD(l, h) (h) - (l) + 1 43 #define __CODEGEN_OP_LENGTH_BIAS 2 44 #define __CODEGEN_OP_LENGTH(x) (uint32_t)((__CODEGEN_MAX(x, __CODEGEN_OP_LENGTH_BIAS)) - __CODEGEN_OP_LENGTH_BIAS) 45 GetOpLength(uint32_t uiLength)46 static uint32_t GetOpLength(uint32_t uiLength) { return __CODEGEN_OP_LENGTH(uiLength); } 47 48 //! 49 //! \brief SFC_AVS_STATE 50 //! \details 51 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 52 //! each frame once the lock request is granted. 53 //! 54 struct SFC_AVS_STATE_CMD 55 { 56 union 57 { 58 //!< DWORD 0 59 struct 60 { 61 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 62 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 63 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 64 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 65 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 66 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 67 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 68 }; 69 uint32_t Value; 70 } DW0; 71 union 72 { 73 //!< DWORD 1 74 struct 75 { 76 uint32_t TransitionAreaWith8Pixels : __CODEGEN_BITFIELD( 0, 2) ; //!< Transition Area with 8 Pixels 77 uint32_t Reserved35 : __CODEGEN_BITFIELD( 3, 3) ; //!< Reserved 78 uint32_t TransitionAreaWith4Pixels : __CODEGEN_BITFIELD( 4, 6) ; //!< Transition Area with 4 Pixels 79 uint32_t Reserved39 : __CODEGEN_BITFIELD( 7, 23) ; //!< Reserved 80 uint32_t SharpnessLevel : __CODEGEN_BITFIELD(24, 31) ; //!< SHARPNESS_LEVEL 81 }; 82 uint32_t Value; 83 } DW1; 84 union 85 { 86 //!< DWORD 2 87 struct 88 { 89 uint32_t MaxDerivativePoint8 : __CODEGEN_BITFIELD( 0, 7) ; //!< MAX Derivative Point 8 90 uint32_t Reserved72 : __CODEGEN_BITFIELD( 8, 15) ; //!< Reserved 91 uint32_t MaxDerivative4Pixels : __CODEGEN_BITFIELD(16, 23) ; //!< Max Derivative 4 Pixels 92 uint32_t Reserved88 : __CODEGEN_BITFIELD(24, 31) ; //!< Reserved 93 }; 94 uint32_t Value; 95 } DW2; 96 97 //! \name Local enumerations 98 99 enum SUBOPCODEB 100 { 101 SUBOPCODEB_SFCAVSSTATE = 2, //!< No additional details 102 }; 103 104 enum SUBOPCODEA 105 { 106 SUBOPCODEA_COMMON = 0, //!< No additional details 107 }; 108 109 enum MEDIA_COMMAND_OPCODE 110 { 111 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 112 }; 113 114 enum PIPELINE 115 { 116 PIPELINE_MEDIA = 2, //!< No additional details 117 }; 118 119 enum COMMAND_TYPE 120 { 121 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 122 }; 123 124 //! \brief SHARPNESS_LEVEL 125 //! \details 126 //! When adaptive scaling is off, determines the balance between sharp and 127 //! smooth scalers. 128 enum SHARPNESS_LEVEL 129 { 130 SHARPNESS_LEVEL_UNNAMED0 = 0, //!< Contribute 1 from the smooth scalar 131 SHARPNESS_LEVEL_UNNAMED255 = 255, //!< Contribute 1 from the sharp scalar 132 }; 133 134 //! \name Initializations 135 136 //! \brief Explicit member initialization function 137 SFC_AVS_STATE_CMD(); 138 139 static const size_t dwSize = 3; 140 static const size_t byteSize = 12; 141 }; 142 143 //! 144 //! \brief SFC_IEF_STATE 145 //! \details 146 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 147 //! each frame once the lock request is granted. 148 //! 149 struct SFC_IEF_STATE_CMD 150 { 151 union 152 { 153 //!< DWORD 0 154 struct 155 { 156 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 157 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 158 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 159 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 160 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 161 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 162 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 163 }; 164 uint32_t Value; 165 } DW0; 166 union 167 { 168 //!< DWORD 1 169 struct 170 { 171 uint32_t GainFactor : __CODEGEN_BITFIELD( 0, 5) ; //!< GAIN_FACTOR 172 uint32_t WeakEdgeThreshold : __CODEGEN_BITFIELD( 6, 11) ; //!< WEAK_EDGE_THRESHOLD 173 uint32_t StrongEdgeThreshold : __CODEGEN_BITFIELD(12, 17) ; //!< STRONG_EDGE_THRESHOLD 174 uint32_t R3XCoefficient : __CODEGEN_BITFIELD(18, 22) ; //!< R3X_COEFFICIENT 175 uint32_t R3CCoefficient : __CODEGEN_BITFIELD(23, 27) ; //!< R3C_COEFFICIENT 176 uint32_t Reserved60 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 177 }; 178 uint32_t Value; 179 } DW1; 180 union 181 { 182 //!< DWORD 2 183 struct 184 { 185 uint32_t GlobalNoiseEstimation : __CODEGEN_BITFIELD( 0, 7) ; //!< GLOBAL_NOISE_ESTIMATION 186 uint32_t NonEdgeWeight : __CODEGEN_BITFIELD( 8, 10) ; //!< NON_EDGE_WEIGHT 187 uint32_t RegularWeight : __CODEGEN_BITFIELD(11, 13) ; //!< REGULAR_WEIGHT 188 uint32_t StrongEdgeWeight : __CODEGEN_BITFIELD(14, 16) ; //!< STRONG_EDGE_WEIGHT 189 uint32_t R5XCoefficient : __CODEGEN_BITFIELD(17, 21) ; //!< R5X_COEFFICIENT 190 uint32_t R5CxCoefficient : __CODEGEN_BITFIELD(22, 26) ; //!< R5CX_COEFFICIENT 191 uint32_t R5CCoefficient : __CODEGEN_BITFIELD(27, 31) ; //!< R5C_COEFFICIENT 192 }; 193 uint32_t Value; 194 } DW2; 195 union 196 { 197 //!< DWORD 3 198 struct 199 { 200 uint32_t StdSinAlpha : __CODEGEN_BITFIELD( 0, 7) ; //!< STD Sin(alpha) 201 uint32_t StdCosAlpha : __CODEGEN_BITFIELD( 8, 15) ; //!< STD Cos(alpha) 202 uint32_t SatMax : __CODEGEN_BITFIELD(16, 21) ; //!< SAT_MAX 203 uint32_t HueMax : __CODEGEN_BITFIELD(22, 27) ; //!< HUE_MAX 204 uint32_t Reserved124 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 205 }; 206 uint32_t Value; 207 } DW3; 208 union 209 { 210 //!< DWORD 4 211 struct 212 { 213 uint32_t S3U : __CODEGEN_BITFIELD( 0, 10) ; //!< S3U 214 uint32_t Reserved139 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 215 uint32_t DiamondMargin : __CODEGEN_BITFIELD(12, 14) ; //!< DIAMOND_MARGIN 216 uint32_t VyStdEnable : __CODEGEN_BITFIELD(15, 15) ; //!< VY_STD_Enable 217 uint32_t UMid : __CODEGEN_BITFIELD(16, 23) ; //!< U_MID 218 uint32_t VMid : __CODEGEN_BITFIELD(24, 31) ; //!< V_MID 219 }; 220 uint32_t Value; 221 } DW4; 222 union 223 { 224 //!< DWORD 5 225 struct 226 { 227 uint32_t DiamondDv : __CODEGEN_BITFIELD( 0, 6) ; //!< DIAMOND_DV 228 uint32_t DiamondTh : __CODEGEN_BITFIELD( 7, 12) ; //!< DIAMOND_TH 229 uint32_t DiamondAlpha : __CODEGEN_BITFIELD(13, 20) ; //!< Diamond_alpha 230 uint32_t HsMargin : __CODEGEN_BITFIELD(21, 23) ; //!< HS_MARGIN 231 uint32_t DiamondDu : __CODEGEN_BITFIELD(24, 30) ; //!< DIAMOND_DU 232 uint32_t SkinDetailFactor : __CODEGEN_BITFIELD(31, 31) ; //!< SKIN_DETAIL_FACTOR 233 }; 234 uint32_t Value; 235 } DW5; 236 union 237 { 238 //!< DWORD 6 239 struct 240 { 241 uint32_t YPoint1 : __CODEGEN_BITFIELD( 0, 7) ; //!< Y_POINT_1 242 uint32_t YPoint2 : __CODEGEN_BITFIELD( 8, 15) ; //!< Y_POINT_2 243 uint32_t YPoint3 : __CODEGEN_BITFIELD(16, 23) ; //!< Y_POINT_3 244 uint32_t YPoint4 : __CODEGEN_BITFIELD(24, 31) ; //!< Y_POINT_4 245 }; 246 uint32_t Value; 247 } DW6; 248 union 249 { 250 //!< DWORD 7 251 struct 252 { 253 uint32_t InvMarginVyl : __CODEGEN_BITFIELD( 0, 15) ; //!< INV_Margin_VYL 254 uint32_t Reserved240 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 255 }; 256 uint32_t Value; 257 } DW7; 258 union 259 { 260 //!< DWORD 8 261 struct 262 { 263 uint32_t InvMarginVyu : __CODEGEN_BITFIELD( 0, 15) ; //!< INV_Margin_VYU 264 uint32_t P0L : __CODEGEN_BITFIELD(16, 23) ; //!< P0L 265 uint32_t P1L : __CODEGEN_BITFIELD(24, 31) ; //!< P1L 266 }; 267 uint32_t Value; 268 } DW8; 269 union 270 { 271 //!< DWORD 9 272 struct 273 { 274 uint32_t P2L : __CODEGEN_BITFIELD( 0, 7) ; //!< P2L 275 uint32_t P3L : __CODEGEN_BITFIELD( 8, 15) ; //!< P3L 276 uint32_t B0L : __CODEGEN_BITFIELD(16, 23) ; //!< B0L 277 uint32_t B1L : __CODEGEN_BITFIELD(24, 31) ; //!< B1L 278 }; 279 uint32_t Value; 280 } DW9; 281 union 282 { 283 //!< DWORD 10 284 struct 285 { 286 uint32_t B2L : __CODEGEN_BITFIELD( 0, 7) ; //!< B2L 287 uint32_t B3L : __CODEGEN_BITFIELD( 8, 15) ; //!< B3L 288 uint32_t S0L : __CODEGEN_BITFIELD(16, 26) ; //!< S0L 289 uint32_t YSlope2 : __CODEGEN_BITFIELD(27, 31) ; //!< Y_Slope_2 290 }; 291 uint32_t Value; 292 } DW10; 293 union 294 { 295 //!< DWORD 11 296 struct 297 { 298 uint32_t S1L : __CODEGEN_BITFIELD( 0, 10) ; //!< S1L 299 uint32_t S2L : __CODEGEN_BITFIELD(11, 21) ; //!< S2L 300 uint32_t Reserved374 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 301 }; 302 uint32_t Value; 303 } DW11; 304 union 305 { 306 //!< DWORD 12 307 struct 308 { 309 uint32_t S3L : __CODEGEN_BITFIELD( 0, 10) ; //!< S3L 310 uint32_t P0U : __CODEGEN_BITFIELD(11, 18) ; //!< P0U 311 uint32_t P1U : __CODEGEN_BITFIELD(19, 26) ; //!< P1U 312 uint32_t YSlope1 : __CODEGEN_BITFIELD(27, 31) ; //!< Y_Slope1 313 }; 314 uint32_t Value; 315 } DW12; 316 union 317 { 318 //!< DWORD 13 319 struct 320 { 321 uint32_t P2U : __CODEGEN_BITFIELD( 0, 7) ; //!< P2U 322 uint32_t P3U : __CODEGEN_BITFIELD( 8, 15) ; //!< P3U 323 uint32_t B0U : __CODEGEN_BITFIELD(16, 23) ; //!< B0U 324 uint32_t B1U : __CODEGEN_BITFIELD(24, 31) ; //!< B1U 325 }; 326 uint32_t Value; 327 } DW13; 328 union 329 { 330 //!< DWORD 14 331 struct 332 { 333 uint32_t B2U : __CODEGEN_BITFIELD( 0, 7) ; //!< B2U 334 uint32_t B3U : __CODEGEN_BITFIELD( 8, 15) ; //!< B3U 335 uint32_t S0U : __CODEGEN_BITFIELD(16, 26) ; //!< S0U 336 uint32_t Reserved475 : __CODEGEN_BITFIELD(27, 31) ; //!< Reserved 337 }; 338 uint32_t Value; 339 } DW14; 340 union 341 { 342 //!< DWORD 15 343 struct 344 { 345 uint32_t S1U : __CODEGEN_BITFIELD( 0, 10) ; //!< S1U 346 uint32_t S2U : __CODEGEN_BITFIELD(11, 21) ; //!< S2U 347 uint32_t Reserved502 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 348 }; 349 uint32_t Value; 350 } DW15; 351 union 352 { 353 //!< DWORD 16 354 struct 355 { 356 uint32_t TransformEnable : __CODEGEN_BITFIELD( 0, 0) ; //!< Transform Enable 357 uint32_t YuvChannelSwap : __CODEGEN_BITFIELD( 1, 1) ; //!< YUV Channel Swap 358 uint32_t Reserved514 : __CODEGEN_BITFIELD( 2, 2) ; //!< Reserved 359 uint32_t C0 : __CODEGEN_BITFIELD( 3, 15) ; //!< C0 360 uint32_t C1 : __CODEGEN_BITFIELD(16, 28) ; //!< C1 361 uint32_t Reserved541 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 362 }; 363 uint32_t Value; 364 } DW16; 365 union 366 { 367 //!< DWORD 17 368 struct 369 { 370 uint32_t C2 : __CODEGEN_BITFIELD( 0, 12) ; //!< C2 371 uint32_t C3 : __CODEGEN_BITFIELD(13, 25) ; //!< C3 372 uint32_t Reserved570 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 373 }; 374 uint32_t Value; 375 } DW17; 376 union 377 { 378 //!< DWORD 18 379 struct 380 { 381 uint32_t C4 : __CODEGEN_BITFIELD( 0, 12) ; //!< C4 382 uint32_t C5 : __CODEGEN_BITFIELD(13, 25) ; //!< C5 383 uint32_t Reserved602 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 384 }; 385 uint32_t Value; 386 } DW18; 387 union 388 { 389 //!< DWORD 19 390 struct 391 { 392 uint32_t C6 : __CODEGEN_BITFIELD( 0, 12) ; //!< C6 393 uint32_t C7 : __CODEGEN_BITFIELD(13, 25) ; //!< C7 394 uint32_t Reserved634 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 395 }; 396 uint32_t Value; 397 } DW19; 398 union 399 { 400 //!< DWORD 20 401 struct 402 { 403 uint32_t C8 : __CODEGEN_BITFIELD( 0, 12) ; //!< C8 404 uint32_t Reserved653 : __CODEGEN_BITFIELD(13, 31) ; //!< Reserved 405 }; 406 uint32_t Value; 407 } DW20; 408 union 409 { 410 //!< DWORD 21 411 struct 412 { 413 uint32_t OffsetIn1 : __CODEGEN_BITFIELD( 0, 10) ; //!< OFFSET_IN_1 414 uint32_t OffsetOut1 : __CODEGEN_BITFIELD(11, 21) ; //!< OFFSET_OUT_1 415 uint32_t Reserved694 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 416 }; 417 uint32_t Value; 418 } DW21; 419 union 420 { 421 //!< DWORD 22 422 struct 423 { 424 uint32_t OffsetIn2 : __CODEGEN_BITFIELD( 0, 10) ; //!< OFFSET_IN_2 425 uint32_t OffsetOut2 : __CODEGEN_BITFIELD(11, 21) ; //!< OFFSET_OUT_2 426 uint32_t Reserved726 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 427 }; 428 uint32_t Value; 429 } DW22; 430 union 431 { 432 //!< DWORD 23 433 struct 434 { 435 uint32_t OffsetIn3 : __CODEGEN_BITFIELD( 0, 10) ; //!< OFFSET_IN_3 436 uint32_t OffsetOut3 : __CODEGEN_BITFIELD(11, 21) ; //!< OFFSET_OUT_3 437 uint32_t Reserved758 : __CODEGEN_BITFIELD(22, 31) ; //!< Reserved 438 }; 439 uint32_t Value; 440 } DW23; 441 442 //! \name Local enumerations 443 444 enum SUBOPCODEB 445 { 446 SUBOPCODEB_SFCIEFSTATE = 3, //!< No additional details 447 }; 448 449 enum SUBOPCODEA 450 { 451 SUBOPCODEA_COMMON = 0, //!< No additional details 452 }; 453 454 enum MEDIA_COMMAND_OPCODE 455 { 456 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 457 }; 458 459 enum PIPELINE 460 { 461 PIPELINE_MEDIA = 2, //!< No additional details 462 }; 463 464 enum COMMAND_TYPE 465 { 466 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 467 }; 468 469 //! \brief GAIN_FACTOR 470 //! \details 471 //! User control sharpening strength. 472 enum GAIN_FACTOR 473 { 474 GAIN_FACTOR_UNNAMED_4_4 = 44, //!< No additional details 475 }; 476 477 //! \brief WEAK_EDGE_THRESHOLD 478 //! \details 479 //! If Strong Edge Threshold > EM > Weak Edge Threshold ? the basic 480 //! VSA detects a weak edge. 481 enum WEAK_EDGE_THRESHOLD 482 { 483 WEAK_EDGE_THRESHOLD_UNNAMED1 = 1, //!< No additional details 484 }; 485 486 //! \brief STRONG_EDGE_THRESHOLD 487 //! \details 488 //! If EM > Strong Edge Threshold ? the basic VSA detects a strong edge. 489 enum STRONG_EDGE_THRESHOLD 490 { 491 STRONG_EDGE_THRESHOLD_UNNAMED8 = 8, //!< No additional details 492 }; 493 494 //! \brief R3X_COEFFICIENT 495 //! \details 496 //! IEF smoothing coefficient, <i>see IEF map.</i> 497 enum R3X_COEFFICIENT 498 { 499 R3X_COEFFICIENT_UNNAMED5 = 5, //!< No additional details 500 }; 501 502 //! \brief R3C_COEFFICIENT 503 //! \details 504 //! IEF smoothing coefficient, <i>see IEF map.</i> 505 enum R3C_COEFFICIENT 506 { 507 R3C_COEFFICIENT_UNNAMED5 = 5, //!< No additional details 508 }; 509 510 //! \brief GLOBAL_NOISE_ESTIMATION 511 //! \details 512 //! Global noise estimation of previous frame. 513 enum GLOBAL_NOISE_ESTIMATION 514 { 515 GLOBAL_NOISE_ESTIMATION_UNNAMED255 = 255, //!< No additional details 516 }; 517 518 //! \brief NON_EDGE_WEIGHT 519 //! \details 520 //! . Sharpening strength when <u>NO EDGE</u> is found in basic VSA. 521 enum NON_EDGE_WEIGHT 522 { 523 NON_EDGE_WEIGHT_UNNAMED1 = 1, //!< No additional details 524 }; 525 526 //! \brief REGULAR_WEIGHT 527 //! \details 528 //! Sharpening strength when a <u>WEAK</u> edge is found in basic VSA. 529 enum REGULAR_WEIGHT 530 { 531 REGULAR_WEIGHT_UNNAMED2 = 2, //!< No additional details 532 }; 533 534 //! \brief STRONG_EDGE_WEIGHT 535 //! \details 536 //! Sharpening strength when a <u>STRONG</u> edge is found in basic VSA. 537 enum STRONG_EDGE_WEIGHT 538 { 539 STRONG_EDGE_WEIGHT_UNNAMED7 = 7, //!< No additional details 540 }; 541 542 //! \brief R5X_COEFFICIENT 543 //! \details 544 //! IEF smoothing coefficient, <i>see IEF map.</i> 545 enum R5X_COEFFICIENT 546 { 547 R5X_COEFFICIENT_UNNAMED7 = 7, //!< No additional details 548 }; 549 550 //! \brief R5CX_COEFFICIENT 551 //! \details 552 //! IEF smoothing coefficient, <i>see IEF map.</i> 553 enum R5CX_COEFFICIENT 554 { 555 R5CX_COEFFICIENT_UNNAMED7 = 7, //!< No additional details 556 }; 557 558 //! \brief R5C_COEFFICIENT 559 //! \details 560 //! IEF smoothing coefficient, <i>see IEF map.</i> 561 enum R5C_COEFFICIENT 562 { 563 R5C_COEFFICIENT_UNNAMED7 = 7, //!< No additional details 564 }; 565 566 //! \brief SAT_MAX 567 //! \details 568 //! Rectangle half length. 569 enum SAT_MAX 570 { 571 SAT_MAX_UNNAMED31 = 31, //!< No additional details 572 }; 573 574 //! \brief HUE_MAX 575 //! \details 576 //! Rectangle half width. 577 enum HUE_MAX 578 { 579 HUE_MAX_UNNAMED1_4 = 14, //!< No additional details 580 }; 581 582 enum DIAMOND_MARGIN 583 { 584 DIAMOND_MARGIN_UNNAMED_4 = 4, //!< No additional details 585 }; 586 587 //! \brief U_MID 588 //! \details 589 //! Rectangle middle-point U coordinate. 590 enum U_MID 591 { 592 U_MID_UNNAMED110 = 110, //!< No additional details 593 }; 594 595 //! \brief V_MID 596 //! \details 597 //! Rectangle middle-point V coordinate. 598 enum V_MID 599 { 600 V_MID_UNNAMED15_4 = 154, //!< No additional details 601 }; 602 603 //! \brief DIAMOND_DV 604 //! \details 605 //! Rhombus center shift in the hue-direction, relative to the rectangle 606 //! center. 607 enum DIAMOND_DV 608 { 609 DIAMOND_DV_UNNAMED0 = 0, //!< No additional details 610 }; 611 612 //! \brief DIAMOND_TH 613 //! \details 614 //! Half length of the rhombus axis in the sat-direction. 615 enum DIAMOND_TH 616 { 617 DIAMOND_TH_UNNAMED35 = 35, //!< No additional details 618 }; 619 620 //! \brief HS_MARGIN 621 //! \details 622 //! Defines rectangle margin. 623 enum HS_MARGIN 624 { 625 HS_MARGIN_UNNAMED3 = 3, //!< No additional details 626 }; 627 628 //! \brief DIAMOND_DU 629 //! \details 630 //! Rhombus center shift in the sat-direction, relative to the rectangle 631 //! center. 632 enum DIAMOND_DU 633 { 634 DIAMOND_DU_UNNAMED0 = 0, //!< No additional details 635 }; 636 637 //! \brief SKIN_DETAIL_FACTOR 638 //! \details 639 //! This flag bit is in operation only when one of the following conditions 640 //! exists: 641 //! <ul> 642 //! <li>when the control bit <b>SkinToneTunedIEF_Enable</b> is on. 643 //! </li> 644 //! <Li>When <b>SkinDetailFactor</b> is equal to 0, 645 //! sign(<b>SkinDetailFactor</b>) is equal to +1, and the content of the 646 //! detected skin tone area is detail revealed.</Li> 647 //! <li>When <b>SkinDetailFactor</b> is equal to 1, 648 //! sign(<b>SkinDetailFactor</b>) is equal to -1, and the content of the 649 //! detected skin tone area is not detail revealed.</li> 650 //! </ul> 651 enum SKIN_DETAIL_FACTOR 652 { 653 SKIN_DETAIL_FACTOR_DETAILREVEALED = 0, //!< No additional details 654 SKIN_DETAIL_FACTOR_NOTDETAILREVEALED = 1, //!< No additional details 655 }; 656 657 //! \brief Y_POINT_1 658 //! \details 659 //! First point of the Y piecewise linear membership function. 660 enum Y_POINT_1 661 { 662 Y_POINT_1_UNNAMED_46 = 46, //!< No additional details 663 }; 664 665 //! \brief Y_POINT_2 666 //! \details 667 //! Second point of the Y piecewise linear membership function. 668 enum Y_POINT_2 669 { 670 Y_POINT_2_UNNAMED_47 = 47, //!< No additional details 671 }; 672 673 //! \brief Y_POINT_3 674 //! \details 675 //! Third point of the Y piecewise linear membership function. 676 enum Y_POINT_3 677 { 678 Y_POINT_3_UNNAMED25_4 = 254, //!< No additional details 679 }; 680 681 //! \brief Y_POINT_4 682 //! \details 683 //! Fourth point of the Y piecewise linear membership function. 684 enum Y_POINT_4 685 { 686 Y_POINT_4_UNNAMED255 = 255, //!< No additional details 687 }; 688 689 //! \brief P0L 690 //! \details 691 //! Y Point 0 of the lower part of the detection PWLF. 692 enum P0L 693 { 694 P0L_UNNAMED_46 = 46, //!< No additional details 695 }; 696 697 //! \brief P1L 698 //! \details 699 //! Y Point 1 of the lower part of the detection PWLF. 700 enum P1L 701 { 702 P1L_UNNAMED216 = 216, //!< No additional details 703 }; 704 705 //! \brief P2L 706 //! \details 707 //! Y Point 2 of the lower part of the detection PWLF. 708 enum P2L 709 { 710 P2L_UNNAMED236 = 236, //!< No additional details 711 }; 712 713 //! \brief P3L 714 //! \details 715 //! Y Point 3 of the lower part of the detection PWLF. 716 enum P3L 717 { 718 P3L_UNNAMED236 = 236, //!< No additional details 719 }; 720 721 //! \brief B0L 722 //! \details 723 //! V Bias 0 of the lower part of the detection PWLF. 724 enum B0L 725 { 726 B0L_UNNAMED133 = 133, //!< No additional details 727 }; 728 729 //! \brief B1L 730 //! \details 731 //! V Bias 1 of the lower part of the detection PWLF. 732 enum B1L 733 { 734 B1L_UNNAMED130 = 130, //!< No additional details 735 }; 736 737 //! \brief B2L 738 //! \details 739 //! V Bias 2 of the lower part of the detection PWLF. 740 enum B2L 741 { 742 B2L_UNNAMED130 = 130, //!< No additional details 743 }; 744 745 //! \brief B3L 746 //! \details 747 //! V Bias 3 of the lower part of the detection PWLF. 748 enum B3L 749 { 750 B3L_UNNAMED130 = 130, //!< No additional details 751 }; 752 753 //! \brief P0U 754 //! \details 755 //! Y Point 0 of the upper part of the detection PWLF. 756 enum P0U 757 { 758 P0U_UNNAMED_46 = 46, //!< No additional details 759 }; 760 761 //! \brief P1U 762 //! \details 763 //! Y Point 1 of the upper part of the detection PWLF. 764 enum P1U 765 { 766 P1U_UNNAMED66 = 66, //!< No additional details 767 }; 768 769 //! \brief P2U 770 //! \details 771 //! Y Point 2 of the upper part of the detection PWLF. 772 enum P2U 773 { 774 P2U_UNNAMED150 = 150, //!< No additional details 775 }; 776 777 //! \brief P3U 778 //! \details 779 //! Y Point 3 of the upper part of the detection PWLF. 780 enum P3U 781 { 782 P3U_UNNAMED236 = 236, //!< No additional details 783 }; 784 785 //! \brief B0U 786 //! \details 787 //! V Bias 0 of the upper part of the detection PWLF. 788 enum B0U 789 { 790 B0U_UNNAMED1_43 = 143, //!< No additional details 791 }; 792 793 //! \brief B1U 794 //! \details 795 //! V Bias 1 of the upper part of the detection PWLF. 796 enum B1U 797 { 798 B1U_UNNAMED163 = 163, //!< No additional details 799 }; 800 801 //! \brief B2U 802 //! \details 803 //! V Bias 2 of the upper part of the detection PWLF. 804 enum B2U 805 { 806 B2U_UNNAMED200 = 200, //!< No additional details 807 }; 808 809 //! \brief B3U 810 //! \details 811 //! V Bias 3 of the upper part of the detection PWLF. 812 enum B3U 813 { 814 B3U_UNNAMED1_40 = 140, //!< No additional details 815 }; 816 817 //! \brief C0 818 //! \details 819 //! Transform coefficient 820 enum C0 821 { 822 C0_UNNAMED102_4 = 1024, //!< No additional details 823 }; 824 825 //! \brief C1 826 //! \details 827 //! Transform coefficient 828 enum C1 829 { 830 C1_UNNAMED0 = 0, //!< No additional details 831 }; 832 833 //! \brief C2 834 //! \details 835 //! Transform coefficient 836 enum C2 837 { 838 C2_UNNAMED0 = 0, //!< No additional details 839 }; 840 841 //! \brief C3 842 //! \details 843 //! Transform coefficient 844 enum C3 845 { 846 C3_UNNAMED0 = 0, //!< No additional details 847 }; 848 849 //! \brief C4 850 //! \details 851 //! Transform coefficient 852 enum C4 853 { 854 C4_UNNAMED102_4 = 1024, //!< No additional details 855 }; 856 857 //! \brief C5 858 //! \details 859 //! Transform coefficient 860 enum C5 861 { 862 C5_UNNAMED0 = 0, //!< No additional details 863 }; 864 865 //! \brief C6 866 //! \details 867 //! Transform coefficient 868 enum C6 869 { 870 C6_UNNAMED0 = 0, //!< No additional details 871 }; 872 873 //! \brief C7 874 //! \details 875 //! Transform coefficient 876 enum C7 877 { 878 C7_UNNAMED0 = 0, //!< No additional details 879 }; 880 881 //! \brief C8 882 //! \details 883 //! Transform coefficient 884 enum C8 885 { 886 C8_UNNAMED102_4 = 1024, //!< No additional details 887 }; 888 889 //! \brief OFFSET_IN_1 890 //! \details 891 //! Offset in for Y/R. 892 enum OFFSET_IN_1 893 { 894 OFFSET_IN_1_UNNAMED0 = 0, //!< No additional details 895 }; 896 897 //! \brief OFFSET_OUT_1 898 //! \details 899 //! Offset out for Y/R. 900 enum OFFSET_OUT_1 901 { 902 OFFSET_OUT_1_UNNAMED0 = 0, //!< No additional details 903 }; 904 905 //! \brief OFFSET_IN_2 906 //! \details 907 //! Offset in for U/G. 908 enum OFFSET_IN_2 909 { 910 OFFSET_IN_2_UNNAMED0 = 0, //!< No additional details 911 }; 912 913 //! \brief OFFSET_OUT_2 914 //! \details 915 //! Offset out for U/G. 916 enum OFFSET_OUT_2 917 { 918 OFFSET_OUT_2_UNNAMED0 = 0, //!< No additional details 919 }; 920 921 //! \brief OFFSET_IN_3 922 //! \details 923 //! Offset in for V/B. 924 enum OFFSET_IN_3 925 { 926 OFFSET_IN_3_UNNAMED0 = 0, //!< No additional details 927 }; 928 929 //! \brief OFFSET_OUT_3 930 //! \details 931 //! Offset out for V/B. 932 enum OFFSET_OUT_3 933 { 934 OFFSET_OUT_3_UNNAMED0 = 0, //!< No additional details 935 }; 936 937 //! \name Initializations 938 939 //! \brief Explicit member initialization function 940 SFC_IEF_STATE_CMD(); 941 942 static const size_t dwSize = 24; 943 static const size_t byteSize = 96; 944 }; 945 946 //! 947 //! \brief SFC_FRAME_START 948 //! \details 949 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 950 //! each frame once the lock request is granted. 951 //! 952 struct SFC_FRAME_START_CMD 953 { 954 union 955 { 956 //!< DWORD 0 957 struct 958 { 959 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 960 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 961 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 962 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 963 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 964 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 965 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 966 }; 967 uint32_t Value; 968 } DW0; 969 union 970 { 971 //!< DWORD 1 972 struct 973 { 974 uint32_t Reserved32 ; //!< Reserved 975 }; 976 uint32_t Value; 977 } DW1; 978 979 //! \name Local enumerations 980 981 enum SUBOPCODEB 982 { 983 SUBOPCODEB_SFCFRAMESTART = 4, //!< No additional details 984 }; 985 986 enum SUBOPCODEA 987 { 988 SUBOPCODEA_COMMON = 0, //!< No additional details 989 }; 990 991 enum MEDIA_COMMAND_OPCODE 992 { 993 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 994 }; 995 996 enum PIPELINE 997 { 998 PIPELINE_MEDIA = 2, //!< No additional details 999 }; 1000 1001 enum COMMAND_TYPE 1002 { 1003 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1004 }; 1005 1006 //! \name Initializations 1007 1008 //! \brief Explicit member initialization function 1009 SFC_FRAME_START_CMD(); 1010 1011 static const size_t dwSize = 2; 1012 static const size_t byteSize = 8; 1013 }; 1014 1015 //! 1016 //! \brief SFC_LOCK 1017 //! \details 1018 //! 1019 //! 1020 struct SFC_LOCK_CMD 1021 { 1022 union 1023 { 1024 //!< DWORD 0 1025 struct 1026 { 1027 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 1028 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1029 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 1030 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 1031 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 1032 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 1033 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 1034 }; 1035 uint32_t Value; 1036 } DW0; 1037 union 1038 { 1039 //!< DWORD 1 1040 struct 1041 { 1042 uint32_t VeSfcPipeSelect : __CODEGEN_BITFIELD( 0, 0) ; //!< VE-SFC Pipe Select 1043 uint32_t PreScaledOutputSurfaceOutputEnable : __CODEGEN_BITFIELD( 1, 1) ; //!< Pre-Scaled Output Surface Output Enable 1044 uint32_t Reserved34 : __CODEGEN_BITFIELD( 2, 31) ; //!< Reserved 1045 }; 1046 uint32_t Value; 1047 } DW1; 1048 1049 //! \name Local enumerations 1050 1051 enum SUBOPCODEB 1052 { 1053 SUBOPCODEB_SFCLOCK = 0, //!< No additional details 1054 }; 1055 1056 enum SUBOPCODEA 1057 { 1058 SUBOPCODEA_COMMON = 0, //!< No additional details 1059 }; 1060 1061 enum MEDIA_COMMAND_OPCODE 1062 { 1063 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 1064 }; 1065 1066 enum PIPELINE 1067 { 1068 PIPELINE_MEDIA = 2, //!< No additional details 1069 }; 1070 1071 enum COMMAND_TYPE 1072 { 1073 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1074 }; 1075 1076 //! \name Initializations 1077 1078 //! \brief Explicit member initialization function 1079 SFC_LOCK_CMD(); 1080 1081 static const size_t dwSize = 2; 1082 static const size_t byteSize = 8; 1083 }; 1084 1085 //! 1086 //! \brief SFC_STATE 1087 //! \details 1088 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 1089 //! each frame once the lock request is granted. 1090 //! 1091 struct SFC_STATE_CMD 1092 { 1093 union 1094 { 1095 //!< DWORD 0 1096 struct 1097 { 1098 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 1099 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1100 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 1101 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 1102 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 1103 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 1104 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 1105 }; 1106 uint32_t Value; 1107 } DW0; 1108 union 1109 { 1110 //!< DWORD 1 1111 struct 1112 { 1113 uint32_t SfcPipeMode : __CODEGEN_BITFIELD( 0, 3) ; //!< SFC_PIPE_MODE 1114 uint32_t SfcInputChromaSubSampling : __CODEGEN_BITFIELD( 4, 7) ; //!< SFC_INPUT_CHROMA_SUB_SAMPLING 1115 uint32_t VdVeInputOrderingMode : __CODEGEN_BITFIELD( 8, 10) ; //!< VDVE_INPUT_ORDERING_MODE 1116 uint32_t Reserved43 : __CODEGEN_BITFIELD(11, 31) ; //!< Reserved 1117 }; 1118 uint32_t Value; 1119 } DW1; 1120 union 1121 { 1122 //!< DWORD 2 1123 struct 1124 { 1125 uint32_t InputFrameResolutionWidth : __CODEGEN_BITFIELD( 0, 11) ; //!< Input Frame Resolution Width 1126 uint32_t Reserved76 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1127 uint32_t InputFrameResolutionHeight : __CODEGEN_BITFIELD(16, 27) ; //!< Input Frame Resolution Height 1128 uint32_t Reserved92 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1129 }; 1130 uint32_t Value; 1131 } DW2; 1132 union 1133 { 1134 //!< DWORD 3 1135 struct 1136 { 1137 uint32_t OutputSurfaceFormatType : __CODEGEN_BITFIELD( 0, 3) ; //!< OUTPUT_SURFACE_FORMAT_TYPE 1138 uint32_t Reserved100 : __CODEGEN_BITFIELD( 4, 4) ; //!< Reserved 1139 uint32_t RgbaChannelSwapEnable : __CODEGEN_BITFIELD( 5, 5) ; //!< RGBA_CHANNEL_SWAP_ENABLE 1140 uint32_t PreAvsChromaDownsamplingEnable : __CODEGEN_BITFIELD( 6, 7) ; //!< Pre- AVS Chroma Downsampling Enable 1141 uint32_t PreAvsChromaDownsamplingCoSitingPositionVerticalDirection : __CODEGEN_BITFIELD( 8, 10) ; //!< Pre-AVS Chroma Downsampling co-siting position Vertical Direction 1142 uint32_t Reserved107 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 1143 uint32_t PreAvsChromaDownsamplingCoSitingPositionHorizontalDirection : __CODEGEN_BITFIELD(12, 14) ; //!< Pre-AVS Chroma Downsampling co-siting position Horizontal Direction 1144 uint32_t Reserved111 : __CODEGEN_BITFIELD(15, 31) ; //!< Reserved 1145 }; 1146 uint32_t Value; 1147 } DW3; 1148 union 1149 { 1150 //!< DWORD 4 1151 struct 1152 { 1153 uint32_t IefEnable : __CODEGEN_BITFIELD( 0, 0) ; //!< IEF_ENABLE 1154 uint32_t SkinToneTunedIefEnable : __CODEGEN_BITFIELD( 1, 1) ; //!< Skin Tone Tuned IEF_Enable 1155 uint32_t Ief4SmoothEnable : __CODEGEN_BITFIELD( 2, 2) ; //!< IEF4SMOOTH_ENABLE_ 1156 uint32_t Reserved131 : __CODEGEN_BITFIELD( 3, 3) ; //!< Reserved 1157 uint32_t AvsFilterMode : __CODEGEN_BITFIELD( 4, 5) ; //!< AVS_FILTER_MODE 1158 uint32_t AdaptiveFilterForAllChannels : __CODEGEN_BITFIELD( 6, 6) ; //!< ADAPTIVE_FILTER_FOR_ALL_CHANNELS 1159 uint32_t AvsScalingEnable : __CODEGEN_BITFIELD( 7, 7) ; //!< AVS_SCALING_ENABLE 1160 uint32_t BypassYAdaptiveFiltering : __CODEGEN_BITFIELD( 8, 8) ; //!< BYPASS_Y_ADAPTIVE_FILTERING 1161 uint32_t BypassXAdaptiveFiltering : __CODEGEN_BITFIELD( 9, 9) ; //!< BYPASS_X_ADAPTIVE_FILTERING 1162 uint32_t Reserved138 : __CODEGEN_BITFIELD(10, 11) ; //!< Reserved 1163 uint32_t ChromaUpsamplingEnable : __CODEGEN_BITFIELD(12, 12) ; //!< Chroma Upsampling Enable 1164 uint32_t Reserved141 : __CODEGEN_BITFIELD(13, 15) ; //!< Reserved 1165 uint32_t RotationMode : __CODEGEN_BITFIELD(16, 17) ; //!< ROTATION_MODE 1166 uint32_t ColorFillEnable : __CODEGEN_BITFIELD(18, 18) ; //!< Color Fill Enable 1167 uint32_t CscEnable : __CODEGEN_BITFIELD(19, 19) ; //!< CSC Enable 1168 uint32_t Reserved148 : __CODEGEN_BITFIELD(20, 31) ; //!< Reserved 1169 }; 1170 uint32_t Value; 1171 } DW4; 1172 union 1173 { 1174 //!< DWORD 5 1175 struct 1176 { 1177 uint32_t SourceRegionWidth : __CODEGEN_BITFIELD( 0, 11) ; //!< Source Region Width 1178 uint32_t Reserved172 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1179 uint32_t SourceRegionHeight : __CODEGEN_BITFIELD(16, 27) ; //!< Source Region Height 1180 uint32_t Reserved188 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1181 }; 1182 uint32_t Value; 1183 } DW5; 1184 union 1185 { 1186 //!< DWORD 6 1187 struct 1188 { 1189 uint32_t SourceRegionHorizontalOffset : __CODEGEN_BITFIELD( 0, 11) ; //!< Source Region Horizontal Offset 1190 uint32_t Reserved204 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1191 uint32_t SourceRegionVerticalOffset : __CODEGEN_BITFIELD(16, 27) ; //!< Source Region Vertical Offset 1192 uint32_t Reserved220 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1193 }; 1194 uint32_t Value; 1195 } DW6; 1196 union 1197 { 1198 //!< DWORD 7 1199 struct 1200 { 1201 uint32_t OutputFrameWidth : __CODEGEN_BITFIELD( 0, 11) ; //!< Output Frame Width 1202 uint32_t Reserved236 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1203 uint32_t OutputFrameHeight : __CODEGEN_BITFIELD(16, 27) ; //!< Output Frame Height 1204 uint32_t Reserved252 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1205 }; 1206 uint32_t Value; 1207 } DW7; 1208 union 1209 { 1210 //!< DWORD 8 1211 struct 1212 { 1213 uint32_t ScaledRegionSizeWidth : __CODEGEN_BITFIELD( 0, 11) ; //!< Scaled Region Size Width 1214 uint32_t Reserved268 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 1215 uint32_t ScaledRegionSizeHeight : __CODEGEN_BITFIELD(16, 27) ; //!< Scaled Region Size Height 1216 uint32_t Reserved284 : __CODEGEN_BITFIELD(28, 31) ; //!< Reserved 1217 }; 1218 uint32_t Value; 1219 } DW8; 1220 union 1221 { 1222 //!< DWORD 9 1223 struct 1224 { 1225 uint32_t ScaledRegionHorizontalOffset : __CODEGEN_BITFIELD( 0, 12) ; //!< Scaled Region Horizontal Offset 1226 uint32_t Reserved301 : __CODEGEN_BITFIELD(13, 15) ; //!< Reserved 1227 uint32_t ScaledRegionVerticalOffset : __CODEGEN_BITFIELD(16, 28) ; //!< Scaled Region Vertical Offset 1228 uint32_t Reserved317 : __CODEGEN_BITFIELD(29, 31) ; //!< Reserved 1229 }; 1230 uint32_t Value; 1231 } DW9; 1232 union 1233 { 1234 //!< DWORD 10 1235 struct 1236 { 1237 uint32_t GrayBarPixelUG : __CODEGEN_BITFIELD( 0, 9) ; //!< Gray Bar Pixel - U/G 1238 uint32_t Reserved330 : __CODEGEN_BITFIELD(10, 15) ; //!< Reserved 1239 uint32_t GrayBarPixelYR : __CODEGEN_BITFIELD(16, 25) ; //!< Gray Bar Pixel - Y/R 1240 uint32_t Reserved346 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 1241 }; 1242 uint32_t Value; 1243 } DW10; 1244 union 1245 { 1246 //!< DWORD 11 1247 struct 1248 { 1249 uint32_t GrayBarPixelA : __CODEGEN_BITFIELD( 0, 9) ; //!< Gray Bar Pixel - A 1250 uint32_t Reserved362 : __CODEGEN_BITFIELD(10, 15) ; //!< Reserved 1251 uint32_t GrayBarPixelVB : __CODEGEN_BITFIELD(16, 25) ; //!< Gray Bar Pixel - V/B 1252 uint32_t Reserved378 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 1253 }; 1254 uint32_t Value; 1255 } DW11; 1256 union 1257 { 1258 //!< DWORD 12 1259 struct 1260 { 1261 uint32_t UvDefaultValueForUChannelForMonoInputSupport : __CODEGEN_BITFIELD( 0, 9) ; //!< UV Default value for U channel (For Mono Input Support) 1262 uint32_t Reserved394 : __CODEGEN_BITFIELD(10, 15) ; //!< Reserved 1263 uint32_t UvDefaultValueForVChannelForMonoInputSupport : __CODEGEN_BITFIELD(16, 25) ; //!< UV Default value for V channel (For Mono Input Support) 1264 uint32_t Reserved410 : __CODEGEN_BITFIELD(26, 31) ; //!< Reserved 1265 }; 1266 uint32_t Value; 1267 } DW12; 1268 union 1269 { 1270 //!< DWORD 13 1271 struct 1272 { 1273 uint32_t AlphaDefaultValue : __CODEGEN_BITFIELD( 0, 9) ; //!< Alpha Default Value 1274 uint32_t Reserved426 : __CODEGEN_BITFIELD(10, 31) ; //!< Reserved 1275 }; 1276 uint32_t Value; 1277 } DW13; 1278 union 1279 { 1280 //!< DWORD 14 1281 struct 1282 { 1283 uint32_t ScalingFactorHeight : __CODEGEN_BITFIELD( 0, 20) ; //!< SCALING_FACTOR_HEIGHT 1284 uint32_t Reserved469 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 1285 }; 1286 uint32_t Value; 1287 } DW14; 1288 union 1289 { 1290 //!< DWORD 15 1291 struct 1292 { 1293 uint32_t ScalingFactorWidth : __CODEGEN_BITFIELD( 0, 20) ; //!< SCALING_FACTOR_WIDTH 1294 uint32_t Reserved501 : __CODEGEN_BITFIELD(21, 31) ; //!< Reserved 1295 }; 1296 uint32_t Value; 1297 } DW15; 1298 union 1299 { 1300 //!< DWORD 16 1301 struct 1302 { 1303 uint32_t Reserved512 ; //!< Reserved 1304 }; 1305 uint32_t Value; 1306 } DW16; 1307 union 1308 { 1309 //!< DWORD 17 1310 struct 1311 { 1312 uint32_t Reserved544 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 1313 uint32_t OutputFrameSurfaceBaseAddress : __CODEGEN_BITFIELD(12, 31) ; //!< Output Frame Surface Base Address 1314 }; 1315 uint32_t Value; 1316 } DW17; 1317 union 1318 { 1319 //!< DWORD 18 1320 struct 1321 { 1322 uint32_t OutputFrameSurfaceBaseAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< Output Frame Surface Base Address High 1323 uint32_t Reserved592 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 1324 }; 1325 uint32_t Value; 1326 } DW18; 1327 union 1328 { 1329 //!< DWORD 19 1330 struct 1331 { 1332 uint32_t Reserved608 : __CODEGEN_BITFIELD( 0, 0) ; //!< Reserved 1333 uint32_t OutputFrameSurfaceBaseAddressIndexToMemoryObjectControlStateMocsTables : __CODEGEN_BITFIELD( 1, 6) ; //!< Output Frame Surface Base Address - Index to Memory Object Control State (MOCS) Tables 1334 uint32_t OutputFrameSurfaceBaseAddressArbitrationPriorityControl : __CODEGEN_BITFIELD( 7, 8) ; //!< Output Frame Surface Base Address - Arbitration Priority Control 1335 uint32_t OutputFrameSurfaceBaseAddressMemoryCompressionEnable : __CODEGEN_BITFIELD( 9, 9) ; //!< Output Frame Surface Base Address - Memory Compression Enable 1336 uint32_t OutputFrameSurfaceBaseAddressMemoryCompressionMode : __CODEGEN_BITFIELD(10, 10) ; //!< OUTPUT_FRAME_SURFACE_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1337 uint32_t Reserved619 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 1338 uint32_t OutputFrameSurfaceBaseAddressRowStoreScratchBufferCacheSelect : __CODEGEN_BITFIELD(12, 12) ; //!< OUTPUT_FRAME_SURFACE_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1339 uint32_t OutputSurfaceTiledMode : __CODEGEN_BITFIELD(13, 14) ; //!< OUTPUT_SURFACE_TILED_MODE 1340 uint32_t Reserved623 : __CODEGEN_BITFIELD(15, 31) ; //!< Reserved 1341 }; 1342 uint32_t Value; 1343 } DW19; 1344 union 1345 { 1346 //!< DWORD 20 1347 struct 1348 { 1349 uint32_t Reserved640 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 1350 uint32_t AvsLineBufferSurfaceBaseAddress : __CODEGEN_BITFIELD(12, 31) ; //!< AVS Line Buffer Surface Base Address 1351 }; 1352 uint32_t Value; 1353 } DW20; 1354 union 1355 { 1356 //!< DWORD 21 1357 struct 1358 { 1359 uint32_t AvsLineBufferSurfaceBaseAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< AVS Line Buffer Surface Base Address High 1360 uint32_t Reserved688 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 1361 }; 1362 uint32_t Value; 1363 } DW21; 1364 union 1365 { 1366 //!< DWORD 22 1367 struct 1368 { 1369 uint32_t Reserved704 : __CODEGEN_BITFIELD( 0, 0) ; //!< Reserved 1370 uint32_t AvsLineBufferBaseAddressIndexToMemoryObjectControlStateMocsTables : __CODEGEN_BITFIELD( 1, 6) ; //!< AVS Line Buffer Base Address - Index to Memory Object Control State (MOCS) Tables 1371 uint32_t AvsLineBufferBaseAddressArbitrationPriorityControl : __CODEGEN_BITFIELD( 7, 8) ; //!< AVS Line Buffer Base Address - Arbitration Priority Control 1372 uint32_t AvsLineBufferBaseAddressMemoryCompressionEnable : __CODEGEN_BITFIELD( 9, 9) ; //!< AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 1373 uint32_t AvsLineBufferBaseAddressMemoryCompressionMode : __CODEGEN_BITFIELD(10, 10) ; //!< AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1374 uint32_t Reserved715 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 1375 uint32_t AvsLineBufferBaseAddressRowStoreScratchBufferCacheSelect : __CODEGEN_BITFIELD(12, 12) ; //!< AVS_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1376 uint32_t AvsLineBufferTiledMode : __CODEGEN_BITFIELD(13, 14) ; //!< AVS_LINE_BUFFER_TILED_MODE 1377 uint32_t Reserved719 : __CODEGEN_BITFIELD(15, 31) ; //!< Reserved 1378 }; 1379 uint32_t Value; 1380 } DW22; 1381 union 1382 { 1383 //!< DWORD 23 1384 struct 1385 { 1386 uint32_t Reserved736 : __CODEGEN_BITFIELD( 0, 11) ; //!< Reserved 1387 uint32_t IefLineBufferSurfaceBaseAddress : __CODEGEN_BITFIELD(12, 31) ; //!< IEF Line Buffer Surface Base Address 1388 }; 1389 uint32_t Value; 1390 } DW23; 1391 union 1392 { 1393 //!< DWORD 24 1394 struct 1395 { 1396 uint32_t IefLineBufferSurfaceBaseAddressHigh : __CODEGEN_BITFIELD( 0, 15) ; //!< IEF Line Buffer Surface Base Address High 1397 uint32_t Reserved784 : __CODEGEN_BITFIELD(16, 31) ; //!< Reserved 1398 }; 1399 uint32_t Value; 1400 } DW24; 1401 union 1402 { 1403 //!< DWORD 25 1404 struct 1405 { 1406 uint32_t Reserved800 : __CODEGEN_BITFIELD( 0, 0) ; //!< Reserved 1407 uint32_t IefLineBufferBaseAddressIndexToMemoryObjectControlStateMocsTables : __CODEGEN_BITFIELD( 1, 6) ; //!< IEF Line Buffer Base Address - Index to Memory Object Control State (MOCS) Tables 1408 uint32_t IefLineBufferBaseAddressArbitrationPriorityControl : __CODEGEN_BITFIELD( 7, 8) ; //!< IEF Line Buffer Base Address - Arbitration Priority Control 1409 uint32_t IefLineBufferBaseAddressMemoryCompressionEnable : __CODEGEN_BITFIELD( 9, 9) ; //!< IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 1410 uint32_t IefLineBufferBaseAddressMemoryCompressionMode : __CODEGEN_BITFIELD(10, 10) ; //!< IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1411 uint32_t Reserved811 : __CODEGEN_BITFIELD(11, 11) ; //!< Reserved 1412 uint32_t IefLineBufferBaseAddressRowStoreScratchBufferCacheSelect : __CODEGEN_BITFIELD(12, 12) ; //!< IEF_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1413 uint32_t IefLineBufferTiledMode : __CODEGEN_BITFIELD(13, 14) ; //!< IEF_LINE_BUFFER_TILED_MODE 1414 uint32_t Reserved815 : __CODEGEN_BITFIELD(15, 31) ; //!< Reserved 1415 }; 1416 uint32_t Value; 1417 } DW25; 1418 union 1419 { 1420 //!< DWORD 26 1421 struct 1422 { 1423 uint32_t Reserved832 ; //!< Reserved 1424 }; 1425 uint32_t Value; 1426 } DW26; 1427 union 1428 { 1429 //!< DWORD 27 1430 struct 1431 { 1432 uint32_t Reserved864 ; //!< Reserved 1433 }; 1434 uint32_t Value; 1435 } DW27; 1436 union 1437 { 1438 //!< DWORD 28 1439 struct 1440 { 1441 uint32_t Reserved896 ; //!< Reserved 1442 }; 1443 uint32_t Value; 1444 } DW28; 1445 union 1446 { 1447 //!< DWORD 29 1448 struct 1449 { 1450 uint32_t OutputSurfaceTileWalk : __CODEGEN_BITFIELD( 0, 0) ; //!< OUTPUT_SURFACE_TILE_WALK 1451 uint32_t OutputSurfaceTiled : __CODEGEN_BITFIELD( 1, 1) ; //!< OUTPUT_SURFACE_TILED 1452 uint32_t OutputSurfaceHalfPitchForChroma : __CODEGEN_BITFIELD( 2, 2) ; //!< Output Surface Half Pitch For Chroma 1453 uint32_t OutputSurfacePitch : __CODEGEN_BITFIELD( 3, 19) ; //!< Output Surface Pitch 1454 uint32_t Reserved948 : __CODEGEN_BITFIELD(20, 26) ; //!< Reserved 1455 uint32_t OutputSurfaceInterleaveChromaEnable : __CODEGEN_BITFIELD(27, 27) ; //!< Output Surface Interleave Chroma Enable 1456 uint32_t OutputSurfaceFormat : __CODEGEN_BITFIELD(28, 31) ; //!< Output Surface Format 1457 }; 1458 uint32_t Value; 1459 } DW29; 1460 union 1461 { 1462 //!< DWORD 30 1463 struct 1464 { 1465 uint32_t OutputSurfaceYOffsetForU : __CODEGEN_BITFIELD( 0, 13) ; //!< Output Surface Y Offset For U 1466 uint32_t Reserved974 : __CODEGEN_BITFIELD(14, 15) ; //!< Reserved 1467 uint32_t OutputSurfaceXOffsetForU : __CODEGEN_BITFIELD(16, 29) ; //!< Output Surface X Offset For U 1468 uint32_t Reserved990 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 1469 }; 1470 uint32_t Value; 1471 } DW30; 1472 union 1473 { 1474 //!< DWORD 31 1475 struct 1476 { 1477 uint32_t OutputSurfaceYOffsetForV : __CODEGEN_BITFIELD( 0, 13) ; //!< Output Surface Y Offset For V 1478 uint32_t Reserved1006 : __CODEGEN_BITFIELD(14, 15) ; //!< Reserved 1479 uint32_t OutputSurfaceXOffsetForV : __CODEGEN_BITFIELD(16, 29) ; //!< Output Surface X Offset For V 1480 uint32_t Reserved1022 : __CODEGEN_BITFIELD(30, 31) ; //!< Reserved 1481 }; 1482 uint32_t Value; 1483 } DW31; 1484 union 1485 { 1486 //!< DWORD 32 1487 struct 1488 { 1489 uint32_t Reserved1024 ; //!< Reserved 1490 }; 1491 uint32_t Value; 1492 } DW32; 1493 union 1494 { 1495 //!< DWORD 33 1496 struct 1497 { 1498 uint32_t Reserved1056 ; //!< Reserved 1499 }; 1500 uint32_t Value; 1501 } DW33; 1502 1503 //! \name Local enumerations 1504 1505 enum SUBOPCODEB 1506 { 1507 SUBOPCODEB_SFCSTATE = 1, //!< No additional details 1508 }; 1509 1510 enum SUBOPCODEA 1511 { 1512 SUBOPCODEA_COMMON = 0, //!< No additional details 1513 }; 1514 1515 enum MEDIA_COMMAND_OPCODE 1516 { 1517 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 1518 }; 1519 1520 enum PIPELINE 1521 { 1522 PIPELINE_MEDIA = 2, //!< No additional details 1523 }; 1524 1525 enum COMMAND_TYPE 1526 { 1527 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 1528 }; 1529 1530 //! \brief SFC_PIPE_MODE 1531 //! \details 1532 //! Note: for SFC Pipe mode set to VE-to-SFC AVS mode. 1533 //! IECP pipeline mode MUST be enabled. 1534 //! However, each sub-IECP feature can be turned on/off independently. 1535 enum SFC_PIPE_MODE 1536 { 1537 SFC_PIPE_MODE_UNNAMED0 = 0, //!< VD-to-SFC AVS 1538 SFC_PIPE_MODE_UNNAMED1 = 1, //!< VE-to-SFC AVS + IEF + Rotation 1539 SFC_PIPE_MODE_UNNAMED_4 = 4, //!< VE-to-SFC Integral Image 1540 }; 1541 1542 //! \brief SFC_INPUT_CHROMA_SUB_SAMPLING 1543 //! \details 1544 //! This field shall be programmed according to video modes used in VDBOX. 1545 //! NOTE: SFC supports progressive input and output only (Interlaced/MBAFF 1546 //! is not supported). 1547 //! <table border="1"> 1548 //! <tbody> 1549 //! <tr> 1550 //! <td>Video Mode</td> 1551 //! <td>Surface Format</td> 1552 //! <td>SFC Input Chroma Sub-Sampling</td> 1553 //! <td>VD/VE Input Ordering Mode</td> 1554 //! </tr> 1555 //! <tr> 1556 //! <td>VC1 w/o LF and w/o OS Note: VC1 LF applies for ILDB</td> 1557 //! <td>420 (NV12)</td> 1558 //! <td>1</td> 1559 //! <td>0</td> 1560 //! </tr> 1561 //! <tr> 1562 //! <td>VC1 w/ LF or w/ OS or w/ both Note: VC1 LF applies for ILDB</td> 1563 //! <td></td> 1564 //! <td>INVALID with SFC</td> 1565 //! <td>INVALID with SFC</td> 1566 //! </tr> 1567 //! <tr> 1568 //! <td>AVC w/o LF</td> 1569 //! <td>Monochrome</td> 1570 //! <td>0</td> 1571 //! <td>0</td> 1572 //! </tr> 1573 //! <tr> 1574 //! <td>AVC w/o LF</td> 1575 //! <td>420 (NV12)</td> 1576 //! <td>1</td> 1577 //! <td>0</td> 1578 //! </tr> 1579 //! <tr> 1580 //! <td>AVC with LF</td> 1581 //! <td>Monochrome</td> 1582 //! <td>0</td> 1583 //! <td>1</td> 1584 //! </tr> 1585 //! <tr> 1586 //! <td>AVC/VP8 with LF</td> 1587 //! <td>420 (NV12)</td> 1588 //! <td>1</td> 1589 //! <td>1</td> 1590 //! </tr> 1591 //! <tr> 1592 //! <td>VP8 w/o LF</td> 1593 //! <td>420 (NV12)</td> 1594 //! <td>1</td> 1595 //! <td>4</td> 1596 //! </tr> 1597 //! <tr> 1598 //! <td>JPEG (YUV Interleaved)</td> 1599 //! <td>Monochrome</td> 1600 //! <td>0</td> 1601 //! <td>2</td> 1602 //! </tr> 1603 //! <tr> 1604 //! <td>JPEG (YUV Interleaved)</td> 1605 //! <td>420</td> 1606 //! <td>1</td> 1607 //! <td>3</td> 1608 //! </tr> 1609 //! <tr> 1610 //! <td>JPEG (YUV Interleaved)</td> 1611 //! <td>422H_2Y</td> 1612 //! <td>2</td> 1613 //! <td>2</td> 1614 //! </tr> 1615 //! <tr> 1616 //! <td>JPEG (YUV Interleaved)</td> 1617 //! <td>422H_4Y</td> 1618 //! <td>2</td> 1619 //! <td>3</td> 1620 //! </tr> 1621 //! <tr> 1622 //! <td>JPEG (YUV Interleaved)</td> 1623 //! <td>444</td> 1624 //! <td>4</td> 1625 //! <td>2</td> 1626 //! </tr> 1627 //! </tbody> 1628 //! </table> 1629 //! This field shall be programmed according to Image enhancement modes used 1630 //! in VEBOX. 1631 //! 1632 //! <table border="1"> 1633 //! <tbody> 1634 //! <tr> 1635 //! <td>VEBOX MODE</td> 1636 //! <td>Surface Format</td> 1637 //! <td>SFC Input Chroma Sub Sampling</td> 1638 //! <td>VD/VE Input Ordering Mode</td> 1639 //! </tr> 1640 //! <tr> 1641 //! <td>Legacy DN/DI/IECP features</td> 1642 //! <td>Monochrome</td> 1643 //! <td>0</td> 1644 //! <td>0</td> 1645 //! </tr> 1646 //! <tr> 1647 //! <td>Legacy DN/DI/IECP features</td> 1648 //! <td>420 (NV12)</td> 1649 //! <td>1</td> 1650 //! <td>0</td> 1651 //! </tr> 1652 //! <tr> 1653 //! <td>Legacy DN/DI/IECP features</td> 1654 //! <td>422H</td> 1655 //! <td>2</td> 1656 //! <td>0</td> 1657 //! </tr> 1658 //! <tr> 1659 //! <td>Legacy DN/DI/IECP features</td> 1660 //! <td>444</td> 1661 //! <td>4</td> 1662 //! <td>0</td> 1663 //! </tr> 1664 //! <tr> 1665 //! <td>Capture/Camera pipe enabled(Demosaic)</td> 1666 //! <td>Monochrome</td> 1667 //! <td>0</td> 1668 //! <td>1</td> 1669 //! </tr> 1670 //! <tr> 1671 //! <td>Capture/Camera pipe enabled(Demosaic)</td> 1672 //! <td>420 (NV12)</td> 1673 //! <td>1</td> 1674 //! <td>1</td> 1675 //! </tr> 1676 //! <tr> 1677 //! <td>Capture/Camera pipe enabled(Demosaic)</td> 1678 //! <td>422H</td> 1679 //! <td>2</td> 1680 //! <td>1</td> 1681 //! </tr> 1682 //! <tr> 1683 //! <td>Capture/Camera pipe enabled(Demosaic)</td> 1684 //! <td>444</td> 1685 //! <td>4</td> 1686 //! <td>1</td> 1687 //! </tr> 1688 //! </tbody> 1689 //! </table> 1690 enum SFC_INPUT_CHROMA_SUB_SAMPLING 1691 { 1692 SFC_INPUT_CHROMA_SUB_SAMPLING_400 = 0, //!< SFC to insert UV channels 1693 SFC_INPUT_CHROMA_SUB_SAMPLING_420 = 1, //!< No additional details 1694 SFC_INPUT_CHROMA_SUB_SAMPLING_422HORIZONATAL = 2, //!< VD: 2:1:1 1695 SFC_INPUT_CHROMA_SUB_SAMPLING_4_4_4PROGRESSIVEINTERLEAVED = 4, //!< No additional details 1696 }; 1697 1698 //! \brief VDVE_INPUT_ORDERING_MODE 1699 //! \details 1700 //! <ul> 1701 //! <li>VD mode: (SFC pipe mode set as "0")</li> 1702 //! <li> VE mode: (pipe mode set as "1 and 4")</li> 1703 //! </ul> 1704 //! For values for each mode, please refer to the table below: 1705 enum VDVE_INPUT_ORDERING_MODE 1706 { 1707 VDVE_INPUT_ORDERING_MODE_UNNAMED0 = 0, //!< 16x16 block z-scan order - no shift 1708 //!< 8x4 block column order, 64 pixel column 1709 VDVE_INPUT_ORDERING_MODE_UNNAMED1 = 1, //!< 16x16 block z-scan order - 4 pixels shift upward 1710 //!< 4x4 block column order, 64 pixel column 1711 VDVE_INPUT_ORDERING_MODE_UNNAMED2 = 2, //!< 8x8 block jpeg z-scan order 1712 //!< 16x16 block jpeg z-scan order 1713 VDVE_INPUT_ORDERING_MODE_UNNAMED_4 = 4, //!< 16x16 block VP8 row-scan order - no shift 1714 }; 1715 1716 //! \brief OUTPUT_SURFACE_FORMAT_TYPE 1717 //! \details 1718 //! SFC output surface format type. 1719 enum OUTPUT_SURFACE_FORMAT_TYPE 1720 { 1721 OUTPUT_SURFACE_FORMAT_TYPE_AYUV = 0, //!< AYUV 4:4:4 (8:8:8:8 MSB-A:Y:U:V) 1722 OUTPUT_SURFACE_FORMAT_TYPE_A8B8G8R8 = 1, //!< RGBA8 4:4:4:4 (8:8:8:8 MSB-A:B:G:R) 1723 OUTPUT_SURFACE_FORMAT_TYPE_A2R10G10B10 = 2, //!< RGBA10 10:10:10:2 (2:10:10:10 MSB-A:R:G:B) 1724 OUTPUT_SURFACE_FORMAT_TYPE_R5G6B5 = 3, //!< RGB 5:6:5 (5:6:5 MSB-R:G:B) 1725 OUTPUT_SURFACE_FORMAT_TYPE_NV12 = 4, //!< Planar NV12 4:2:0 8-bit 1726 OUTPUT_SURFACE_FORMAT_TYPE_YUYV = 5, //!< Packed YUYV 4:2:2 8-bit 1727 OUTPUT_SURFACE_FORMAT_TYPE_UYVY = 6, //!< Packed UYVY 4:2:2 8-bit 1728 OUTPUT_SURFACE_FORMAT_TYPE_INTEGRAL_32 = 7, //!< Packed integral Image 32-bit 1729 OUTPUT_SURFACE_FORMAT_TYPE_INTEGRAL_64 = 8, //!< Packed integral Image 64-bit 1730 }; 1731 1732 //! \brief RGBA_CHANNEL_SWAP_ENABLE 1733 //! \details 1734 //! This bit should only be used with RGB output formats and CSC conversion 1735 //! is turned on. When this bit is set, 1736 //! the R and B channels are swapped into the output RGB channels as 1737 //! shown in the following table: 1738 //! <table> 1739 //! <tr> 1740 //! <th>Name</th> 1741 //! <th>Bits</th> 1742 //! <th>MSB Color Order</th> 1743 //! <th>Swapped</th> 1744 //! </tr> 1745 //! <tr> 1746 //! <td>RGBA8</td> 1747 //! <td>8:8:8:8</td> 1748 //! <td>A:B:G:R</td> 1749 //! <td>A:R:G:B</td> 1750 //! </tr> 1751 //! <tr> 1752 //! <td>RGBA10</td> 1753 //! <td>2:10:10:10</td> 1754 //! <td>A:R:G:B</td> 1755 //! <td>A:B:G:R</td> 1756 //! </tr> 1757 //! <tr> 1758 //! <td>RGB 5:6:5</td> 1759 //! <td>5:6:5</td> 1760 //! <td>R:G:B</td> 1761 //! <td>B:G:R</td> 1762 //! </tr> 1763 //! </table> 1764 enum RGBA_CHANNEL_SWAP_ENABLE 1765 { 1766 RGBA_CHANNEL_SWAP_ENABLE_UNNAMED0 = 0, //!< No additional details 1767 }; 1768 1769 //! \brief IEF_ENABLE 1770 //! \details 1771 //! Restriction : For Integral Image Mode and VD Mode, this field is 1772 //! Reserved and MBZ. 1773 enum IEF_ENABLE 1774 { 1775 IEF_ENABLE_DISABLE = 0, //!< IEF Filter is Disabled 1776 IEF_ENABLE_ENABLE = 1, //!< IEF Filter is Enabled 1777 }; 1778 1779 //! \brief IEF4SMOOTH_ENABLE_ 1780 //! \details 1781 //! Restriction : For Integral Image Mode, this field is Reserved and MBZ. 1782 enum IEF4SMOOTH_ENABLE_ 1783 { 1784 IEF4SMOOTH_ENABLE_UNNAMED0 = 0, //!< IEF is operating as a content adaptive detail filter based on 5x5 region. 1785 IEF4SMOOTH_ENABLE_UNNAMED1 = 1, //!< IEF is operating as a content adaptive smooth filter based on 3x3 region 1786 }; 1787 1788 //! \brief AVS_FILTER_MODE 1789 //! \details 1790 //! In VD-to-SFC mode, value of 1 is not allowed. 1791 enum AVS_FILTER_MODE 1792 { 1793 AVS_FILTER_MODE_5X5POLY_PHASEFILTERBILINEAR_ADAPTIVE = 0, //!< No additional details 1794 AVS_FILTER_MODE_8X8POLY_PHASEFILTERBILINEAR_ADAPTIVE = 1, //!< No additional details 1795 AVS_FILTER_MODE_BILINEARFILTERONLY = 2, //!< No additional details 1796 }; 1797 1798 enum ADAPTIVE_FILTER_FOR_ALL_CHANNELS 1799 { 1800 ADAPTIVE_FILTER_FOR_ALL_CHANNELS_DISABLEADAPTIVEFILTERONUVRBCHANNELS = 0, //!< No additional details 1801 ADAPTIVE_FILTER_FOR_ALL_CHANNELS_ENABLEADAPTIVEFILTERONUVRBCHANNELS = 1, //!< 8-tap Adaptive Filter Mode is on 1802 }; 1803 1804 enum AVS_SCALING_ENABLE 1805 { 1806 AVS_SCALING_ENABLE_DISABLE = 0, //!< The scaling factor is ignored and a scaling ratio of 1:1 is assumed. 1807 AVS_SCALING_ENABLE_ENABLE = 1, //!< No additional details 1808 }; 1809 1810 enum BYPASS_Y_ADAPTIVE_FILTERING 1811 { 1812 BYPASS_Y_ADAPTIVE_FILTERING_ENABLEYADAPTIVEFILTERING = 0, //!< No additional details 1813 BYPASS_Y_ADAPTIVE_FILTERING_DISABLEYADAPTIVEFILTERING = 1, //!< The Y direction will use Default Sharpness Level to blend between the smooth and sharp filters rather than the calculated value. 1814 }; 1815 1816 enum BYPASS_X_ADAPTIVE_FILTERING 1817 { 1818 BYPASS_X_ADAPTIVE_FILTERING_ENABLEXADAPTIVEFILTERING = 0, //!< No additional details 1819 BYPASS_X_ADAPTIVE_FILTERING_DISABLEXADAPTIVEFILTERING = 1, //!< The X direction will use Default Sharpness Level to blend between the smooth and sharp filters rather than the calculated value. 1820 }; 1821 1822 //! \brief ROTATION_MODE 1823 //! \details 1824 //! <p>SFC rotation (90, 180 and 270) should be set only on VEBox input mode 1825 //! and SFC output set to TileY.</p> 1826 //! Restriction: 1827 //! <ul> 1828 //! <li>For Integral Image Mode, this field is Reserved and MBZ.</li> 1829 //! <li>For VDBox Mode, this field is Reserved and MBZ.</li> 1830 //! <li>For linear or TileX SFC output, this field is Reserved and 1831 //! MBZ.</li> 1832 //! </ul> 1833 enum ROTATION_MODE 1834 { 1835 ROTATION_MODE_0_DEGREES = 0, //!< No additional details 1836 ROTATION_MODE_90CLOCKWISE = 1, //!< No additional details 1837 ROTATION_MODE_180CLOCKWISE = 2, //!< No additional details 1838 ROTATION_MODE_270CLOCKWISE = 3, //!< No additional details 1839 }; 1840 1841 //! \brief SCALING_FACTOR_HEIGHT 1842 //! \details 1843 //! <p>This field specifies the scaling ratio of the vertical sizes between 1844 //! the crop/source region and the scaled region. 1845 //! The destination pixel coordinate, y-axis, is multiplied with this 1846 //! scaling factor to mapping back to the source input pixel coordinate.</p> 1847 //! <p>The field specifies the ratio of crop height resolution/ scaled 1848 //! height resolution. This implies 1/<i>sf<sub>u</sub></i> in the 1849 //! equation.</p> 1850 enum SCALING_FACTOR_HEIGHT 1851 { 1852 SCALING_FACTOR_HEIGHT_UNNAMED0 = 0, //!< Reserved 1853 }; 1854 1855 //! \brief SCALING_FACTOR_WIDTH 1856 //! \details 1857 //! <p>This field specifies the scaling ratio of the horizontal sizes 1858 //! between the crop/source region and the scaled region. 1859 //! The destination pixel coordinate, x-axis, is multiplied with this 1860 //! scaling factor to mapping back to the source input pixel coordinate. 1861 //! </p> 1862 //! <p>The field specifies the ratio of crop width resolution/ scaled 1863 //! width resolution. This implies 1/<i>sf<sub>u</sub></i> in the equations 1864 //! above.</p> 1865 enum SCALING_FACTOR_WIDTH 1866 { 1867 SCALING_FACTOR_WIDTH_UNNAMED0 = 0, //!< Reserved 1868 }; 1869 1870 //! \brief OUTPUT_FRAME_SURFACE_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1871 //! \details 1872 //! <span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1873 //! font-size: 13.3333330154419px; line-height: normal;">Distinguishes 1874 //! vertical from horizontal compression. Please refer to vol1a</span><b 1875 //! style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1876 //! font-size: 13.3333330154419px; line-height: normal;">Memory Data Formats 1877 //! chapter - section</b><span style="color: rgb(35, 35, 35); font-family: 1878 //! Arial, sans-serif; font-size: 13.3333330154419px; line-height: 1879 //! normal;">media Memory Compression for more details.</span> 1880 enum OUTPUT_FRAME_SURFACE_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1881 { 1882 OUTPUT_FRAME_SURFACE_BASE_ADDRESS_MEMORY_COMPRESSION_MODE_VERTICALCOMPRESSION = 0, //!< No additional details 1883 OUTPUT_FRAME_SURFACE_BASE_ADDRESS_MEMORY_COMPRESSION_MODE_HORIZONTALCOMPRESSION = 1, //!< No additional details 1884 }; 1885 1886 //! \brief OUTPUT_FRAME_SURFACE_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1887 //! \details 1888 //! This must be set to 0 1889 enum OUTPUT_FRAME_SURFACE_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1890 { 1891 OUTPUT_FRAME_SURFACE_BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_DISABLE = 0, //!< This field must be programmed to 0 1892 }; 1893 1894 //! \brief OUTPUT_SURFACE_TILED_MODE 1895 //! \details 1896 //! <b>For Media Surfaces:</b> 1897 //! This field specifies the tiled resource mode. 1898 enum OUTPUT_SURFACE_TILED_MODE 1899 { 1900 OUTPUT_SURFACE_TILED_MODE_TRMODENONE = 0, //!< No tiled resource 1901 OUTPUT_SURFACE_TILED_MODE_TRMODETILEYF = 1, //!< 4KB tiled resources 1902 OUTPUT_SURFACE_TILED_MODE_TRMODETILEYS = 2, //!< 64KB tiled resources 1903 }; 1904 1905 //! \brief AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 1906 //! \details 1907 //! This bit control memory compression for this surface 1908 enum AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 1909 { 1910 AVS_LINE_BUFFER_BASE_ADDRESS_MEMORY_COMPRESSION_ENABLE_DISABLE = 0, //!< No additional details 1911 }; 1912 1913 //! \brief AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1914 //! \details 1915 //! <span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1916 //! font-size: 13.3333330154419px; line-height: normal;">Distinguishes 1917 //! vertical from horizontal compression. Please refer to vol1a </span><b 1918 //! style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1919 //! font-size: 13.3333330154419px; line-height: normal;">Memory Data Formats 1920 //! chapter - section</b><span style="color: rgb(35, 35, 35); font-family: 1921 //! Arial, sans-serif; font-size: 13.3333330154419px; line-height: 1922 //! normal;"> media Memory Compression for more details.</span> 1923 enum AVS_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1924 { 1925 AVS_LINE_BUFFER_BASE_ADDRESS_MEMORY_COMPRESSION_MODE_HORIZONTALCOMPRESSIONMODE = 0, //!< No additional details 1926 }; 1927 1928 //! \brief AVS_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1929 //! \details 1930 //! <span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1931 //! font-size: 13.3333330154419px; line-height: normal;">This field controls 1932 //! if the Row Store is going to store inside Media Cache (rowstore cache) 1933 //! or to LLC.</span> 1934 enum AVS_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1935 { 1936 AVS_LINE_BUFFER_BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_LLC = 0, //!< Buffer going to LLC 1937 }; 1938 1939 //! \brief AVS_LINE_BUFFER_TILED_MODE 1940 //! \details 1941 //! <b>For Media Surfaces:</b> 1942 //! This field specifies the tiled resource mode. 1943 enum AVS_LINE_BUFFER_TILED_MODE 1944 { 1945 AVS_LINE_BUFFER_TILED_MODE_TRMODENONE = 0, //!< No tiled resource 1946 AVS_LINE_BUFFER_TILED_MODE_TRMODETILEYF = 1, //!< 4KB tiled resources 1947 AVS_LINE_BUFFER_TILED_MODE_TRMODETILEYS = 2, //!< 64KB tiled resources 1948 }; 1949 1950 //! \brief IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 1951 //! \details 1952 //! <p><span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1953 //! font-size: 13.3333330154419px; line-height: normal;">Memory compression 1954 //! is not supported for this surface</span></p> 1955 //! <p><span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1956 //! font-size: 13.3333330154419px; line-height: normal;">Must be 1957 //! 0.</span></p> 1958 //! <p></p> 1959 enum IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_ENABLE 1960 { 1961 IEF_LINE_BUFFER_BASE_ADDRESS_MEMORY_COMPRESSION_ENABLE_DISABLE = 0, //!< No additional details 1962 }; 1963 1964 //! \brief IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1965 //! \details 1966 //! <span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1967 //! font-size: 13.3333330154419px; line-height: normal;">Distinguishes 1968 //! vertical from horizontal compression. Please refer to vol1a </span><b 1969 //! style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1970 //! font-size: 13.3333330154419px; line-height: normal;">Memory Data Formats 1971 //! chapter - section</b><span style="color: rgb(35, 35, 35); font-family: 1972 //! Arial, sans-serif; font-size: 13.3333330154419px; line-height: 1973 //! normal;"> media Memory Compression for more details.</span> 1974 enum IEF_LINE_BUFFER_BASE_ADDRESS__MEMORY_COMPRESSION_MODE 1975 { 1976 IEF_LINE_BUFFER_BASE_ADDRESS_MEMORY_COMPRESSION_MODE_UNNAMED0 = 0, //!< No additional details 1977 }; 1978 1979 //! \brief IEF_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1980 //! \details 1981 //! <span style="color: rgb(35, 35, 35); font-family: Arial, sans-serif; 1982 //! font-size: 13.3333330154419px; line-height: normal;">This field controls 1983 //! if the Row Store is going to store inside Media Cache (rowstore cache) 1984 //! or to LLC.</span> 1985 enum IEF_LINE_BUFFER_BASE_ADDRESS__ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT 1986 { 1987 IEF_LINE_BUFFER_BASE_ADDRESS_ROW_STORE_SCRATCH_BUFFER_CACHE_SELECT_LLC = 0, //!< Buffer going to LLC 1988 }; 1989 1990 //! \brief IEF_LINE_BUFFER_TILED_MODE 1991 //! \details 1992 //! <b>For Media Surfaces:</b> 1993 //! This field specifies the tiled resource mode. 1994 enum IEF_LINE_BUFFER_TILED_MODE 1995 { 1996 IEF_LINE_BUFFER_TILED_MODE_TRMODENONE = 0, //!< No tiled resource 1997 IEF_LINE_BUFFER_TILED_MODE_TRMODETILEYF = 1, //!< 4KB tiled resources 1998 IEF_LINE_BUFFER_TILED_MODE_TRMODETILEYS = 2, //!< 64KB tiled resources 1999 }; 2000 2001 //! \brief OUTPUT_SURFACE_TILE_WALK 2002 //! \details 2003 //! This field specifies the type of memory tiling (XMajor or YMajor) 2004 //! employed to tile this surface. See <i>Memory Interface Functions</i> for 2005 //! details on memory tiling and restrictions. 2006 enum OUTPUT_SURFACE_TILE_WALK 2007 { 2008 OUTPUT_SURFACE_TILE_WALK_TILEWALKXMAJOR = 0, //!< No additional details 2009 OUTPUT_SURFACE_TILE_WALK_TILEWALKYMAJOR = 1, //!< No additional details 2010 }; 2011 2012 //! \brief OUTPUT_SURFACE_TILED 2013 //! \details 2014 //! This field specifies whether the surface is tiled. 2015 enum OUTPUT_SURFACE_TILED 2016 { 2017 OUTPUT_SURFACE_TILED_FALSE = 0, //!< Linear 2018 OUTPUT_SURFACE_TILED_TRUE = 1, //!< Tiled 2019 }; 2020 2021 //! \name Initializations 2022 2023 //! \brief Explicit member initialization function 2024 SFC_STATE_CMD(); 2025 2026 static const size_t dwSize = 34; 2027 static const size_t byteSize = 136; 2028 }; 2029 2030 //! 2031 //! \brief SFC_AVS_LUMA_Coeff_Table 2032 //! \details 2033 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 2034 //! each frame once the lock request is granted. 2035 //! 2036 struct SFC_AVS_LUMA_Coeff_Table_CMD 2037 { 2038 union 2039 { 2040 //!< DWORD 0 2041 struct 2042 { 2043 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 2044 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2045 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 2046 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 2047 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 2048 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 2049 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 2050 }; 2051 uint32_t Value; 2052 } DW0; 2053 union 2054 { 2055 //!< DWORD 1 2056 struct 2057 { 2058 uint32_t Table0XFilterCoefficientN0 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 0X Filter Coefficient[[n],0] 2059 uint32_t Table0YFilterCoefficientN0 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 0Y Filter Coefficient[[n],0] 2060 uint32_t Table0XFilterCoefficientN1 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 0X Filter Coefficient[[n],1] 2061 uint32_t Table0YFilterCoefficientN1 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 0Y Filter Coefficient[[n],1] 2062 }; 2063 uint32_t Value; 2064 } DW1; 2065 union 2066 { 2067 //!< DWORD 2 2068 struct 2069 { 2070 uint32_t Table0XFilterCoefficientN2 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 0X Filter Coefficient[[n],2] 2071 uint32_t Table0YFilterCoefficientN2 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 0Y Filter Coefficient[[n],2] 2072 uint32_t Table0XFilterCoefficientN3 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 0X Filter Coefficient[[n],3] 2073 uint32_t Table0YFilterCoefficientN3 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 0Y Filter Coefficient[[n],3] 2074 }; 2075 uint32_t Value; 2076 } DW2; 2077 union 2078 { 2079 //!< DWORD 3 2080 struct 2081 { 2082 uint32_t Table0XFilterCoefficientN4 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 0X Filter Coefficient[[n],4] 2083 uint32_t Table0YFilterCoefficientN4 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 0Y Filter Coefficient[[n],4] 2084 uint32_t Table0XFilterCoefficientN5 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 0X Filter Coefficient[[n],5] 2085 uint32_t Table0YFilterCoefficientN5 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 0Y Filter Coefficient[[n],5] 2086 }; 2087 uint32_t Value; 2088 } DW3; 2089 union 2090 { 2091 //!< DWORD 4 2092 struct 2093 { 2094 uint32_t Table0XFilterCoefficientN6 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 0X Filter Coefficient[[n],6] 2095 uint32_t Table0YFilterCoefficientN6 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 0Y Filter Coefficient[[n],6] 2096 uint32_t Table0XFilterCoefficientN7 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 0X Filter Coefficient[[n],7] 2097 uint32_t Table0YFilterCoefficientN7 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 0Y Filter Coefficient[[n],7] 2098 }; 2099 uint32_t Value; 2100 } DW4; 2101 2102 uint32_t FilterCoefficients[124]; //!< Filter Coefficients 2103 2104 //! \name Local enumerations 2105 2106 enum SUBOPCODEB 2107 { 2108 SUBOPCODEB_SFCAVSLUMACOEFFTABLE = 5, //!< No additional details 2109 }; 2110 2111 enum SUBOPCODEA 2112 { 2113 SUBOPCODEA_COMMON = 0, //!< No additional details 2114 }; 2115 2116 enum MEDIA_COMMAND_OPCODE 2117 { 2118 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 2119 }; 2120 2121 enum PIPELINE 2122 { 2123 PIPELINE_MEDIA = 2, //!< No additional details 2124 }; 2125 2126 enum COMMAND_TYPE 2127 { 2128 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2129 }; 2130 2131 //! \name Initializations 2132 2133 //! \brief Explicit member initialization function 2134 SFC_AVS_LUMA_Coeff_Table_CMD(); 2135 2136 static const size_t dwSize = 129; 2137 static const size_t byteSize = 516; 2138 }; 2139 2140 //! 2141 //! \brief SFC_AVS_CHROMA_Coeff_Table 2142 //! \details 2143 //! This command is sent from VDBOX/VEBOX to SFC pipeline at the start of 2144 //! each frame once the lock request is granted. 2145 //! 2146 struct SFC_AVS_CHROMA_Coeff_Table_CMD 2147 { 2148 union 2149 { 2150 //!< DWORD 0 2151 struct 2152 { 2153 uint32_t DwordLength : __CODEGEN_BITFIELD( 0, 11) ; //!< DWORD_LENGTH 2154 uint32_t Reserved12 : __CODEGEN_BITFIELD(12, 15) ; //!< Reserved 2155 uint32_t Subopcodeb : __CODEGEN_BITFIELD(16, 20) ; //!< SUBOPCODEB 2156 uint32_t Subopcodea : __CODEGEN_BITFIELD(21, 22) ; //!< SUBOPCODEA 2157 uint32_t MediaCommandOpcode : __CODEGEN_BITFIELD(23, 26) ; //!< MEDIA_COMMAND_OPCODE 2158 uint32_t Pipeline : __CODEGEN_BITFIELD(27, 28) ; //!< PIPELINE 2159 uint32_t CommandType : __CODEGEN_BITFIELD(29, 31) ; //!< COMMAND_TYPE 2160 }; 2161 uint32_t Value; 2162 } DW0; 2163 union 2164 { 2165 //!< DWORD 1 2166 struct 2167 { 2168 uint32_t Table1XFilterCoefficientN2 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 1X Filter Coefficient[[n],2] 2169 uint32_t Table1YFilterCoefficientN2 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 1Y Filter Coefficient[[n],2] 2170 uint32_t Table1XFilterCoefficientN3 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 1X Filter Coefficient[[n],3] 2171 uint32_t Table1YFilterCoefficientN3 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 1Y Filter Coefficient[[n],3] 2172 }; 2173 uint32_t Value; 2174 } DW1; 2175 union 2176 { 2177 //!< DWORD 2 2178 struct 2179 { 2180 uint32_t Table1XFilterCoefficientN4 : __CODEGEN_BITFIELD( 0, 7) ; //!< Table 1X Filter Coefficient[[n],4] 2181 uint32_t Table1YFilterCoefficientN4 : __CODEGEN_BITFIELD( 8, 15) ; //!< Table 1Y Filter Coefficient[[n],4] 2182 uint32_t Table1XFilterCoefficientN5 : __CODEGEN_BITFIELD(16, 23) ; //!< Table 1X Filter Coefficient[[n],5] 2183 uint32_t Table1YFilterCoefficientN5 : __CODEGEN_BITFIELD(24, 31) ; //!< Table 1Y Filter Coefficient[[n],5] 2184 }; 2185 uint32_t Value; 2186 } DW2; 2187 2188 uint32_t FilterCoefficients[62]; //!< Filter Coefficients 2189 2190 //! \name Local enumerations 2191 2192 enum SUBOPCODEB 2193 { 2194 SUBOPCODEB_SFCAVSCHROMACOEFFTABLE = 6, //!< No additional details 2195 }; 2196 2197 enum SUBOPCODEA 2198 { 2199 SUBOPCODEA_COMMON = 0, //!< No additional details 2200 }; 2201 2202 enum MEDIA_COMMAND_OPCODE 2203 { 2204 MEDIA_COMMAND_OPCODE_MEDIAMISC = 10, //!< No additional details 2205 }; 2206 2207 enum PIPELINE 2208 { 2209 PIPELINE_MEDIA = 2, //!< No additional details 2210 }; 2211 2212 enum COMMAND_TYPE 2213 { 2214 COMMAND_TYPE_PARALLELVIDEOPIPE = 3, //!< No additional details 2215 }; 2216 2217 //! \name Initializations 2218 2219 //! \brief Explicit member initialization function 2220 SFC_AVS_CHROMA_Coeff_Table_CMD(); 2221 2222 static const size_t dwSize = 65; 2223 static const size_t byteSize = 260; 2224 }; 2225 2226 }; 2227 2228 #pragma pack() 2229 2230 #endif // __MHW_SFC_HWCMD_G9_X_H__