xref: /aosp_15_r20/external/coreboot/src/soc/amd/common/block/include/amdblocks/post_codes.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef AMD_BLOCK_POST_CODES_H
4 #define AMD_BLOCK_POST_CODES_H
5 
6 #define POSTCODE_AGESA_AMDINITRESET			0x37
7 #define POSTCODE_AGESA_AMDINITEARLY			0x38
8 
9 #define POSTCODE_ROMSTAGE_MAIN				0x40
10 
11 #define POSTCODE_AGESA_AMDINITPOST			0x40
12 #define POSTCODE_AGESA_AMDINITPOST_DONE			0x41
13 
14 #define POSTCODE_PSP_NOTIFY_DRAM			0x42
15 #define POSTCODE_PSP_NOTIFY_DRAM_DONE			0x43
16 
17 #define POSTCODE_ROMSTAGE_RUN_POSTCAR			0x44
18 
19 #define POSTCODE_PSP_LOAD_SMU				0x46
20 #define POSTCODE_AGESA_AMDINITENV			0x47
21 #define POSTCODE_AGESA_AMDS3LATERESTORE			0x48
22 
23 #define POSTCODE_AGESA_AMDINITRESUME			0x60
24 #define POSTCODE_AGESA_AMDINITRESUME_DONE		0x61
25 
26 #define POSTCODE_BOOTBLOCK_SOC_EARLY_INIT		0x90
27 
28 
29 #define POSTCODE_BOOTBLOCK_RESUME_ENTRY			0xb0
30 #define POSTCODE_BOOTBLOCK_PRE_C_ENTRY			0xa0
31 #define POSTCODE_BOOTBLOCK_PRE_C_DONE			0xa2
32 
33 #endif
34