1 /*
2  * Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
3  *
4  * SPDX-License-Identifier: BSD-3-Clause
5  *
6  * This file is limited to include the CSS firmware specific definitions for
7  * the first generation platforms based on the A75, N1 and V1 CPUs.
8  */
9 
10 #ifndef NRD1_CSS_FW_DEF1_H
11 #define NRD1_CSS_FW_DEF1_H
12 
13 #include <nrd_css_def1.h>
14 
15 /*******************************************************************************
16  * BL sizes
17  ******************************************************************************/
18 
19 #define NRD_CSS_BL1_RW_SIZE		UL(64 * 1024)	/* 64KB */
20 
21 #if TRUSTED_BOARD_BOOT
22 # define NRD_CSS_BL2_SIZE		UL(0x28000)
23 #else
24 # define NRD_CSS_BL2_SIZE		UL(0x14000)
25 #endif
26 
27 /*
28  * Since BL31 NOBITS overlays BL2 and BL1-RW, PLAT_ARM_MAX_BL31_SIZE is
29  * calculated using the current BL31 PROGBITS debug size plus the sizes of BL2
30  * and BL1-RW.
31  */
32 #define NRD_CSS_BL31_SIZE		UL(116 * 1024)	/* 116 KB */
33 
34 /*******************************************************************************
35  * Console config
36  ******************************************************************************/
37 
38 #define NRD_CSS_UART_CLK_IN_HZ		UL(7372800)
39 
40 /*******************************************************************************
41  * Watchdog config
42  ******************************************************************************/
43 
44 #define NRD_CSS_WDOG_TIMEOUT		UL(100)
45 
46 /*******************************************************************************
47  * Platform ID
48  ******************************************************************************/
49 
50 /* Platform ID address */
51 #define SSC_VERSION		(SSC_REG_BASE + SSC_VERSION_OFFSET)
52 #ifndef __ASSEMBLER__
53 /* SSC_VERSION related accessors */
54 /* Returns the part number of the platform */
55 #define GET_NRD_PART_NUM						\
56 			GET_SSC_VERSION_PART_NUM(mmio_read_32(SSC_VERSION))
57 /* Returns the configuration number of the platform */
58 #define GET_NRD_CONFIG_NUM						\
59 			GET_SSC_VERSION_CONFIG(mmio_read_32(SSC_VERSION))
60 #endif /* __ASSEMBLER__ */
61 
62 /*******************************************************************************
63  * MMU mappings
64  ******************************************************************************/
65 
66 #define NRD_CSS_PERIPH_MMAP(n)						\
67 		MAP_REGION_FLAT(					\
68 			NRD_REMOTE_CHIP_MEM_OFFSET(n) +			\
69 			NRD_CSS_PERIPH_BASE,				\
70 			NRD_CSS_PERIPH_SIZE,				\
71 			MT_DEVICE | MT_RW | MT_SECURE)
72 
73 #define NRD_CSS_SHARED_RAM_MMAP(n)					\
74 		MAP_REGION_FLAT(					\
75 			NRD_REMOTE_CHIP_MEM_OFFSET(n) +			\
76 			ARM_SHARED_RAM_BASE,				\
77 			ARM_SHARED_RAM_SIZE,				\
78 			MT_NON_CACHEABLE | MT_RW | MT_SECURE)
79 
80 #if SPM_MM
81 /*
82  * Stand-alone MM logs would be routed via secure UART. Define page table
83  * entry for secure UART which would be common to all platforms.
84  */
85 #define NRD_CSS_SECURE_UART_MMAP					\
86 		MAP_REGION_FLAT(					\
87 			NRD_CSS_SEC_UART_BASE,				\
88 			NRD_CSS_UART_SIZE,				\
89 			MT_DEVICE | MT_RW | MT_SECURE | MT_USER)
90 #endif
91 
92 #endif /* NRD_CSS_FW_DEF1_H */
93