1 /* 2 * Copyright (c) 2023, Arm Limited. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef JUNO_ETHOSN_TZMP1_DEF_H 8 #define JUNO_ETHOSN_TZMP1_DEF_H 9 10 #define JUNO_ETHOSN_TZC400_NSAID_FW_PROT 7 11 #define JUNO_ETHOSN_TZC400_NSAID_DATA_RW_PROT 8 12 #define JUNO_ETHOSN_TZC400_NSAID_DATA_RO_PROT 13 13 14 /* 0 is the default NSAID and is included in PLAT_ARM_TZC_NS_DEV_ACCESS */ 15 #define JUNO_ETHOSN_TZC400_NSAID_DATA_RW_NS 0 16 #define JUNO_ETHOSN_TZC400_NSAID_DATA_RO_NS 14 17 18 #define JUNO_ETHOSN_FW_TZC_PROT_DRAM2_SIZE UL(0x000400000) /* 4 MB */ 19 #define JUNO_ETHOSN_FW_TZC_PROT_DRAM2_BASE (ARM_DRAM2_BASE) 20 #define JUNO_ETHOSN_FW_TZC_PROT_DRAM2_END (ARM_DRAM2_BASE + \ 21 JUNO_ETHOSN_FW_TZC_PROT_DRAM2_SIZE \ 22 - 1U) 23 24 #define JUNO_ETHOSN_DATA_TZC_PROT_DRAM2_SIZE UL(0x004000000) /* 64 MB */ 25 #define JUNO_ETHOSN_DATA_TZC_PROT_DRAM2_BASE ( \ 26 JUNO_ETHOSN_FW_TZC_PROT_DRAM2_END + 1) 27 #define JUNO_ETHOSN_DATA_TZC_PROT_DRAM2_END ( \ 28 JUNO_ETHOSN_DATA_TZC_PROT_DRAM2_BASE + \ 29 JUNO_ETHOSN_DATA_TZC_PROT_DRAM2_SIZE - 1U) 30 31 #define JUNO_ETHOSN_NS_DRAM2_BASE (JUNO_ETHOSN_DATA_TZC_PROT_DRAM2_END + \ 32 1) 33 #define JUNO_ETHOSN_NS_DRAM2_END (ARM_DRAM2_END) 34 #define JUNO_ETHOSN_NS_DRAM2_SIZE (ARM_DRAM2_SIZE - \ 35 JUNO_ETHOSN_DATA_TZC_PROT_DRAM2_END) 36 37 #define JUNO_FW_TZC_PROT_ACCESS \ 38 (TZC_REGION_ACCESS_RDWR(JUNO_ETHOSN_TZC400_NSAID_FW_PROT)) 39 #define JUNO_DATA_TZC_PROT_ACCESS \ 40 (TZC_REGION_ACCESS_RDWR(JUNO_ETHOSN_TZC400_NSAID_DATA_RW_PROT) | \ 41 TZC_REGION_ACCESS_RD(JUNO_ETHOSN_TZC400_NSAID_DATA_RO_PROT)) 42 #define JUNO_DATA_TZC_NS_ACCESS \ 43 (PLAT_ARM_TZC_NS_DEV_ACCESS | \ 44 TZC_REGION_ACCESS_RD(JUNO_ETHOSN_TZC400_NSAID_DATA_RO_NS)) 45 46 #define JUNO_ETHOSN_TZMP_REGIONS_DEF \ 47 { ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END + ARM_L1_GPT_SIZE, \ 48 TZC_REGION_S_RDWR, 0 }, \ 49 { ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_END, \ 50 ARM_TZC_NS_DRAM_S_ACCESS, JUNO_DATA_TZC_NS_ACCESS}, \ 51 { JUNO_ETHOSN_FW_TZC_PROT_DRAM2_BASE, \ 52 JUNO_ETHOSN_FW_TZC_PROT_DRAM2_END, \ 53 TZC_REGION_S_RDWR, JUNO_FW_TZC_PROT_ACCESS }, \ 54 { JUNO_ETHOSN_DATA_TZC_PROT_DRAM2_BASE, \ 55 JUNO_ETHOSN_DATA_TZC_PROT_DRAM2_END, \ 56 TZC_REGION_S_NONE, JUNO_DATA_TZC_PROT_ACCESS }, \ 57 { JUNO_ETHOSN_NS_DRAM2_BASE, JUNO_ETHOSN_NS_DRAM2_END, \ 58 ARM_TZC_NS_DRAM_S_ACCESS, JUNO_DATA_TZC_NS_ACCESS} 59 60 #endif /* JUNO_ETHOSN_TZMP1_DEF_H */ 61