Searched defs:HCPPakHWTileSizeRecord (Results 1 – 1 of 1) sorted by relevance
141 struct HCPPakHWTileSizeRecord struct143 uint32_t Address_31_0; //DW0144 uint32_t Address_63_32; //DW1145 … //DW2 Bitstream length per tile; includes header len in first tile, and tail len in last tile146 … //DW3 In Vp9, it is used for back annotation, In Hevc, it is the mmio register bytecountNoHeader147 uint32_t AddressOffset; //DW4 Cacheline offset151 ByteOffset : 6, //[5:0] // Byte offset within cacheline152 Res_95_70 : 26; //[31:6]154 uint32_t Hcp_Bs_SE_Bitcount_Tile; //DW6 Bitstream size for syntax element per tile155 uint32_t Hcp_Cabac_BinCnt_Tile; //DW7 Bitstream size for syntax element per tile[all …]