1 /**
2 ******************************************************************************
3 * @file stm32l4xx_hal_adc_ex.c
4 * @author MCD Application Team
5 * @brief This file provides firmware functions to manage the following
6 * functionalities of the Analog to Digital Convertor (ADC)
7 * peripheral:
8 * + Operation functions
9 * ++ Start, stop, get result of conversions of ADC group injected,
10 * using 2 possible modes: polling, interruption.
11 * ++ Calibration
12 * +++ ADC automatic self-calibration
13 * +++ Calibration factors get or set
14 * ++ Multimode feature when available
15 * + Control functions
16 * ++ Channels configuration on ADC group injected
17 * + State functions
18 * ++ ADC group injected contexts queue management
19 * Other functions (generic functions) are available in file
20 * "stm32l4xx_hal_adc.c".
21 *
22 @verbatim
23 [..]
24 (@) Sections "ADC peripheral features" and "How to use this driver" are
25 available in file of generic functions "stm32l4xx_hal_adc.c".
26 [..]
27 @endverbatim
28 ******************************************************************************
29 * @attention
30 *
31 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
32 * All rights reserved.</center></h2>
33 *
34 * This software component is licensed by ST under BSD 3-Clause license,
35 * the "License"; You may not use this file except in compliance with the
36 * License. You may obtain a copy of the License at:
37 * opensource.org/licenses/BSD-3-Clause
38 *
39 ******************************************************************************
40 */
41
42 /* Includes ------------------------------------------------------------------*/
43 #include "stm32l4xx_hal.h"
44
45 /** @addtogroup STM32L4xx_HAL_Driver
46 * @{
47 */
48
49 /** @defgroup ADCEx ADCEx
50 * @brief ADC Extended HAL module driver
51 * @{
52 */
53
54 #ifdef HAL_ADC_MODULE_ENABLED
55
56 /* Private typedef -----------------------------------------------------------*/
57 /* Private define ------------------------------------------------------------*/
58
59 /** @defgroup ADCEx_Private_Constants ADC Extended Private Constants
60 * @{
61 */
62
63 #define ADC_JSQR_FIELDS ((ADC_JSQR_JL | ADC_JSQR_JEXTSEL | ADC_JSQR_JEXTEN |\
64 ADC_JSQR_JSQ1 | ADC_JSQR_JSQ2 |\
65 ADC_JSQR_JSQ3 | ADC_JSQR_JSQ4 )) /*!< ADC_JSQR fields of parameters that can be updated anytime
66 once the ADC is enabled */
67
68 /* Fixed timeout value for ADC calibration. */
69 /* Values defined to be higher than worst cases: maximum ratio between ADC */
70 /* and CPU clock frequencies. */
71 /* Example of profile low frequency : ADC frequency at 31.25kHz (ADC clock */
72 /* source PLL SAI 8MHz, ADC clock prescaler 256), CPU frequency 80MHz. */
73 /* Calibration time max = 116 / fADC (refer to datasheet) */
74 /* = 296 960 CPU cycles */
75 #define ADC_CALIBRATION_TIMEOUT (296960UL) /*!< ADC calibration time-out value (unit: CPU cycles) */
76
77 /**
78 * @}
79 */
80
81 /* Private macro -------------------------------------------------------------*/
82 /* Private variables ---------------------------------------------------------*/
83 /* Private function prototypes -----------------------------------------------*/
84 /* Exported functions --------------------------------------------------------*/
85
86 /** @defgroup ADCEx_Exported_Functions ADC Extended Exported Functions
87 * @{
88 */
89
90 /** @defgroup ADCEx_Exported_Functions_Group1 Extended Input and Output operation functions
91 * @brief Extended IO operation functions
92 *
93 @verbatim
94 ===============================================================================
95 ##### IO operation functions #####
96 ===============================================================================
97 [..] This section provides functions allowing to:
98
99 (+) Perform the ADC self-calibration for single or differential ending.
100 (+) Get calibration factors for single or differential ending.
101 (+) Set calibration factors for single or differential ending.
102
103 (+) Start conversion of ADC group injected.
104 (+) Stop conversion of ADC group injected.
105 (+) Poll for conversion complete on ADC group injected.
106 (+) Get result of ADC group injected channel conversion.
107 (+) Start conversion of ADC group injected and enable interruptions.
108 (+) Stop conversion of ADC group injected and disable interruptions.
109
110 (+) When multimode feature is available, start multimode and enable DMA transfer.
111 (+) Stop multimode and disable ADC DMA transfer.
112 (+) Get result of multimode conversion.
113
114 @endverbatim
115 * @{
116 */
117
118 /**
119 * @brief Perform an ADC automatic self-calibration
120 * Calibration prerequisite: ADC must be disabled (execute this
121 * function before HAL_ADC_Start() or after HAL_ADC_Stop() ).
122 * @param hadc ADC handle
123 * @param SingleDiff Selection of single-ended or differential input
124 * This parameter can be one of the following values:
125 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
126 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
127 * @retval HAL status
128 */
HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef * hadc,uint32_t SingleDiff)129 HAL_StatusTypeDef HAL_ADCEx_Calibration_Start(ADC_HandleTypeDef *hadc, uint32_t SingleDiff)
130 {
131 HAL_StatusTypeDef tmp_hal_status;
132 __IO uint32_t wait_loop_index = 0UL;
133
134 /* Check the parameters */
135 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
136 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
137
138 /* Process locked */
139 __HAL_LOCK(hadc);
140
141 /* Calibration prerequisite: ADC must be disabled. */
142
143 /* Disable the ADC (if not already disabled) */
144 tmp_hal_status = ADC_Disable(hadc);
145
146 /* Check if ADC is effectively disabled */
147 if (tmp_hal_status == HAL_OK)
148 {
149 /* Set ADC state */
150 ADC_STATE_CLR_SET(hadc->State,
151 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
152 HAL_ADC_STATE_BUSY_INTERNAL);
153
154 /* Start ADC calibration in mode single-ended or differential */
155 LL_ADC_StartCalibration(hadc->Instance, SingleDiff);
156
157 /* Wait for calibration completion */
158 while (LL_ADC_IsCalibrationOnGoing(hadc->Instance) != 0UL)
159 {
160 wait_loop_index++;
161 if (wait_loop_index >= ADC_CALIBRATION_TIMEOUT)
162 {
163 /* Update ADC state machine to error */
164 ADC_STATE_CLR_SET(hadc->State,
165 HAL_ADC_STATE_BUSY_INTERNAL,
166 HAL_ADC_STATE_ERROR_INTERNAL);
167
168 /* Process unlocked */
169 __HAL_UNLOCK(hadc);
170
171 return HAL_ERROR;
172 }
173 }
174
175 /* Set ADC state */
176 ADC_STATE_CLR_SET(hadc->State,
177 HAL_ADC_STATE_BUSY_INTERNAL,
178 HAL_ADC_STATE_READY);
179 }
180 else
181 {
182 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
183
184 /* Note: No need to update variable "tmp_hal_status" here: already set */
185 /* to state "HAL_ERROR" by function disabling the ADC. */
186 }
187
188 /* Process unlocked */
189 __HAL_UNLOCK(hadc);
190
191 /* Return function status */
192 return tmp_hal_status;
193 }
194
195 /**
196 * @brief Get the calibration factor.
197 * @param hadc ADC handle.
198 * @param SingleDiff This parameter can be only:
199 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
200 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
201 * @retval Calibration value.
202 */
HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef * hadc,uint32_t SingleDiff)203 uint32_t HAL_ADCEx_Calibration_GetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff)
204 {
205 /* Check the parameters */
206 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
207 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
208
209 /* Return the selected ADC calibration value */
210 return LL_ADC_GetCalibrationFactor(hadc->Instance, SingleDiff);
211 }
212
213 /**
214 * @brief Set the calibration factor to overwrite automatic conversion result.
215 * ADC must be enabled and no conversion is ongoing.
216 * @param hadc ADC handle
217 * @param SingleDiff This parameter can be only:
218 * @arg @ref ADC_SINGLE_ENDED Channel in mode input single ended
219 * @arg @ref ADC_DIFFERENTIAL_ENDED Channel in mode input differential ended
220 * @param CalibrationFactor Calibration factor (coded on 7 bits maximum)
221 * @retval HAL state
222 */
HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef * hadc,uint32_t SingleDiff,uint32_t CalibrationFactor)223 HAL_StatusTypeDef HAL_ADCEx_Calibration_SetValue(ADC_HandleTypeDef *hadc, uint32_t SingleDiff, uint32_t CalibrationFactor)
224 {
225 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
226 uint32_t tmp_adc_is_conversion_on_going_regular;
227 uint32_t tmp_adc_is_conversion_on_going_injected;
228
229 /* Check the parameters */
230 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
231 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(SingleDiff));
232 assert_param(IS_ADC_CALFACT(CalibrationFactor));
233
234 /* Process locked */
235 __HAL_LOCK(hadc);
236
237 /* Verification of hardware constraints before modifying the calibration */
238 /* factors register: ADC must be enabled, no conversion on going. */
239 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
240 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
241
242 if ((LL_ADC_IsEnabled(hadc->Instance) != 0UL)
243 && (tmp_adc_is_conversion_on_going_regular == 0UL)
244 && (tmp_adc_is_conversion_on_going_injected == 0UL)
245 )
246 {
247 /* Set the selected ADC calibration value */
248 LL_ADC_SetCalibrationFactor(hadc->Instance, SingleDiff, CalibrationFactor);
249 }
250 else
251 {
252 /* Update ADC state machine */
253 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
254 /* Update ADC error code */
255 SET_BIT(hadc->ErrorCode, HAL_ADC_ERROR_INTERNAL);
256
257 /* Update ADC state machine to error */
258 tmp_hal_status = HAL_ERROR;
259 }
260
261 /* Process unlocked */
262 __HAL_UNLOCK(hadc);
263
264 /* Return function status */
265 return tmp_hal_status;
266 }
267
268 /**
269 * @brief Enable ADC, start conversion of injected group.
270 * @note Interruptions enabled in this function: None.
271 * @note Case of multimode enabled when multimode feature is available:
272 * HAL_ADCEx_InjectedStart() API must be called for ADC slave first,
273 * then for ADC master.
274 * For ADC slave, ADC is enabled only (conversion is not started).
275 * For ADC master, ADC is enabled and multimode conversion is started.
276 * @param hadc ADC handle.
277 * @retval HAL status
278 */
HAL_ADCEx_InjectedStart(ADC_HandleTypeDef * hadc)279 HAL_StatusTypeDef HAL_ADCEx_InjectedStart(ADC_HandleTypeDef *hadc)
280 {
281 HAL_StatusTypeDef tmp_hal_status;
282 uint32_t tmp_config_injected_queue;
283 #if defined(ADC_MULTIMODE_SUPPORT)
284 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
285 #endif
286
287 /* Check the parameters */
288 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
289
290 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
291 {
292 return HAL_BUSY;
293 }
294 else
295 {
296 /* In case of software trigger detection enabled, JQDIS must be set
297 (which can be done only if ADSTART and JADSTART are both cleared).
298 If JQDIS is not set at that point, returns an error
299 - since software trigger detection is disabled. User needs to
300 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
301 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
302 the queue is empty */
303 tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
304
305 if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
306 && (tmp_config_injected_queue == 0UL)
307 )
308 {
309 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
310 return HAL_ERROR;
311 }
312
313 /* Process locked */
314 __HAL_LOCK(hadc);
315
316 /* Enable the ADC peripheral */
317 tmp_hal_status = ADC_Enable(hadc);
318
319 /* Start conversion if ADC is effectively enabled */
320 if (tmp_hal_status == HAL_OK)
321 {
322 /* Check if a regular conversion is ongoing */
323 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
324 {
325 /* Reset ADC error code field related to injected conversions only */
326 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
327 }
328 else
329 {
330 /* Set ADC error code to none */
331 ADC_CLEAR_ERRORCODE(hadc);
332 }
333
334 /* Set ADC state */
335 /* - Clear state bitfield related to injected group conversion results */
336 /* - Set state bitfield related to injected operation */
337 ADC_STATE_CLR_SET(hadc->State,
338 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
339 HAL_ADC_STATE_INJ_BUSY);
340
341 #if defined(ADC_MULTIMODE_SUPPORT)
342 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
343 - if ADC instance is master or if multimode feature is not available
344 - if multimode setting is disabled (ADC instance slave in independent mode) */
345 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
346 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
347 )
348 {
349 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
350 }
351 #endif
352
353 /* Clear ADC group injected group conversion flag */
354 /* (To ensure of no unknown state from potential previous ADC operations) */
355 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
356
357 /* Process unlocked */
358 /* Unlock before starting ADC conversions: in case of potential */
359 /* interruption, to let the process to ADC IRQ Handler. */
360 __HAL_UNLOCK(hadc);
361
362 /* Enable conversion of injected group, if automatic injected conversion */
363 /* is disabled. */
364 /* If software start has been selected, conversion starts immediately. */
365 /* If external trigger has been selected, conversion will start at next */
366 /* trigger event. */
367 /* Case of multimode enabled (when multimode feature is available): */
368 /* if ADC is slave, */
369 /* - ADC is enabled only (conversion is not started), */
370 /* - if multimode only concerns regular conversion, ADC is enabled */
371 /* and conversion is started. */
372 /* If ADC is master or independent, */
373 /* - ADC is enabled and conversion is started. */
374 #if defined(ADC_MULTIMODE_SUPPORT)
375 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
376 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
377 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
378 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
379 )
380 {
381 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
382 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
383 {
384 LL_ADC_INJ_StartConversion(hadc->Instance);
385 }
386 }
387 else
388 {
389 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
390 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
391 }
392 #else
393 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
394 {
395 /* Start ADC group injected conversion */
396 LL_ADC_INJ_StartConversion(hadc->Instance);
397 }
398 #endif
399
400 }
401 else
402 {
403 /* Process unlocked */
404 __HAL_UNLOCK(hadc);
405 }
406
407 /* Return function status */
408 return tmp_hal_status;
409 }
410 }
411
412 /**
413 * @brief Stop conversion of injected channels. Disable ADC peripheral if
414 * no regular conversion is on going.
415 * @note If ADC must be disabled and if conversion is on going on
416 * regular group, function HAL_ADC_Stop must be used to stop both
417 * injected and regular groups, and disable the ADC.
418 * @note If injected group mode auto-injection is enabled,
419 * function HAL_ADC_Stop must be used.
420 * @note In case of multimode enabled (when multimode feature is available),
421 * HAL_ADCEx_InjectedStop() must be called for ADC master first, then for ADC slave.
422 * For ADC master, conversion is stopped and ADC is disabled.
423 * For ADC slave, ADC is disabled only (conversion stop of ADC master
424 * has already stopped conversion of ADC slave).
425 * @param hadc ADC handle.
426 * @retval HAL status
427 */
HAL_ADCEx_InjectedStop(ADC_HandleTypeDef * hadc)428 HAL_StatusTypeDef HAL_ADCEx_InjectedStop(ADC_HandleTypeDef *hadc)
429 {
430 HAL_StatusTypeDef tmp_hal_status;
431
432 /* Check the parameters */
433 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
434
435 /* Process locked */
436 __HAL_LOCK(hadc);
437
438 /* 1. Stop potential conversion on going on injected group only. */
439 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
440
441 /* Disable ADC peripheral if injected conversions are effectively stopped */
442 /* and if no conversion on regular group is on-going */
443 if (tmp_hal_status == HAL_OK)
444 {
445 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
446 {
447 /* 2. Disable the ADC peripheral */
448 tmp_hal_status = ADC_Disable(hadc);
449
450 /* Check if ADC is effectively disabled */
451 if (tmp_hal_status == HAL_OK)
452 {
453 /* Set ADC state */
454 ADC_STATE_CLR_SET(hadc->State,
455 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
456 HAL_ADC_STATE_READY);
457 }
458 }
459 /* Conversion on injected group is stopped, but ADC not disabled since */
460 /* conversion on regular group is still running. */
461 else
462 {
463 /* Set ADC state */
464 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
465 }
466 }
467
468 /* Process unlocked */
469 __HAL_UNLOCK(hadc);
470
471 /* Return function status */
472 return tmp_hal_status;
473 }
474
475 /**
476 * @brief Wait for injected group conversion to be completed.
477 * @param hadc ADC handle
478 * @param Timeout Timeout value in millisecond.
479 * @note Depending on hadc->Init.EOCSelection, JEOS or JEOC is
480 * checked and cleared depending on AUTDLY bit status.
481 * @retval HAL status
482 */
HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef * hadc,uint32_t Timeout)483 HAL_StatusTypeDef HAL_ADCEx_InjectedPollForConversion(ADC_HandleTypeDef *hadc, uint32_t Timeout)
484 {
485 uint32_t tickstart;
486 uint32_t tmp_Flag_End;
487 uint32_t tmp_adc_inj_is_trigger_source_sw_start;
488 uint32_t tmp_adc_reg_is_trigger_source_sw_start;
489 uint32_t tmp_cfgr;
490 #if defined(ADC_MULTIMODE_SUPPORT)
491 const ADC_TypeDef *tmpADC_Master;
492 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
493 #endif
494
495 /* Check the parameters */
496 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
497
498 /* If end of sequence selected */
499 if (hadc->Init.EOCSelection == ADC_EOC_SEQ_CONV)
500 {
501 tmp_Flag_End = ADC_FLAG_JEOS;
502 }
503 else /* end of conversion selected */
504 {
505 tmp_Flag_End = ADC_FLAG_JEOC;
506 }
507
508 /* Get timeout */
509 tickstart = HAL_GetTick();
510
511 /* Wait until End of Conversion or Sequence flag is raised */
512 while ((hadc->Instance->ISR & tmp_Flag_End) == 0UL)
513 {
514 /* Check if timeout is disabled (set to infinite wait) */
515 if (Timeout != HAL_MAX_DELAY)
516 {
517 if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0UL))
518 {
519 /* Update ADC state machine to timeout */
520 SET_BIT(hadc->State, HAL_ADC_STATE_TIMEOUT);
521
522 /* Process unlocked */
523 __HAL_UNLOCK(hadc);
524
525 return HAL_TIMEOUT;
526 }
527 }
528 }
529
530 /* Retrieve ADC configuration */
531 tmp_adc_inj_is_trigger_source_sw_start = LL_ADC_INJ_IsTriggerSourceSWStart(hadc->Instance);
532 tmp_adc_reg_is_trigger_source_sw_start = LL_ADC_REG_IsTriggerSourceSWStart(hadc->Instance);
533 /* Get relevant register CFGR in ADC instance of ADC master or slave */
534 /* in function of multimode state (for devices with multimode */
535 /* available). */
536 #if defined(ADC_MULTIMODE_SUPPORT)
537 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
538 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
539 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
540 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
541 )
542 {
543 tmp_cfgr = READ_REG(hadc->Instance->CFGR);
544 }
545 else
546 {
547 tmpADC_Master = __LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance);
548 tmp_cfgr = READ_REG(tmpADC_Master->CFGR);
549 }
550 #else
551 tmp_cfgr = READ_REG(hadc->Instance->CFGR);
552 #endif
553
554 /* Update ADC state machine */
555 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_EOC);
556
557 /* Determine whether any further conversion upcoming on group injected */
558 /* by external trigger or by automatic injected conversion */
559 /* from group regular. */
560 if ((tmp_adc_inj_is_trigger_source_sw_start != 0UL) ||
561 ((READ_BIT(tmp_cfgr, ADC_CFGR_JAUTO) == 0UL) &&
562 ((tmp_adc_reg_is_trigger_source_sw_start != 0UL) &&
563 (READ_BIT(tmp_cfgr, ADC_CFGR_CONT) == 0UL))))
564 {
565 /* Check whether end of sequence is reached */
566 if (__HAL_ADC_GET_FLAG(hadc, ADC_FLAG_JEOS))
567 {
568 /* Particular case if injected contexts queue is enabled: */
569 /* when the last context has been fully processed, JSQR is reset */
570 /* by the hardware. Even if no injected conversion is planned to come */
571 /* (queue empty, triggers are ignored), it can start again */
572 /* immediately after setting a new context (JADSTART is still set). */
573 /* Therefore, state of HAL ADC injected group is kept to busy. */
574 if (READ_BIT(tmp_cfgr, ADC_CFGR_JQM) == 0UL)
575 {
576 /* Set ADC state */
577 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
578
579 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) == 0UL)
580 {
581 SET_BIT(hadc->State, HAL_ADC_STATE_READY);
582 }
583 }
584 }
585 }
586
587 /* Clear polled flag */
588 if (tmp_Flag_End == ADC_FLAG_JEOS)
589 {
590 /* Clear end of sequence JEOS flag of injected group if low power feature */
591 /* "LowPowerAutoWait " is disabled, to not interfere with this feature. */
592 /* For injected groups, no new conversion will start before JEOS is */
593 /* cleared. */
594 if (READ_BIT(tmp_cfgr, ADC_CFGR_AUTDLY) == 0UL)
595 {
596 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
597 }
598 }
599 else
600 {
601 __HAL_ADC_CLEAR_FLAG(hadc, ADC_FLAG_JEOC);
602 }
603
604 /* Return API HAL status */
605 return HAL_OK;
606 }
607
608 /**
609 * @brief Enable ADC, start conversion of injected group with interruption.
610 * @note Interruptions enabled in this function according to initialization
611 * setting : JEOC (end of conversion) or JEOS (end of sequence)
612 * @note Case of multimode enabled (when multimode feature is enabled):
613 * HAL_ADCEx_InjectedStart_IT() API must be called for ADC slave first,
614 * then for ADC master.
615 * For ADC slave, ADC is enabled only (conversion is not started).
616 * For ADC master, ADC is enabled and multimode conversion is started.
617 * @param hadc ADC handle.
618 * @retval HAL status.
619 */
HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef * hadc)620 HAL_StatusTypeDef HAL_ADCEx_InjectedStart_IT(ADC_HandleTypeDef *hadc)
621 {
622 HAL_StatusTypeDef tmp_hal_status;
623 uint32_t tmp_config_injected_queue;
624 #if defined(ADC_MULTIMODE_SUPPORT)
625 uint32_t tmp_multimode_config = LL_ADC_GetMultimode(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
626 #endif
627
628 /* Check the parameters */
629 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
630
631 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) != 0UL)
632 {
633 return HAL_BUSY;
634 }
635 else
636 {
637 /* In case of software trigger detection enabled, JQDIS must be set
638 (which can be done only if ADSTART and JADSTART are both cleared).
639 If JQDIS is not set at that point, returns an error
640 - since software trigger detection is disabled. User needs to
641 resort to HAL_ADCEx_DisableInjectedQueue() API to set JQDIS.
642 - or (if JQDIS is intentionally reset) since JEXTEN = 0 which means
643 the queue is empty */
644 tmp_config_injected_queue = READ_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
645
646 if ((READ_BIT(hadc->Instance->JSQR, ADC_JSQR_JEXTEN) == 0UL)
647 && (tmp_config_injected_queue == 0UL)
648 )
649 {
650 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
651 return HAL_ERROR;
652 }
653
654 /* Process locked */
655 __HAL_LOCK(hadc);
656
657 /* Enable the ADC peripheral */
658 tmp_hal_status = ADC_Enable(hadc);
659
660 /* Start conversion if ADC is effectively enabled */
661 if (tmp_hal_status == HAL_OK)
662 {
663 /* Check if a regular conversion is ongoing */
664 if ((hadc->State & HAL_ADC_STATE_REG_BUSY) != 0UL)
665 {
666 /* Reset ADC error code field related to injected conversions only */
667 CLEAR_BIT(hadc->ErrorCode, HAL_ADC_ERROR_JQOVF);
668 }
669 else
670 {
671 /* Set ADC error code to none */
672 ADC_CLEAR_ERRORCODE(hadc);
673 }
674
675 /* Set ADC state */
676 /* - Clear state bitfield related to injected group conversion results */
677 /* - Set state bitfield related to injected operation */
678 ADC_STATE_CLR_SET(hadc->State,
679 HAL_ADC_STATE_READY | HAL_ADC_STATE_INJ_EOC,
680 HAL_ADC_STATE_INJ_BUSY);
681
682 #if defined(ADC_MULTIMODE_SUPPORT)
683 /* Reset HAL_ADC_STATE_MULTIMODE_SLAVE bit
684 - if ADC instance is master or if multimode feature is not available
685 - if multimode setting is disabled (ADC instance slave in independent mode) */
686 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
687 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
688 )
689 {
690 CLEAR_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
691 }
692 #endif
693
694 /* Clear ADC group injected group conversion flag */
695 /* (To ensure of no unknown state from potential previous ADC operations) */
696 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_JEOC | ADC_FLAG_JEOS));
697
698 /* Process unlocked */
699 /* Unlock before starting ADC conversions: in case of potential */
700 /* interruption, to let the process to ADC IRQ Handler. */
701 __HAL_UNLOCK(hadc);
702
703 /* Enable ADC Injected context queue overflow interrupt if this feature */
704 /* is enabled. */
705 if ((hadc->Instance->CFGR & ADC_CFGR_JQM) != 0UL)
706 {
707 __HAL_ADC_ENABLE_IT(hadc, ADC_FLAG_JQOVF);
708 }
709
710 /* Enable ADC end of conversion interrupt */
711 switch (hadc->Init.EOCSelection)
712 {
713 case ADC_EOC_SEQ_CONV:
714 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOC);
715 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOS);
716 break;
717 /* case ADC_EOC_SINGLE_CONV */
718 default:
719 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_JEOS);
720 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_JEOC);
721 break;
722 }
723
724 /* Enable conversion of injected group, if automatic injected conversion */
725 /* is disabled. */
726 /* If software start has been selected, conversion starts immediately. */
727 /* If external trigger has been selected, conversion will start at next */
728 /* trigger event. */
729 /* Case of multimode enabled (when multimode feature is available): */
730 /* if ADC is slave, */
731 /* - ADC is enabled only (conversion is not started), */
732 /* - if multimode only concerns regular conversion, ADC is enabled */
733 /* and conversion is started. */
734 /* If ADC is master or independent, */
735 /* - ADC is enabled and conversion is started. */
736 #if defined(ADC_MULTIMODE_SUPPORT)
737 if ((__LL_ADC_MULTI_INSTANCE_MASTER(hadc->Instance) == hadc->Instance)
738 || (tmp_multimode_config == LL_ADC_MULTI_INDEPENDENT)
739 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_SIMULT)
740 || (tmp_multimode_config == LL_ADC_MULTI_DUAL_REG_INTERL)
741 )
742 {
743 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
744 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
745 {
746 LL_ADC_INJ_StartConversion(hadc->Instance);
747 }
748 }
749 else
750 {
751 /* ADC instance is not a multimode slave instance with multimode injected conversions enabled */
752 SET_BIT(hadc->State, HAL_ADC_STATE_MULTIMODE_SLAVE);
753 }
754 #else
755 if (LL_ADC_INJ_GetTrigAuto(hadc->Instance) == LL_ADC_INJ_TRIG_INDEPENDENT)
756 {
757 /* Start ADC group injected conversion */
758 LL_ADC_INJ_StartConversion(hadc->Instance);
759 }
760 #endif
761
762 }
763 else
764 {
765 /* Process unlocked */
766 __HAL_UNLOCK(hadc);
767 }
768
769 /* Return function status */
770 return tmp_hal_status;
771 }
772 }
773
774 /**
775 * @brief Stop conversion of injected channels, disable interruption of
776 * end-of-conversion. Disable ADC peripheral if no regular conversion
777 * is on going.
778 * @note If ADC must be disabled and if conversion is on going on
779 * regular group, function HAL_ADC_Stop must be used to stop both
780 * injected and regular groups, and disable the ADC.
781 * @note If injected group mode auto-injection is enabled,
782 * function HAL_ADC_Stop must be used.
783 * @note Case of multimode enabled (when multimode feature is available):
784 * HAL_ADCEx_InjectedStop_IT() API must be called for ADC master first,
785 * then for ADC slave.
786 * For ADC master, conversion is stopped and ADC is disabled.
787 * For ADC slave, ADC is disabled only (conversion stop of ADC master
788 * has already stopped conversion of ADC slave).
789 * @note In case of auto-injection mode, HAL_ADC_Stop() must be used.
790 * @param hadc ADC handle
791 * @retval HAL status
792 */
HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef * hadc)793 HAL_StatusTypeDef HAL_ADCEx_InjectedStop_IT(ADC_HandleTypeDef *hadc)
794 {
795 HAL_StatusTypeDef tmp_hal_status;
796
797 /* Check the parameters */
798 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
799
800 /* Process locked */
801 __HAL_LOCK(hadc);
802
803 /* 1. Stop potential conversion on going on injected group only. */
804 tmp_hal_status = ADC_ConversionStop(hadc, ADC_INJECTED_GROUP);
805
806 /* Disable ADC peripheral if injected conversions are effectively stopped */
807 /* and if no conversion on the other group (regular group) is intended to */
808 /* continue. */
809 if (tmp_hal_status == HAL_OK)
810 {
811 /* Disable ADC end of conversion interrupt for injected channels */
812 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_JEOC | ADC_IT_JEOS | ADC_FLAG_JQOVF));
813
814 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
815 {
816 /* 2. Disable the ADC peripheral */
817 tmp_hal_status = ADC_Disable(hadc);
818
819 /* Check if ADC is effectively disabled */
820 if (tmp_hal_status == HAL_OK)
821 {
822 /* Set ADC state */
823 ADC_STATE_CLR_SET(hadc->State,
824 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
825 HAL_ADC_STATE_READY);
826 }
827 }
828 /* Conversion on injected group is stopped, but ADC not disabled since */
829 /* conversion on regular group is still running. */
830 else
831 {
832 /* Set ADC state */
833 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
834 }
835 }
836
837 /* Process unlocked */
838 __HAL_UNLOCK(hadc);
839
840 /* Return function status */
841 return tmp_hal_status;
842 }
843
844 #if defined(ADC_MULTIMODE_SUPPORT)
845 /**
846 * @brief Enable ADC, start MultiMode conversion and transfer regular results through DMA.
847 * @note Multimode must have been previously configured using
848 * HAL_ADCEx_MultiModeConfigChannel() function.
849 * Interruptions enabled in this function:
850 * overrun, DMA half transfer, DMA transfer complete.
851 * Each of these interruptions has its dedicated callback function.
852 * @note State field of Slave ADC handle is not updated in this configuration:
853 * user should not rely on it for information related to Slave regular
854 * conversions.
855 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
856 * @param pData Destination Buffer address.
857 * @param Length Length of data to be transferred from ADC peripheral to memory (in bytes).
858 * @retval HAL status
859 */
HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef * hadc,uint32_t * pData,uint32_t Length)860 HAL_StatusTypeDef HAL_ADCEx_MultiModeStart_DMA(ADC_HandleTypeDef *hadc, uint32_t *pData, uint32_t Length)
861 {
862 HAL_StatusTypeDef tmp_hal_status;
863 ADC_HandleTypeDef tmphadcSlave;
864 ADC_Common_TypeDef *tmpADC_Common;
865
866 /* Check the parameters */
867 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
868 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.ContinuousConvMode));
869 assert_param(IS_ADC_EXTTRIG_EDGE(hadc->Init.ExternalTrigConvEdge));
870 assert_param(IS_FUNCTIONAL_STATE(hadc->Init.DMAContinuousRequests));
871
872 if (LL_ADC_REG_IsConversionOngoing(hadc->Instance) != 0UL)
873 {
874 return HAL_BUSY;
875 }
876 else
877 {
878 /* Process locked */
879 __HAL_LOCK(hadc);
880
881 /* Set a temporary handle of the ADC slave associated to the ADC master */
882 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
883
884 if (tmphadcSlave.Instance == NULL)
885 {
886 /* Set ADC state */
887 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
888
889 /* Process unlocked */
890 __HAL_UNLOCK(hadc);
891
892 return HAL_ERROR;
893 }
894
895 /* Enable the ADC peripherals: master and slave (in case if not already */
896 /* enabled previously) */
897 tmp_hal_status = ADC_Enable(hadc);
898 if (tmp_hal_status == HAL_OK)
899 {
900 tmp_hal_status = ADC_Enable(&tmphadcSlave);
901 }
902
903 /* Start multimode conversion of ADCs pair */
904 if (tmp_hal_status == HAL_OK)
905 {
906 /* Set ADC state */
907 ADC_STATE_CLR_SET(hadc->State,
908 (HAL_ADC_STATE_READY | HAL_ADC_STATE_REG_EOC | HAL_ADC_STATE_REG_OVR | HAL_ADC_STATE_REG_EOSMP),
909 HAL_ADC_STATE_REG_BUSY);
910
911 /* Set ADC error code to none */
912 ADC_CLEAR_ERRORCODE(hadc);
913
914 /* Set the DMA transfer complete callback */
915 hadc->DMA_Handle->XferCpltCallback = ADC_DMAConvCplt;
916
917 /* Set the DMA half transfer complete callback */
918 hadc->DMA_Handle->XferHalfCpltCallback = ADC_DMAHalfConvCplt;
919
920 /* Set the DMA error callback */
921 hadc->DMA_Handle->XferErrorCallback = ADC_DMAError ;
922
923 /* Pointer to the common control register */
924 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
925
926 /* Manage ADC and DMA start: ADC overrun interruption, DMA start, ADC */
927 /* start (in case of SW start): */
928
929 /* Clear regular group conversion flag and overrun flag */
930 /* (To ensure of no unknown state from potential previous ADC operations) */
931 __HAL_ADC_CLEAR_FLAG(hadc, (ADC_FLAG_EOC | ADC_FLAG_EOS | ADC_FLAG_OVR));
932
933 /* Process unlocked */
934 /* Unlock before starting ADC conversions: in case of potential */
935 /* interruption, to let the process to ADC IRQ Handler. */
936 __HAL_UNLOCK(hadc);
937
938 /* Enable ADC overrun interrupt */
939 __HAL_ADC_ENABLE_IT(hadc, ADC_IT_OVR);
940
941 /* Start the DMA channel */
942 tmp_hal_status = HAL_DMA_Start_IT(hadc->DMA_Handle, (uint32_t)&tmpADC_Common->CDR, (uint32_t)pData, Length);
943
944 /* Enable conversion of regular group. */
945 /* If software start has been selected, conversion starts immediately. */
946 /* If external trigger has been selected, conversion will start at next */
947 /* trigger event. */
948 /* Start ADC group regular conversion */
949 LL_ADC_REG_StartConversion(hadc->Instance);
950 }
951 else
952 {
953 /* Process unlocked */
954 __HAL_UNLOCK(hadc);
955 }
956
957 /* Return function status */
958 return tmp_hal_status;
959 }
960 }
961
962 /**
963 * @brief Stop multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral.
964 * @note Multimode is kept enabled after this function. MultiMode DMA bits
965 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
966 * Multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
967 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
968 * resort to HAL_ADCEx_DisableMultiMode() API.
969 * @note In case of DMA configured in circular mode, function
970 * HAL_ADC_Stop_DMA() must be called after this function with handle of
971 * ADC slave, to properly disable the DMA channel.
972 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
973 * @retval HAL status
974 */
HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef * hadc)975 HAL_StatusTypeDef HAL_ADCEx_MultiModeStop_DMA(ADC_HandleTypeDef *hadc)
976 {
977 HAL_StatusTypeDef tmp_hal_status;
978 uint32_t tickstart;
979 ADC_HandleTypeDef tmphadcSlave;
980 uint32_t tmphadcSlave_conversion_on_going;
981 HAL_StatusTypeDef tmphadcSlave_disable_status;
982
983 /* Check the parameters */
984 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
985
986 /* Process locked */
987 __HAL_LOCK(hadc);
988
989
990 /* 1. Stop potential multimode conversion on going, on regular and injected groups */
991 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_INJECTED_GROUP);
992
993 /* Disable ADC peripheral if conversions are effectively stopped */
994 if (tmp_hal_status == HAL_OK)
995 {
996 /* Set a temporary handle of the ADC slave associated to the ADC master */
997 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
998
999 if (tmphadcSlave.Instance == NULL)
1000 {
1001 /* Update ADC state machine to error */
1002 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1003
1004 /* Process unlocked */
1005 __HAL_UNLOCK(hadc);
1006
1007 return HAL_ERROR;
1008 }
1009
1010 /* Procedure to disable the ADC peripheral: wait for conversions */
1011 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1012
1013 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1014 tickstart = HAL_GetTick();
1015
1016 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1017 while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1018 || (tmphadcSlave_conversion_on_going == 1UL)
1019 )
1020 {
1021 if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1022 {
1023 /* Update ADC state machine to error */
1024 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1025
1026 /* Process unlocked */
1027 __HAL_UNLOCK(hadc);
1028
1029 return HAL_ERROR;
1030 }
1031
1032 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1033 }
1034
1035 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1036 /* while DMA transfer is on going) */
1037 /* Note: DMA channel of ADC slave should be stopped after this function */
1038 /* with HAL_ADC_Stop_DMA() API. */
1039 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1040
1041 /* Check if DMA channel effectively disabled */
1042 if (tmp_hal_status == HAL_ERROR)
1043 {
1044 /* Update ADC state machine to error */
1045 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1046 }
1047
1048 /* Disable ADC overrun interrupt */
1049 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1050
1051 /* 2. Disable the ADC peripherals: master and slave */
1052 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1053 /* memory a potential failing status. */
1054 if (tmp_hal_status == HAL_OK)
1055 {
1056 tmphadcSlave_disable_status = ADC_Disable(&tmphadcSlave);
1057 if ((ADC_Disable(hadc) == HAL_OK) &&
1058 (tmphadcSlave_disable_status == HAL_OK))
1059 {
1060 tmp_hal_status = HAL_OK;
1061 }
1062 }
1063 else
1064 {
1065 /* In case of error, attempt to disable ADC master and slave without status assert */
1066 (void) ADC_Disable(hadc);
1067 (void) ADC_Disable(&tmphadcSlave);
1068 }
1069
1070 /* Set ADC state (ADC master) */
1071 ADC_STATE_CLR_SET(hadc->State,
1072 HAL_ADC_STATE_REG_BUSY | HAL_ADC_STATE_INJ_BUSY,
1073 HAL_ADC_STATE_READY);
1074 }
1075
1076 /* Process unlocked */
1077 __HAL_UNLOCK(hadc);
1078
1079 /* Return function status */
1080 return tmp_hal_status;
1081 }
1082
1083 /**
1084 * @brief Return the last ADC Master and Slave regular conversions results when in multimode configuration.
1085 * @param hadc ADC handle of ADC Master (handle of ADC Slave must not be used)
1086 * @retval The converted data values.
1087 */
HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef * hadc)1088 uint32_t HAL_ADCEx_MultiModeGetValue(ADC_HandleTypeDef *hadc)
1089 {
1090 const ADC_Common_TypeDef *tmpADC_Common;
1091
1092 /* Check the parameters */
1093 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1094
1095 /* Prevent unused argument(s) compilation warning if no assert_param check */
1096 /* and possible no usage in __LL_ADC_COMMON_INSTANCE() below */
1097 UNUSED(hadc);
1098
1099 /* Pointer to the common control register */
1100 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
1101
1102 /* Return the multi mode conversion value */
1103 return tmpADC_Common->CDR;
1104 }
1105 #endif /* ADC_MULTIMODE_SUPPORT */
1106
1107 /**
1108 * @brief Get ADC injected group conversion result.
1109 * @note Reading register JDRx automatically clears ADC flag JEOC
1110 * (ADC group injected end of unitary conversion).
1111 * @note This function does not clear ADC flag JEOS
1112 * (ADC group injected end of sequence conversion)
1113 * Occurrence of flag JEOS rising:
1114 * - If sequencer is composed of 1 rank, flag JEOS is equivalent
1115 * to flag JEOC.
1116 * - If sequencer is composed of several ranks, during the scan
1117 * sequence flag JEOC only is raised, at the end of the scan sequence
1118 * both flags JEOC and EOS are raised.
1119 * Flag JEOS must not be cleared by this function because
1120 * it would not be compliant with low power features
1121 * (feature low power auto-wait, not available on all STM32 families).
1122 * To clear this flag, either use function:
1123 * in programming model IT: @ref HAL_ADC_IRQHandler(), in programming
1124 * model polling: @ref HAL_ADCEx_InjectedPollForConversion()
1125 * or @ref __HAL_ADC_CLEAR_FLAG(&hadc, ADC_FLAG_JEOS).
1126 * @param hadc ADC handle
1127 * @param InjectedRank the converted ADC injected rank.
1128 * This parameter can be one of the following values:
1129 * @arg @ref ADC_INJECTED_RANK_1 ADC group injected rank 1
1130 * @arg @ref ADC_INJECTED_RANK_2 ADC group injected rank 2
1131 * @arg @ref ADC_INJECTED_RANK_3 ADC group injected rank 3
1132 * @arg @ref ADC_INJECTED_RANK_4 ADC group injected rank 4
1133 * @retval ADC group injected conversion data
1134 */
HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef * hadc,uint32_t InjectedRank)1135 uint32_t HAL_ADCEx_InjectedGetValue(ADC_HandleTypeDef *hadc, uint32_t InjectedRank)
1136 {
1137 uint32_t tmp_jdr;
1138
1139 /* Check the parameters */
1140 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1141 assert_param(IS_ADC_INJECTED_RANK(InjectedRank));
1142
1143 /* Get ADC converted value */
1144 switch (InjectedRank)
1145 {
1146 case ADC_INJECTED_RANK_4:
1147 tmp_jdr = hadc->Instance->JDR4;
1148 break;
1149 case ADC_INJECTED_RANK_3:
1150 tmp_jdr = hadc->Instance->JDR3;
1151 break;
1152 case ADC_INJECTED_RANK_2:
1153 tmp_jdr = hadc->Instance->JDR2;
1154 break;
1155 case ADC_INJECTED_RANK_1:
1156 default:
1157 tmp_jdr = hadc->Instance->JDR1;
1158 break;
1159 }
1160
1161 /* Return ADC converted value */
1162 return tmp_jdr;
1163 }
1164
1165 /**
1166 * @brief Injected conversion complete callback in non-blocking mode.
1167 * @param hadc ADC handle
1168 * @retval None
1169 */
HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef * hadc)1170 __weak void HAL_ADCEx_InjectedConvCpltCallback(ADC_HandleTypeDef *hadc)
1171 {
1172 /* Prevent unused argument(s) compilation warning */
1173 UNUSED(hadc);
1174
1175 /* NOTE : This function should not be modified. When the callback is needed,
1176 function HAL_ADCEx_InjectedConvCpltCallback must be implemented in the user file.
1177 */
1178 }
1179
1180 /**
1181 * @brief Injected context queue overflow callback.
1182 * @note This callback is called if injected context queue is enabled
1183 (parameter "QueueInjectedContext" in injected channel configuration)
1184 and if a new injected context is set when queue is full (maximum 2
1185 contexts).
1186 * @param hadc ADC handle
1187 * @retval None
1188 */
HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef * hadc)1189 __weak void HAL_ADCEx_InjectedQueueOverflowCallback(ADC_HandleTypeDef *hadc)
1190 {
1191 /* Prevent unused argument(s) compilation warning */
1192 UNUSED(hadc);
1193
1194 /* NOTE : This function should not be modified. When the callback is needed,
1195 function HAL_ADCEx_InjectedQueueOverflowCallback must be implemented in the user file.
1196 */
1197 }
1198
1199 /**
1200 * @brief Analog watchdog 2 callback in non-blocking mode.
1201 * @param hadc ADC handle
1202 * @retval None
1203 */
HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef * hadc)1204 __weak void HAL_ADCEx_LevelOutOfWindow2Callback(ADC_HandleTypeDef *hadc)
1205 {
1206 /* Prevent unused argument(s) compilation warning */
1207 UNUSED(hadc);
1208
1209 /* NOTE : This function should not be modified. When the callback is needed,
1210 function HAL_ADCEx_LevelOutOfWindow2Callback must be implemented in the user file.
1211 */
1212 }
1213
1214 /**
1215 * @brief Analog watchdog 3 callback in non-blocking mode.
1216 * @param hadc ADC handle
1217 * @retval None
1218 */
HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef * hadc)1219 __weak void HAL_ADCEx_LevelOutOfWindow3Callback(ADC_HandleTypeDef *hadc)
1220 {
1221 /* Prevent unused argument(s) compilation warning */
1222 UNUSED(hadc);
1223
1224 /* NOTE : This function should not be modified. When the callback is needed,
1225 function HAL_ADCEx_LevelOutOfWindow3Callback must be implemented in the user file.
1226 */
1227 }
1228
1229
1230 /**
1231 * @brief End Of Sampling callback in non-blocking mode.
1232 * @param hadc ADC handle
1233 * @retval None
1234 */
HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef * hadc)1235 __weak void HAL_ADCEx_EndOfSamplingCallback(ADC_HandleTypeDef *hadc)
1236 {
1237 /* Prevent unused argument(s) compilation warning */
1238 UNUSED(hadc);
1239
1240 /* NOTE : This function should not be modified. When the callback is needed,
1241 function HAL_ADCEx_EndOfSamplingCallback must be implemented in the user file.
1242 */
1243 }
1244
1245 /**
1246 * @brief Stop ADC conversion of regular group (and injected channels in
1247 * case of auto_injection mode), disable ADC peripheral if no
1248 * conversion is on going on injected group.
1249 * @param hadc ADC handle
1250 * @retval HAL status.
1251 */
HAL_ADCEx_RegularStop(ADC_HandleTypeDef * hadc)1252 HAL_StatusTypeDef HAL_ADCEx_RegularStop(ADC_HandleTypeDef *hadc)
1253 {
1254 HAL_StatusTypeDef tmp_hal_status;
1255
1256 /* Check the parameters */
1257 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1258
1259 /* Process locked */
1260 __HAL_LOCK(hadc);
1261
1262 /* 1. Stop potential regular conversion on going */
1263 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1264
1265 /* Disable ADC peripheral if regular conversions are effectively stopped
1266 and if no injected conversions are on-going */
1267 if (tmp_hal_status == HAL_OK)
1268 {
1269 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1270 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1271
1272 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1273 {
1274 /* 2. Disable the ADC peripheral */
1275 tmp_hal_status = ADC_Disable(hadc);
1276
1277 /* Check if ADC is effectively disabled */
1278 if (tmp_hal_status == HAL_OK)
1279 {
1280 /* Set ADC state */
1281 ADC_STATE_CLR_SET(hadc->State,
1282 HAL_ADC_STATE_INJ_BUSY,
1283 HAL_ADC_STATE_READY);
1284 }
1285 }
1286 /* Conversion on injected group is stopped, but ADC not disabled since */
1287 /* conversion on regular group is still running. */
1288 else
1289 {
1290 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1291 }
1292 }
1293
1294 /* Process unlocked */
1295 __HAL_UNLOCK(hadc);
1296
1297 /* Return function status */
1298 return tmp_hal_status;
1299 }
1300
1301
1302 /**
1303 * @brief Stop ADC conversion of ADC groups regular and injected,
1304 * disable interrution of end-of-conversion,
1305 * disable ADC peripheral if no conversion is on going
1306 * on injected group.
1307 * @param hadc ADC handle
1308 * @retval HAL status.
1309 */
HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef * hadc)1310 HAL_StatusTypeDef HAL_ADCEx_RegularStop_IT(ADC_HandleTypeDef *hadc)
1311 {
1312 HAL_StatusTypeDef tmp_hal_status;
1313
1314 /* Check the parameters */
1315 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1316
1317 /* Process locked */
1318 __HAL_LOCK(hadc);
1319
1320 /* 1. Stop potential regular conversion on going */
1321 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1322
1323 /* Disable ADC peripheral if conversions are effectively stopped
1324 and if no injected conversion is on-going */
1325 if (tmp_hal_status == HAL_OK)
1326 {
1327 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1328 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1329
1330 /* Disable all regular-related interrupts */
1331 __HAL_ADC_DISABLE_IT(hadc, (ADC_IT_EOC | ADC_IT_EOS | ADC_IT_OVR));
1332
1333 /* 2. Disable ADC peripheral if no injected conversions are on-going */
1334 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1335 {
1336 tmp_hal_status = ADC_Disable(hadc);
1337 /* if no issue reported */
1338 if (tmp_hal_status == HAL_OK)
1339 {
1340 /* Set ADC state */
1341 ADC_STATE_CLR_SET(hadc->State,
1342 HAL_ADC_STATE_INJ_BUSY,
1343 HAL_ADC_STATE_READY);
1344 }
1345 }
1346 else
1347 {
1348 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1349 }
1350 }
1351
1352 /* Process unlocked */
1353 __HAL_UNLOCK(hadc);
1354
1355 /* Return function status */
1356 return tmp_hal_status;
1357 }
1358
1359 /**
1360 * @brief Stop ADC conversion of regular group (and injected group in
1361 * case of auto_injection mode), disable ADC DMA transfer, disable
1362 * ADC peripheral if no conversion is on going
1363 * on injected group.
1364 * @note HAL_ADCEx_RegularStop_DMA() function is dedicated to single-ADC mode only.
1365 * For multimode (when multimode feature is available),
1366 * HAL_ADCEx_RegularMultiModeStop_DMA() API must be used.
1367 * @param hadc ADC handle
1368 * @retval HAL status.
1369 */
HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef * hadc)1370 HAL_StatusTypeDef HAL_ADCEx_RegularStop_DMA(ADC_HandleTypeDef *hadc)
1371 {
1372 HAL_StatusTypeDef tmp_hal_status;
1373
1374 /* Check the parameters */
1375 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1376
1377 /* Process locked */
1378 __HAL_LOCK(hadc);
1379
1380 /* 1. Stop potential regular conversion on going */
1381 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1382
1383 /* Disable ADC peripheral if conversions are effectively stopped
1384 and if no injected conversion is on-going */
1385 if (tmp_hal_status == HAL_OK)
1386 {
1387 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1388 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1389
1390 /* Disable ADC DMA (ADC DMA configuration ADC_CFGR_DMACFG is kept) */
1391 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_DMAEN);
1392
1393 /* Disable the DMA channel (in case of DMA in circular mode or stop while */
1394 /* while DMA transfer is on going) */
1395 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1396
1397 /* Check if DMA channel effectively disabled */
1398 if (tmp_hal_status != HAL_OK)
1399 {
1400 /* Update ADC state machine to error */
1401 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1402 }
1403
1404 /* Disable ADC overrun interrupt */
1405 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1406
1407 /* 2. Disable the ADC peripheral */
1408 /* Update "tmp_hal_status" only if DMA channel disabling passed, */
1409 /* to keep in memory a potential failing status. */
1410 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1411 {
1412 if (tmp_hal_status == HAL_OK)
1413 {
1414 tmp_hal_status = ADC_Disable(hadc);
1415 }
1416 else
1417 {
1418 (void)ADC_Disable(hadc);
1419 }
1420
1421 /* Check if ADC is effectively disabled */
1422 if (tmp_hal_status == HAL_OK)
1423 {
1424 /* Set ADC state */
1425 ADC_STATE_CLR_SET(hadc->State,
1426 HAL_ADC_STATE_INJ_BUSY,
1427 HAL_ADC_STATE_READY);
1428 }
1429 }
1430 else
1431 {
1432 SET_BIT(hadc->State, HAL_ADC_STATE_INJ_BUSY);
1433 }
1434 }
1435
1436 /* Process unlocked */
1437 __HAL_UNLOCK(hadc);
1438
1439 /* Return function status */
1440 return tmp_hal_status;
1441 }
1442
1443 #if defined(ADC_MULTIMODE_SUPPORT)
1444 /**
1445 * @brief Stop DMA-based multimode ADC conversion, disable ADC DMA transfer, disable ADC peripheral if no injected conversion is on-going.
1446 * @note Multimode is kept enabled after this function. Multimode DMA bits
1447 * (MDMA and DMACFG bits of common CCR register) are maintained. To disable
1448 * multimode (set with HAL_ADCEx_MultiModeConfigChannel()), ADC must be
1449 * reinitialized using HAL_ADC_Init() or HAL_ADC_DeInit(), or the user can
1450 * resort to HAL_ADCEx_DisableMultiMode() API.
1451 * @note In case of DMA configured in circular mode, function
1452 * HAL_ADCEx_RegularStop_DMA() must be called after this function with handle of
1453 * ADC slave, to properly disable the DMA channel.
1454 * @param hadc ADC handle of ADC master (handle of ADC slave must not be used)
1455 * @retval HAL status
1456 */
HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef * hadc)1457 HAL_StatusTypeDef HAL_ADCEx_RegularMultiModeStop_DMA(ADC_HandleTypeDef *hadc)
1458 {
1459 HAL_StatusTypeDef tmp_hal_status;
1460 uint32_t tickstart;
1461 ADC_HandleTypeDef tmphadcSlave;
1462 uint32_t tmphadcSlave_conversion_on_going;
1463
1464 /* Check the parameters */
1465 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
1466
1467 /* Process locked */
1468 __HAL_LOCK(hadc);
1469
1470
1471 /* 1. Stop potential multimode conversion on going, on regular groups */
1472 tmp_hal_status = ADC_ConversionStop(hadc, ADC_REGULAR_GROUP);
1473
1474 /* Disable ADC peripheral if conversions are effectively stopped */
1475 if (tmp_hal_status == HAL_OK)
1476 {
1477 /* Clear HAL_ADC_STATE_REG_BUSY bit */
1478 CLEAR_BIT(hadc->State, HAL_ADC_STATE_REG_BUSY);
1479
1480 /* Set a temporary handle of the ADC slave associated to the ADC master */
1481 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
1482
1483 if (tmphadcSlave.Instance == NULL)
1484 {
1485 /* Update ADC state machine to error */
1486 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1487
1488 /* Process unlocked */
1489 __HAL_UNLOCK(hadc);
1490
1491 return HAL_ERROR;
1492 }
1493
1494 /* Procedure to disable the ADC peripheral: wait for conversions */
1495 /* effectively stopped (ADC master and ADC slave), then disable ADC */
1496
1497 /* 1. Wait for ADC conversion completion for ADC master and ADC slave */
1498 tickstart = HAL_GetTick();
1499
1500 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1501 while ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 1UL)
1502 || (tmphadcSlave_conversion_on_going == 1UL)
1503 )
1504 {
1505 if ((HAL_GetTick() - tickstart) > ADC_STOP_CONVERSION_TIMEOUT)
1506 {
1507 /* Update ADC state machine to error */
1508 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_INTERNAL);
1509
1510 /* Process unlocked */
1511 __HAL_UNLOCK(hadc);
1512
1513 return HAL_ERROR;
1514 }
1515
1516 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
1517 }
1518
1519 /* Disable the DMA channel (in case of DMA in circular mode or stop */
1520 /* while DMA transfer is on going) */
1521 /* Note: DMA channel of ADC slave should be stopped after this function */
1522 /* with HAL_ADCEx_RegularStop_DMA() API. */
1523 tmp_hal_status = HAL_DMA_Abort(hadc->DMA_Handle);
1524
1525 /* Check if DMA channel effectively disabled */
1526 if (tmp_hal_status != HAL_OK)
1527 {
1528 /* Update ADC state machine to error */
1529 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_DMA);
1530 }
1531
1532 /* Disable ADC overrun interrupt */
1533 __HAL_ADC_DISABLE_IT(hadc, ADC_IT_OVR);
1534
1535 /* 2. Disable the ADC peripherals: master and slave if no injected */
1536 /* conversion is on-going. */
1537 /* Update "tmp_hal_status" only if DMA channel disabling passed, to keep in */
1538 /* memory a potential failing status. */
1539 if (tmp_hal_status == HAL_OK)
1540 {
1541 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1542 {
1543 tmp_hal_status = ADC_Disable(hadc);
1544 if (tmp_hal_status == HAL_OK)
1545 {
1546 if (LL_ADC_INJ_IsConversionOngoing((&tmphadcSlave)->Instance) == 0UL)
1547 {
1548 tmp_hal_status = ADC_Disable(&tmphadcSlave);
1549 }
1550 }
1551 }
1552
1553 if (tmp_hal_status == HAL_OK)
1554 {
1555 /* Both Master and Slave ADC's could be disabled. Update Master State */
1556 /* Clear HAL_ADC_STATE_INJ_BUSY bit, set HAL_ADC_STATE_READY bit */
1557 ADC_STATE_CLR_SET(hadc->State, HAL_ADC_STATE_INJ_BUSY, HAL_ADC_STATE_READY);
1558 }
1559 else
1560 {
1561 /* injected (Master or Slave) conversions are still on-going,
1562 no Master State change */
1563 }
1564 }
1565 }
1566
1567 /* Process unlocked */
1568 __HAL_UNLOCK(hadc);
1569
1570 /* Return function status */
1571 return tmp_hal_status;
1572 }
1573 #endif /* ADC_MULTIMODE_SUPPORT */
1574
1575 /**
1576 * @}
1577 */
1578
1579 /** @defgroup ADCEx_Exported_Functions_Group2 ADC Extended Peripheral Control functions
1580 * @brief ADC Extended Peripheral Control functions
1581 *
1582 @verbatim
1583 ===============================================================================
1584 ##### Peripheral Control functions #####
1585 ===============================================================================
1586 [..] This section provides functions allowing to:
1587 (+) Configure channels on injected group
1588 (+) Configure multimode when multimode feature is available
1589 (+) Enable or Disable Injected Queue
1590 (+) Disable ADC voltage regulator
1591 (+) Enter ADC deep-power-down mode
1592
1593 @endverbatim
1594 * @{
1595 */
1596
1597 /**
1598 * @brief Configure a channel to be assigned to ADC group injected.
1599 * @note Possibility to update parameters on the fly:
1600 * This function initializes injected group, following calls to this
1601 * function can be used to reconfigure some parameters of structure
1602 * "ADC_InjectionConfTypeDef" on the fly, without resetting the ADC.
1603 * The setting of these parameters is conditioned to ADC state:
1604 * Refer to comments of structure "ADC_InjectionConfTypeDef".
1605 * @note In case of usage of internal measurement channels:
1606 * Vbat/VrefInt/TempSensor.
1607 * These internal paths can be disabled using function
1608 * HAL_ADC_DeInit().
1609 * @note Caution: For Injected Context Queue use, a context must be fully
1610 * defined before start of injected conversion. All channels are configured
1611 * consecutively for the same ADC instance. Therefore, the number of calls to
1612 * HAL_ADCEx_InjectedConfigChannel() must be equal to the value of parameter
1613 * InjectedNbrOfConversion for each context.
1614 * - Example 1: If 1 context is intended to be used (or if there is no use of the
1615 * Injected Queue Context feature) and if the context contains 3 injected ranks
1616 * (InjectedNbrOfConversion = 3), HAL_ADCEx_InjectedConfigChannel() must be
1617 * called once for each channel (i.e. 3 times) before starting a conversion.
1618 * This function must not be called to configure a 4th injected channel:
1619 * it would start a new context into context queue.
1620 * - Example 2: If 2 contexts are intended to be used and each of them contains
1621 * 3 injected ranks (InjectedNbrOfConversion = 3),
1622 * HAL_ADCEx_InjectedConfigChannel() must be called once for each channel and
1623 * for each context (3 channels x 2 contexts = 6 calls). Conversion can
1624 * start once the 1st context is set, that is after the first three
1625 * HAL_ADCEx_InjectedConfigChannel() calls. The 2nd context can be set on the fly.
1626 * @param hadc ADC handle
1627 * @param sConfigInjected Structure of ADC injected group and ADC channel for
1628 * injected group.
1629 * @retval HAL status
1630 */
HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef * hadc,ADC_InjectionConfTypeDef * sConfigInjected)1631 HAL_StatusTypeDef HAL_ADCEx_InjectedConfigChannel(ADC_HandleTypeDef *hadc, ADC_InjectionConfTypeDef *sConfigInjected)
1632 {
1633 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
1634 uint32_t tmpOffsetShifted;
1635 uint32_t tmp_config_internal_channel;
1636 uint32_t tmp_adc_is_conversion_on_going_regular;
1637 uint32_t tmp_adc_is_conversion_on_going_injected;
1638 __IO uint32_t wait_loop_index = 0;
1639
1640 uint32_t tmp_JSQR_ContextQueueBeingBuilt = 0U;
1641
1642 /* Check the parameters */
1643 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
1644 assert_param(IS_ADC_SAMPLE_TIME(sConfigInjected->InjectedSamplingTime));
1645 assert_param(IS_ADC_SINGLE_DIFFERENTIAL(sConfigInjected->InjectedSingleDiff));
1646 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->AutoInjectedConv));
1647 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->QueueInjectedContext));
1648 assert_param(IS_ADC_EXTTRIGINJEC_EDGE(sConfigInjected->ExternalTrigInjecConvEdge));
1649 assert_param(IS_ADC_EXTTRIGINJEC(hadc, sConfigInjected->ExternalTrigInjecConv));
1650 assert_param(IS_ADC_OFFSET_NUMBER(sConfigInjected->InjectedOffsetNumber));
1651 assert_param(IS_ADC_RANGE(ADC_GET_RESOLUTION(hadc), sConfigInjected->InjectedOffset));
1652 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjecOversamplingMode));
1653
1654 if (hadc->Init.ScanConvMode != ADC_SCAN_DISABLE)
1655 {
1656 assert_param(IS_ADC_INJECTED_RANK(sConfigInjected->InjectedRank));
1657 assert_param(IS_ADC_INJECTED_NB_CONV(sConfigInjected->InjectedNbrOfConversion));
1658 assert_param(IS_FUNCTIONAL_STATE(sConfigInjected->InjectedDiscontinuousConvMode));
1659 }
1660
1661
1662 /* if JOVSE is set, the value of the OFFSETy_EN bit in ADCx_OFRy register is
1663 ignored (considered as reset) */
1664 assert_param(!((sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE) && (sConfigInjected->InjecOversamplingMode == ENABLE)));
1665
1666 /* JDISCEN and JAUTO bits can't be set at the same time */
1667 assert_param(!((sConfigInjected->InjectedDiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
1668
1669 /* DISCEN and JAUTO bits can't be set at the same time */
1670 assert_param(!((hadc->Init.DiscontinuousConvMode == ENABLE) && (sConfigInjected->AutoInjectedConv == ENABLE)));
1671
1672 /* Verification of channel number */
1673 if (sConfigInjected->InjectedSingleDiff != ADC_DIFFERENTIAL_ENDED)
1674 {
1675 assert_param(IS_ADC_CHANNEL(hadc, sConfigInjected->InjectedChannel));
1676 }
1677 else
1678 {
1679 assert_param(IS_ADC_DIFF_CHANNEL(hadc, sConfigInjected->InjectedChannel));
1680 }
1681
1682 /* Process locked */
1683 __HAL_LOCK(hadc);
1684
1685 /* Configuration of injected group sequencer: */
1686 /* Hardware constraint: Must fully define injected context register JSQR */
1687 /* before make it entering into injected sequencer queue. */
1688 /* */
1689 /* - if scan mode is disabled: */
1690 /* * Injected channels sequence length is set to 0x00: 1 channel */
1691 /* converted (channel on injected rank 1) */
1692 /* Parameter "InjectedNbrOfConversion" is discarded. */
1693 /* * Injected context register JSQR setting is simple: register is fully */
1694 /* defined on one call of this function (for injected rank 1) and can */
1695 /* be entered into queue directly. */
1696 /* - if scan mode is enabled: */
1697 /* * Injected channels sequence length is set to parameter */
1698 /* "InjectedNbrOfConversion". */
1699 /* * Injected context register JSQR setting more complex: register is */
1700 /* fully defined over successive calls of this function, for each */
1701 /* injected channel rank. It is entered into queue only when all */
1702 /* injected ranks have been set. */
1703 /* Note: Scan mode is not present by hardware on this device, but used */
1704 /* by software for alignment over all STM32 devices. */
1705
1706 if ((hadc->Init.ScanConvMode == ADC_SCAN_DISABLE) ||
1707 (sConfigInjected->InjectedNbrOfConversion == 1U))
1708 {
1709 /* Configuration of context register JSQR: */
1710 /* - number of ranks in injected group sequencer: fixed to 1st rank */
1711 /* (scan mode disabled, only rank 1 used) */
1712 /* - external trigger to start conversion */
1713 /* - external trigger polarity */
1714 /* - channel set to rank 1 (scan mode disabled, only rank 1 can be used) */
1715
1716 if (sConfigInjected->InjectedRank == ADC_INJECTED_RANK_1)
1717 {
1718 /* Enable external trigger if trigger selection is different of */
1719 /* software start. */
1720 /* Note: This configuration keeps the hardware feature of parameter */
1721 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
1722 /* software start. */
1723 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
1724 {
1725 tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1)
1726 | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
1727 | sConfigInjected->ExternalTrigInjecConvEdge
1728 );
1729 }
1730 else
1731 {
1732 tmp_JSQR_ContextQueueBeingBuilt = (ADC_JSQR_RK(sConfigInjected->InjectedChannel, ADC_INJECTED_RANK_1));
1733 }
1734
1735 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, tmp_JSQR_ContextQueueBeingBuilt);
1736 /* For debug and informative reasons, hadc handle saves JSQR setting */
1737 hadc->InjectionConfig.ContextQueue = tmp_JSQR_ContextQueueBeingBuilt;
1738
1739 }
1740 }
1741 else
1742 {
1743 /* Case of scan mode enabled, several channels to set into injected group */
1744 /* sequencer. */
1745 /* */
1746 /* Procedure to define injected context register JSQR over successive */
1747 /* calls of this function, for each injected channel rank: */
1748 /* 1. Start new context and set parameters related to all injected */
1749 /* channels: injected sequence length and trigger. */
1750
1751 /* if hadc->InjectionConfig.ChannelCount is equal to 0, this is the first */
1752 /* call of the context under setting */
1753 if (hadc->InjectionConfig.ChannelCount == 0U)
1754 {
1755 /* Initialize number of channels that will be configured on the context */
1756 /* being built */
1757 hadc->InjectionConfig.ChannelCount = sConfigInjected->InjectedNbrOfConversion;
1758 /* Handle hadc saves the context under build up over each HAL_ADCEx_InjectedConfigChannel()
1759 call, this context will be written in JSQR register at the last call.
1760 At this point, the context is merely reset */
1761 hadc->InjectionConfig.ContextQueue = 0x00000000U;
1762
1763 /* Configuration of context register JSQR: */
1764 /* - number of ranks in injected group sequencer */
1765 /* - external trigger to start conversion */
1766 /* - external trigger polarity */
1767
1768 /* Enable external trigger if trigger selection is different of */
1769 /* software start. */
1770 /* Note: This configuration keeps the hardware feature of parameter */
1771 /* ExternalTrigInjecConvEdge "trigger edge none" equivalent to */
1772 /* software start. */
1773 if (sConfigInjected->ExternalTrigInjecConv != ADC_INJECTED_SOFTWARE_START)
1774 {
1775 tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U)
1776 | (sConfigInjected->ExternalTrigInjecConv & ADC_JSQR_JEXTSEL)
1777 | sConfigInjected->ExternalTrigInjecConvEdge
1778 );
1779 }
1780 else
1781 {
1782 tmp_JSQR_ContextQueueBeingBuilt = ((sConfigInjected->InjectedNbrOfConversion - 1U));
1783 }
1784
1785 }
1786
1787 /* 2. Continue setting of context under definition with parameter */
1788 /* related to each channel: channel rank sequence */
1789 /* Clear the old JSQx bits for the selected rank */
1790 tmp_JSQR_ContextQueueBeingBuilt &= ~ADC_JSQR_RK(ADC_SQR3_SQ10, sConfigInjected->InjectedRank);
1791
1792 /* Set the JSQx bits for the selected rank */
1793 tmp_JSQR_ContextQueueBeingBuilt |= ADC_JSQR_RK(sConfigInjected->InjectedChannel, sConfigInjected->InjectedRank);
1794
1795 /* Decrease channel count */
1796 hadc->InjectionConfig.ChannelCount--;
1797
1798 /* 3. tmp_JSQR_ContextQueueBeingBuilt is fully built for this HAL_ADCEx_InjectedConfigChannel()
1799 call, aggregate the setting to those already built during the previous
1800 HAL_ADCEx_InjectedConfigChannel() calls (for the same context of course) */
1801 hadc->InjectionConfig.ContextQueue |= tmp_JSQR_ContextQueueBeingBuilt;
1802
1803 /* 4. End of context setting: if this is the last channel set, then write context
1804 into register JSQR and make it enter into queue */
1805 if (hadc->InjectionConfig.ChannelCount == 0U)
1806 {
1807 MODIFY_REG(hadc->Instance->JSQR, ADC_JSQR_FIELDS, hadc->InjectionConfig.ContextQueue);
1808 }
1809 }
1810
1811 /* Parameters update conditioned to ADC state: */
1812 /* Parameters that can be updated when ADC is disabled or enabled without */
1813 /* conversion on going on injected group: */
1814 /* - Injected context queue: Queue disable (active context is kept) or */
1815 /* enable (context decremented, up to 2 contexts queued) */
1816 /* - Injected discontinuous mode: can be enabled only if auto-injected */
1817 /* mode is disabled. */
1818 if (LL_ADC_INJ_IsConversionOngoing(hadc->Instance) == 0UL)
1819 {
1820 /* If auto-injected mode is disabled: no constraint */
1821 if (sConfigInjected->AutoInjectedConv == DISABLE)
1822 {
1823 MODIFY_REG(hadc->Instance->CFGR,
1824 ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
1825 ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext) |
1826 ADC_CFGR_INJECT_DISCCONTINUOUS((uint32_t)sConfigInjected->InjectedDiscontinuousConvMode));
1827 }
1828 /* If auto-injected mode is enabled: Injected discontinuous setting is */
1829 /* discarded. */
1830 else
1831 {
1832 MODIFY_REG(hadc->Instance->CFGR,
1833 ADC_CFGR_JQM | ADC_CFGR_JDISCEN,
1834 ADC_CFGR_INJECT_CONTEXT_QUEUE((uint32_t)sConfigInjected->QueueInjectedContext));
1835 }
1836
1837 }
1838
1839 /* Parameters update conditioned to ADC state: */
1840 /* Parameters that can be updated when ADC is disabled or enabled without */
1841 /* conversion on going on regular and injected groups: */
1842 /* - Automatic injected conversion: can be enabled if injected group */
1843 /* external triggers are disabled. */
1844 /* - Channel sampling time */
1845 /* - Channel offset */
1846 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
1847 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
1848
1849 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
1850 && (tmp_adc_is_conversion_on_going_injected == 0UL)
1851 )
1852 {
1853 /* If injected group external triggers are disabled (set to injected */
1854 /* software start): no constraint */
1855 if ((sConfigInjected->ExternalTrigInjecConv == ADC_INJECTED_SOFTWARE_START)
1856 || (sConfigInjected->ExternalTrigInjecConvEdge == ADC_EXTERNALTRIGINJECCONV_EDGE_NONE))
1857 {
1858 if (sConfigInjected->AutoInjectedConv == ENABLE)
1859 {
1860 SET_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1861 }
1862 else
1863 {
1864 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1865 }
1866 }
1867 /* If Automatic injected conversion was intended to be set and could not */
1868 /* due to injected group external triggers enabled, error is reported. */
1869 else
1870 {
1871 if (sConfigInjected->AutoInjectedConv == ENABLE)
1872 {
1873 /* Update ADC state machine to error */
1874 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
1875
1876 tmp_hal_status = HAL_ERROR;
1877 }
1878 else
1879 {
1880 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JAUTO);
1881 }
1882 }
1883
1884 if (sConfigInjected->InjecOversamplingMode == ENABLE)
1885 {
1886 assert_param(IS_ADC_OVERSAMPLING_RATIO(sConfigInjected->InjecOversampling.Ratio));
1887 assert_param(IS_ADC_RIGHT_BIT_SHIFT(sConfigInjected->InjecOversampling.RightBitShift));
1888
1889 /* JOVSE must be reset in case of triggered regular mode */
1890 assert_param(!(READ_BIT(hadc->Instance->CFGR2, ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS) == (ADC_CFGR2_ROVSE | ADC_CFGR2_TROVS)));
1891
1892 /* Configuration of Injected Oversampler: */
1893 /* - Oversampling Ratio */
1894 /* - Right bit shift */
1895
1896 /* Enable OverSampling mode */
1897 MODIFY_REG(hadc->Instance->CFGR2,
1898 ADC_CFGR2_JOVSE |
1899 ADC_CFGR2_OVSR |
1900 ADC_CFGR2_OVSS,
1901 ADC_CFGR2_JOVSE |
1902 sConfigInjected->InjecOversampling.Ratio |
1903 sConfigInjected->InjecOversampling.RightBitShift
1904 );
1905 }
1906 else
1907 {
1908 /* Disable Regular OverSampling */
1909 CLEAR_BIT(hadc->Instance->CFGR2, ADC_CFGR2_JOVSE);
1910 }
1911
1912 #if defined(ADC_SMPR1_SMPPLUS)
1913 /* Manage specific case of sampling time 3.5 cycles replacing 2.5 cyles */
1914 if (sConfigInjected->InjectedSamplingTime == ADC_SAMPLETIME_3CYCLES_5)
1915 {
1916 /* Set sampling time of the selected ADC channel */
1917 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, LL_ADC_SAMPLINGTIME_2CYCLES_5);
1918
1919 /* Set ADC sampling time common configuration */
1920 LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_3C5_REPL_2C5);
1921 }
1922 else
1923 {
1924 /* Set sampling time of the selected ADC channel */
1925 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSamplingTime);
1926
1927 /* Set ADC sampling time common configuration */
1928 LL_ADC_SetSamplingTimeCommonConfig(hadc->Instance, LL_ADC_SAMPLINGTIME_COMMON_DEFAULT);
1929 }
1930 #else
1931 /* Set sampling time of the selected ADC channel */
1932 LL_ADC_SetChannelSamplingTime(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSamplingTime);
1933 #endif
1934
1935 /* Configure the offset: offset enable/disable, channel, offset value */
1936
1937 /* Shift the offset with respect to the selected ADC resolution. */
1938 /* Offset has to be left-aligned on bit 11, the LSB (right bits) are set to 0 */
1939 tmpOffsetShifted = ADC_OFFSET_SHIFT_RESOLUTION(hadc, sConfigInjected->InjectedOffset);
1940
1941 if (sConfigInjected->InjectedOffsetNumber != ADC_OFFSET_NONE)
1942 {
1943 /* Set ADC selected offset number */
1944 LL_ADC_SetOffset(hadc->Instance, sConfigInjected->InjectedOffsetNumber, sConfigInjected->InjectedChannel,
1945 tmpOffsetShifted);
1946
1947 }
1948 else
1949 {
1950 /* Scan each offset register to check if the selected channel is targeted. */
1951 /* If this is the case, the corresponding offset number is disabled. */
1952 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_1)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1953 {
1954 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_1, LL_ADC_OFFSET_DISABLE);
1955 }
1956 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_2)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1957 {
1958 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_2, LL_ADC_OFFSET_DISABLE);
1959 }
1960 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_3)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1961 {
1962 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_3, LL_ADC_OFFSET_DISABLE);
1963 }
1964 if(__LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_GetOffsetChannel(hadc->Instance, LL_ADC_OFFSET_4)) == __LL_ADC_CHANNEL_TO_DECIMAL_NB(sConfigInjected->InjectedChannel))
1965 {
1966 LL_ADC_SetOffsetState(hadc->Instance, LL_ADC_OFFSET_4, LL_ADC_OFFSET_DISABLE);
1967 }
1968 }
1969
1970 }
1971
1972 /* Parameters update conditioned to ADC state: */
1973 /* Parameters that can be updated only when ADC is disabled: */
1974 /* - Single or differential mode */
1975 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
1976 {
1977 /* Set mode single-ended or differential input of the selected ADC channel */
1978 LL_ADC_SetChannelSingleDiff(hadc->Instance, sConfigInjected->InjectedChannel, sConfigInjected->InjectedSingleDiff);
1979
1980 /* Configuration of differential mode */
1981 /* Note: ADC channel number masked with value "0x1F" to ensure shift value within 32 bits range */
1982 if (sConfigInjected->InjectedSingleDiff == ADC_DIFFERENTIAL_ENDED)
1983 {
1984 /* Set sampling time of the selected ADC channel */
1985 LL_ADC_SetChannelSamplingTime(hadc->Instance, (uint32_t)(__LL_ADC_DECIMAL_NB_TO_CHANNEL((__LL_ADC_CHANNEL_TO_DECIMAL_NB((uint32_t)sConfigInjected->InjectedChannel) + 1UL) & 0x1FUL)), sConfigInjected->InjectedSamplingTime);
1986 }
1987
1988 }
1989
1990 /* Management of internal measurement channels: Vbat/VrefInt/TempSensor */
1991 /* internal measurement paths enable: If internal channel selected, */
1992 /* enable dedicated internal buffers and path. */
1993 /* Note: these internal measurement paths can be disabled using */
1994 /* HAL_ADC_DeInit(). */
1995
1996 if (__LL_ADC_IS_CHANNEL_INTERNAL(sConfigInjected->InjectedChannel))
1997 {
1998 tmp_config_internal_channel = LL_ADC_GetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance));
1999
2000 /* If the requested internal measurement path has already been enabled, */
2001 /* bypass the configuration processing. */
2002 if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_TEMPSENSOR)
2003 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_TEMPSENSOR) == 0UL))
2004 {
2005 if (ADC_TEMPERATURE_SENSOR_INSTANCE(hadc))
2006 {
2007 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2008 LL_ADC_PATH_INTERNAL_TEMPSENSOR | tmp_config_internal_channel);
2009
2010 /* Delay for temperature sensor stabilization time */
2011 /* Wait loop initialization and execution */
2012 /* Note: Variable divided by 2 to compensate partially */
2013 /* CPU processing cycles, scaling in us split to not */
2014 /* exceed 32 bits register capacity and handle low frequency. */
2015 wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US / 10UL) * (SystemCoreClock / (100000UL * 2UL)));
2016 while (wait_loop_index != 0UL)
2017 {
2018 wait_loop_index--;
2019 }
2020 }
2021 }
2022 else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VBAT)
2023 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VBAT) == 0UL))
2024 {
2025 if (ADC_BATTERY_VOLTAGE_INSTANCE(hadc))
2026 {
2027 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2028 LL_ADC_PATH_INTERNAL_VBAT | tmp_config_internal_channel);
2029 }
2030 }
2031 else if ((sConfigInjected->InjectedChannel == ADC_CHANNEL_VREFINT)
2032 && ((tmp_config_internal_channel & LL_ADC_PATH_INTERNAL_VREFINT) == 0UL))
2033 {
2034 if (ADC_VREFINT_INSTANCE(hadc))
2035 {
2036 LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(hadc->Instance),
2037 LL_ADC_PATH_INTERNAL_VREFINT | tmp_config_internal_channel);
2038 }
2039 }
2040 else
2041 {
2042 /* nothing to do */
2043 }
2044 }
2045
2046 /* Process unlocked */
2047 __HAL_UNLOCK(hadc);
2048
2049 /* Return function status */
2050 return tmp_hal_status;
2051 }
2052
2053 #if defined(ADC_MULTIMODE_SUPPORT)
2054 /**
2055 * @brief Enable ADC multimode and configure multimode parameters
2056 * @note Possibility to update parameters on the fly:
2057 * This function initializes multimode parameters, following
2058 * calls to this function can be used to reconfigure some parameters
2059 * of structure "ADC_MultiModeTypeDef" on the fly, without resetting
2060 * the ADCs.
2061 * The setting of these parameters is conditioned to ADC state.
2062 * For parameters constraints, see comments of structure
2063 * "ADC_MultiModeTypeDef".
2064 * @note To move back configuration from multimode to single mode, ADC must
2065 * be reset (using function HAL_ADC_Init() ).
2066 * @param hadc Master ADC handle
2067 * @param multimode Structure of ADC multimode configuration
2068 * @retval HAL status
2069 */
HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef * hadc,ADC_MultiModeTypeDef * multimode)2070 HAL_StatusTypeDef HAL_ADCEx_MultiModeConfigChannel(ADC_HandleTypeDef *hadc, ADC_MultiModeTypeDef *multimode)
2071 {
2072 HAL_StatusTypeDef tmp_hal_status = HAL_OK;
2073 ADC_Common_TypeDef *tmpADC_Common;
2074 ADC_HandleTypeDef tmphadcSlave;
2075 uint32_t tmphadcSlave_conversion_on_going;
2076
2077 /* Check the parameters */
2078 assert_param(IS_ADC_MULTIMODE_MASTER_INSTANCE(hadc->Instance));
2079 assert_param(IS_ADC_MULTIMODE(multimode->Mode));
2080 if (multimode->Mode != ADC_MODE_INDEPENDENT)
2081 {
2082 assert_param(IS_ADC_DMA_ACCESS_MULTIMODE(multimode->DMAAccessMode));
2083 assert_param(IS_ADC_SAMPLING_DELAY(multimode->TwoSamplingDelay));
2084 }
2085
2086 /* Process locked */
2087 __HAL_LOCK(hadc);
2088
2089 ADC_MULTI_SLAVE(hadc, &tmphadcSlave);
2090
2091 if (tmphadcSlave.Instance == NULL)
2092 {
2093 /* Update ADC state machine to error */
2094 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2095
2096 /* Process unlocked */
2097 __HAL_UNLOCK(hadc);
2098
2099 return HAL_ERROR;
2100 }
2101
2102 /* Parameters update conditioned to ADC state: */
2103 /* Parameters that can be updated when ADC is disabled or enabled without */
2104 /* conversion on going on regular group: */
2105 /* - Multimode DMA configuration */
2106 /* - Multimode DMA mode */
2107 tmphadcSlave_conversion_on_going = LL_ADC_REG_IsConversionOngoing((&tmphadcSlave)->Instance);
2108 if ((LL_ADC_REG_IsConversionOngoing(hadc->Instance) == 0UL)
2109 && (tmphadcSlave_conversion_on_going == 0UL))
2110 {
2111 /* Pointer to the common control register */
2112 tmpADC_Common = __LL_ADC_COMMON_INSTANCE(hadc->Instance);
2113
2114 /* If multimode is selected, configure all multimode parameters. */
2115 /* Otherwise, reset multimode parameters (can be used in case of */
2116 /* transition from multimode to independent mode). */
2117 if (multimode->Mode != ADC_MODE_INDEPENDENT)
2118 {
2119 MODIFY_REG(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG,
2120 multimode->DMAAccessMode |
2121 ADC_CCR_MULTI_DMACONTREQ((uint32_t)hadc->Init.DMAContinuousRequests));
2122
2123 /* Parameters that can be updated only when ADC is disabled: */
2124 /* - Multimode mode selection */
2125 /* - Multimode delay */
2126 /* Note: Delay range depends on selected resolution: */
2127 /* from 1 to 12 clock cycles for 12 bits */
2128 /* from 1 to 10 clock cycles for 10 bits, */
2129 /* from 1 to 8 clock cycles for 8 bits */
2130 /* from 1 to 6 clock cycles for 6 bits */
2131 /* If a higher delay is selected, it will be clipped to maximum delay */
2132 /* range */
2133 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2134 {
2135 MODIFY_REG(tmpADC_Common->CCR,
2136 ADC_CCR_DUAL |
2137 ADC_CCR_DELAY,
2138 multimode->Mode |
2139 multimode->TwoSamplingDelay
2140 );
2141 }
2142 }
2143 else /* ADC_MODE_INDEPENDENT */
2144 {
2145 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_MDMA | ADC_CCR_DMACFG);
2146
2147 /* Parameters that can be updated only when ADC is disabled: */
2148 /* - Multimode mode selection */
2149 /* - Multimode delay */
2150 if (__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__LL_ADC_COMMON_INSTANCE(hadc->Instance)) == 0UL)
2151 {
2152 CLEAR_BIT(tmpADC_Common->CCR, ADC_CCR_DUAL | ADC_CCR_DELAY);
2153 }
2154 }
2155 }
2156 /* If one of the ADC sharing the same common group is enabled, no update */
2157 /* could be done on neither of the multimode structure parameters. */
2158 else
2159 {
2160 /* Update ADC state machine to error */
2161 SET_BIT(hadc->State, HAL_ADC_STATE_ERROR_CONFIG);
2162
2163 tmp_hal_status = HAL_ERROR;
2164 }
2165
2166 /* Process unlocked */
2167 __HAL_UNLOCK(hadc);
2168
2169 /* Return function status */
2170 return tmp_hal_status;
2171 }
2172 #endif /* ADC_MULTIMODE_SUPPORT */
2173
2174 /**
2175 * @brief Enable Injected Queue
2176 * @note This function resets CFGR register JQDIS bit in order to enable the
2177 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2178 * are both equal to 0 to ensure that no regular nor injected
2179 * conversion is ongoing.
2180 * @param hadc ADC handle
2181 * @retval HAL status
2182 */
HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef * hadc)2183 HAL_StatusTypeDef HAL_ADCEx_EnableInjectedQueue(ADC_HandleTypeDef *hadc)
2184 {
2185 HAL_StatusTypeDef tmp_hal_status;
2186 uint32_t tmp_adc_is_conversion_on_going_regular;
2187 uint32_t tmp_adc_is_conversion_on_going_injected;
2188
2189 /* Check the parameters */
2190 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2191
2192 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
2193 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
2194
2195 /* Parameter can be set only if no conversion is on-going */
2196 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
2197 && (tmp_adc_is_conversion_on_going_injected == 0UL)
2198 )
2199 {
2200 CLEAR_BIT(hadc->Instance->CFGR, ADC_CFGR_JQDIS);
2201
2202 /* Update state, clear previous result related to injected queue overflow */
2203 CLEAR_BIT(hadc->State, HAL_ADC_STATE_INJ_JQOVF);
2204
2205 tmp_hal_status = HAL_OK;
2206 }
2207 else
2208 {
2209 tmp_hal_status = HAL_ERROR;
2210 }
2211
2212 return tmp_hal_status;
2213 }
2214
2215 /**
2216 * @brief Disable Injected Queue
2217 * @note This function sets CFGR register JQDIS bit in order to disable the
2218 * Injected Queue. JQDIS can be written only when ADSTART and JDSTART
2219 * are both equal to 0 to ensure that no regular nor injected
2220 * conversion is ongoing.
2221 * @param hadc ADC handle
2222 * @retval HAL status
2223 */
HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef * hadc)2224 HAL_StatusTypeDef HAL_ADCEx_DisableInjectedQueue(ADC_HandleTypeDef *hadc)
2225 {
2226 HAL_StatusTypeDef tmp_hal_status;
2227 uint32_t tmp_adc_is_conversion_on_going_regular;
2228 uint32_t tmp_adc_is_conversion_on_going_injected;
2229
2230 /* Check the parameters */
2231 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2232
2233 tmp_adc_is_conversion_on_going_regular = LL_ADC_REG_IsConversionOngoing(hadc->Instance);
2234 tmp_adc_is_conversion_on_going_injected = LL_ADC_INJ_IsConversionOngoing(hadc->Instance);
2235
2236 /* Parameter can be set only if no conversion is on-going */
2237 if ((tmp_adc_is_conversion_on_going_regular == 0UL)
2238 && (tmp_adc_is_conversion_on_going_injected == 0UL)
2239 )
2240 {
2241 LL_ADC_INJ_SetQueueMode(hadc->Instance, LL_ADC_INJ_QUEUE_DISABLE);
2242 tmp_hal_status = HAL_OK;
2243 }
2244 else
2245 {
2246 tmp_hal_status = HAL_ERROR;
2247 }
2248
2249 return tmp_hal_status;
2250 }
2251
2252 /**
2253 * @brief Disable ADC voltage regulator.
2254 * @note Disabling voltage regulator allows to save power. This operation can
2255 * be carried out only when ADC is disabled.
2256 * @note To enable again the voltage regulator, the user is expected to
2257 * resort to HAL_ADC_Init() API.
2258 * @param hadc ADC handle
2259 * @retval HAL status
2260 */
HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef * hadc)2261 HAL_StatusTypeDef HAL_ADCEx_DisableVoltageRegulator(ADC_HandleTypeDef *hadc)
2262 {
2263 HAL_StatusTypeDef tmp_hal_status;
2264
2265 /* Check the parameters */
2266 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2267
2268 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2269 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2270 {
2271 LL_ADC_DisableInternalRegulator(hadc->Instance);
2272 tmp_hal_status = HAL_OK;
2273 }
2274 else
2275 {
2276 tmp_hal_status = HAL_ERROR;
2277 }
2278
2279 return tmp_hal_status;
2280 }
2281
2282 /**
2283 * @brief Enter ADC deep-power-down mode
2284 * @note This mode is achieved in setting DEEPPWD bit and allows to save power
2285 * in reducing leakage currents. It is particularly interesting before
2286 * entering stop modes.
2287 * @note Setting DEEPPWD automatically clears ADVREGEN bit and disables the
2288 * ADC voltage regulator. This means that this API encompasses
2289 * HAL_ADCEx_DisableVoltageRegulator(). Additionally, the internal
2290 * calibration is lost.
2291 * @note To exit the ADC deep-power-down mode, the user is expected to
2292 * resort to HAL_ADC_Init() API as well as to relaunch a calibration
2293 * with HAL_ADCEx_Calibration_Start() API or to re-apply a previously
2294 * saved calibration factor.
2295 * @param hadc ADC handle
2296 * @retval HAL status
2297 */
HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef * hadc)2298 HAL_StatusTypeDef HAL_ADCEx_EnterADCDeepPowerDownMode(ADC_HandleTypeDef *hadc)
2299 {
2300 HAL_StatusTypeDef tmp_hal_status;
2301
2302 /* Check the parameters */
2303 assert_param(IS_ADC_ALL_INSTANCE(hadc->Instance));
2304
2305 /* Setting of this feature is conditioned to ADC state: ADC must be ADC disabled */
2306 if (LL_ADC_IsEnabled(hadc->Instance) == 0UL)
2307 {
2308 LL_ADC_EnableDeepPowerDown(hadc->Instance);
2309 tmp_hal_status = HAL_OK;
2310 }
2311 else
2312 {
2313 tmp_hal_status = HAL_ERROR;
2314 }
2315
2316 return tmp_hal_status;
2317 }
2318
2319 /**
2320 * @}
2321 */
2322
2323 /**
2324 * @}
2325 */
2326
2327 #endif /* HAL_ADC_MODULE_ENABLED */
2328 /**
2329 * @}
2330 */
2331
2332 /**
2333 * @}
2334 */
2335
2336 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
2337