1 /* 2 * Copyright © 2023 Google, Inc. 3 * SPDX-License-Identifier: MIT 4 */ 5 6 #ifndef FD6_BARRIER_H_ 7 #define FD6_BARRIER_H_ 8 9 #include "freedreno_context.h" 10 11 /** 12 * Various flush operations that could be needed 13 */ 14 enum fd6_flush { 15 FD6_FLUSH_CCU_COLOR = BIT(0), 16 FD6_FLUSH_CCU_DEPTH = BIT(1), 17 FD6_INVALIDATE_CCU_COLOR = BIT(2), 18 FD6_INVALIDATE_CCU_DEPTH = BIT(3), 19 FD6_FLUSH_CACHE = BIT(4), 20 FD6_INVALIDATE_CACHE = BIT(5), 21 FD6_WAIT_MEM_WRITES = BIT(6), 22 FD6_WAIT_FOR_IDLE = BIT(7), 23 FD6_WAIT_FOR_ME = BIT(8), 24 }; 25 26 template <chip CHIP> 27 void fd6_emit_flushes(struct fd_context *ctx, struct fd_ringbuffer *ring, 28 unsigned flushes); 29 30 template <chip CHIP> 31 void fd6_barrier_flush(struct fd_batch *batch) assert_dt; 32 33 void fd6_barrier_init(struct pipe_context *pctx); 34 35 #endif /* FD6_BARRIER_H_ */ 36