1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef SUPERIO_SCH_5545_EMI_H 4 #define SUPERIO_SCH_5545_EMI_H 5 6 #include <stdlib.h> 7 #include <types.h> 8 9 /* Embedded Memory Interface registers */ 10 #define SCH5545_EMI_HOST_TO_EC_MAILBOX 0x0 11 #define SCH5545_EMI_EC_TO_HOST_MAILBOX 0x1 12 #define SCH5545_EMI_EC_ADDR 0x2 13 #define SCH5545_EMI_EC_DATA 0x4 14 #define SCH5545_EMI_INT_SOURCE 0x8 15 #define SCH5545_EMI_INT_MASK 0xa 16 17 #define EMI_EC_8BIT_ACCESS 0 18 #define EMI_EC_16BIT_ACCESS 1 19 #define EMI_EC_32BIT_ACCESS 2 20 #define EMI_EC_32BIT_AUTO_ACCESS 3 21 22 /** 23 * Reads and returns the base address of EMI from the SuperIO. 24 */ 25 uint16_t sch5545_read_emi_bar(uint8_t sio_port); 26 /** 27 * One must call this function at every stage before using any of the EMI 28 * functions. The base address of EMI interface must not be zero. 29 */ 30 void sch5545_emi_init(uint8_t sio_port); 31 /** 32 * Reads the EC to Host mailbox register and then writes the same content to 33 * clear it. 34 */ 35 void sch5545_emi_ec2h_mailbox_clear(void); 36 /** 37 * Writes the interrupt mask register with 0. 38 */ 39 void sch5545_emi_disable_interrupts(void); 40 /** 41 * Writes the Host to EC mailbox 8bit register with mbox_message. 42 */ 43 void sch5545_emi_h2ec_mbox_write(uint8_t mbox_message); 44 /** 45 * Reads and returns the Host to EC mailbox 8bit register. 46 */ 47 uint8_t sch5545_emi_h2ec_mbox_read(void); 48 /** 49 * Writes the EC to Host mailbox 8bit register with mbox_message. 50 */ 51 void sch5545_emi_ec2h_mbox_write(uint8_t mbox_message); 52 /** 53 * Reads and returns the EC to Host mailbox 8bit register. 54 */ 55 uint8_t sch5545_emi_ec2h_mbox_read(void); 56 /** 57 * Sets the mask for all EC interrupts. 58 */ 59 void sch5545_emi_set_int_mask(uint16_t mask); 60 /** 61 * Sets the EC interrupt mask for LSB in the Interrupt Mask register. 62 */ 63 void sch5545_emi_set_int_mask_low(uint8_t mask); 64 /** 65 * Sets the EC interrupt mask for MSB in the Interrupt Mask register. 66 */ 67 void sch5545_emi_set_int_mask_high(uint8_t mask); 68 /** 69 * Returns LSB of Interrupt mask register. 70 */ 71 uint8_t sch5545_emi_get_int_mask_low(void); 72 /** 73 * Returns MSB of Interrupt mask register. 74 */ 75 uint8_t sch5545_emi_get_int_mask_high(void); 76 /** 77 * Returns the content of interrupt mask register. 78 */ 79 uint16_t sch5545_emi_get_int_mask(void); 80 /** 81 * Clears the interrupt status bits. 82 */ 83 void sch5545_emi_clear_int_src(void); 84 /** 85 * Writes int_src bits to clear the desired interrupt source LSB. 86 */ 87 void sch5545_emi_set_int_src_low(uint8_t int_src); 88 /** 89 * Writes int_src bits to clear the desired interrupt source MSB. 90 */ 91 void sch5545_emi_set_int_src_high(uint8_t int_src); 92 /** 93 * Writes int_src bits to clear the desired interrupt source bits. 94 */ 95 void sch5545_emi_set_int_src(uint16_t int_src); 96 /** 97 * Returns LSB of interrupt source register. 98 */ 99 uint8_t sch5545_emi_get_int_src_low(void); 100 /** 101 * Returns MSB of interrupt source register. 102 */ 103 uint8_t sch5545_emi_get_int_src_high(void); 104 /** 105 * Returns the content of interrupt source register. 106 */ 107 uint16_t sch5545_emi_get_int_src(void); 108 /** 109 * Sets the EC address registers with given addr for indirect access to 110 * Embedded Memory. 111 */ 112 void sch5545_emi_set_ec_addr(uint16_t addr); 113 /** 114 * Return the current EC address used for indirect access to Embedded Memory. 115 */ 116 uint16_t sch5545_emi_read_ec_addr(void); 117 /** 118 * Writes any byte of 4 bytes from the 32bit dword indicated by addr. The 119 * function will automatically align to the matching 32bit dword. 120 */ 121 void sch5545_emi_ec_write8(uint16_t addr, uint8_t data); 122 /** 123 * Writes any word of 2 words from the 32bit dword indicated by addr. The addr 124 * must be aligned to 16bit access, because function programs the right access 125 * mode rounding the address to be written to 16 bit boundary. 126 */ 127 void sch5545_emi_ec_write16(uint16_t addr, uint16_t data); 128 /** 129 * Writes dword of data at the desired address indicated by addr. The addr must 130 * be aligned to 32bit access, because function programs the right access mode 131 * rounding the address to be written to 32 bit boundary. 132 */ 133 void sch5545_emi_ec_write32(uint16_t addr, uint32_t data); 134 /** 135 * Writes an array of dwords at the desired address indicated by addr. The addr 136 * must be aligned to 32bit access, because function programs the right access 137 * mode rounding the address to be written to 32 bit boundary. The address is 138 * autoincremented by each IO write operation automatically. 139 */ 140 void sch5545_emi_ec_write32_bulk(uint16_t addr, const uint32_t *buffer, size_t len); 141 /** 142 * Reads any byte of 4 bytes from the 32bit dword indicated by addr. The 143 * function will automatically align to the matching 32bit dword. 144 */ 145 uint8_t sch5545_emi_ec_read8(uint16_t addr); 146 /** 147 * Reads any word of 2 words from the 32bit dword indicated by addr. The addr 148 * must be aligned to 16bit access, because function programs the right access 149 * mode rounding the address to be read to 16 bit boundary. 150 */ 151 uint16_t sch5545_emi_ec_read16(uint16_t addr); 152 /** 153 * Reads dword of data at the desired address indicated by addr. The addr must 154 * be aligned to 32bit access, because function programs the right access mode 155 * rounding the address to be read to 32 bit boundary. 156 */ 157 uint32_t sch5545_emi_ec_read32(uint16_t addr); 158 /** 159 * Reads a stream of dwords of size len to an array of dwords from the desired 160 * address indicated by addr. The addr must be aligned to 32bit access, because 161 * function programs the right access mode rounding the start address to be 162 * read to 32 bit boundary. The address is autoincremented by each IO read 163 * operation automatically. 164 */ 165 void sch5545_emi_ec_read32_bulk(uint16_t addr, uint32_t *buffer, size_t len); 166 167 #endif /* SUPERIO_SCH_5545_EMI_H */ 168