| /btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| H A D | core_armv8mbl.h | 993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm23.h | 1068 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1169 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_armv8mml.h | 1735 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1869 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm35p.h | 1810 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1944 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm33.h | 1810 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1944 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Include/ |
| H A D | core_armv8mbl.h | 990 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm23.h | 1065 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm3.h | 1256 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/inc/bsp/cmsis/Include/ |
| H A D | core_armv8mbl.h | 1037 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm23.h | 1037 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Include/ |
| H A D | core_armv8mbl.h | 990 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm23.h | 1065 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Core/Include/ |
| H A D | core_armv8mbl.h | 990 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm23.h | 1065 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm3.h | 1256 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Include/ |
| H A D | core_armv8mbl.h | 990 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm23.h | 1065 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm3.h | 1256 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Include/ |
| H A D | core_armv8mbl.h | 990 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm23.h | 1065 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_cm3.h | 1256 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 1237 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| H A D | core_sc300.h | 1219 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 1256 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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| /btstack/port/msp432p401lp-cc256x/CMSIS/ |
| H A D | core_cm4.h | 1378 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
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