1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 3 #ifndef _DENVERTON_NS_IOMAP_H_ 4 #define _DENVERTON_NS_IOMAP_H_ 5 6 /* 7 * Memory Mapped IO bases. 8 */ 9 10 /* Northbridge BARs */ 11 #define DEFAULT_MCHBAR 0xfed10000 /* 16 KB */ 12 13 /* Southbridge internal device IO BARs (Set to match FSP settings) */ 14 #define DEFAULT_PMBASE 0x1800 15 #define DEFAULT_PMBASE_SIZE 0x100 16 #define ACPI_BASE_ADDRESS DEFAULT_PMBASE 17 #define DEFAULT_TCO_BASE 0x400 18 19 /* Southbridge internal device MEM BARs (Set to match FSP settings) */ 20 #define DEFAULT_PCR_BASE 0xfd000000 21 #define DEFAULT_PWRM_BASE 0xfe000000 22 #define DEFAULT_PWRM_SIZE 0x10000 23 #define DEFAULT_SPI_BASE 0xfed01000 24 25 /* "VTD PLATFORM CONFIGURATION" (Set to match FSP settings) */ 26 #define RMRR_USB_BASE_ADDRESS 0x3e2e0000 27 #define RMRR_USB_LIMIT_ADDRESS 0x3e2fffff 28 29 #endif /* _DENVERTON_NS_IOMAP_H_ */ 30