1 /** 2 ****************************************************************************** 3 * @file stm32l4xx_hal_pssi.h 4 * @author MCD Application Team 5 * @brief Header file of PSSI HAL module. 6 ****************************************************************************** 7 * @attention 8 * 9 * <h2><center>© Copyright (c) 2019 STMicroelectronics. 10 * All rights reserved.</center></h2> 11 * 12 * This software component is licensed by ST under BSD 3-Clause license, 13 * the "License"; You may not use this file except in compliance with the 14 * License. You may obtain a copy of the License at: 15 * opensource.org/licenses/BSD-3-Clause 16 * 17 ****************************************************************************** 18 */ 19 20 /* Define to prevent recursive inclusion -------------------------------------*/ 21 #ifndef STM32L4xx_HAL_PSSI_H 22 #define STM32L4xx_HAL_PSSI_H 23 24 #ifdef __cplusplus 25 extern "C" { 26 #endif 27 28 /* Includes ------------------------------------------------------------------*/ 29 #include "stm32l4xx_hal_def.h" 30 31 /** @addtogroup STM32L4xx_HAL_Driver 32 * @{ 33 */ 34 #if defined(PSSI) 35 /** @defgroup PSSI PSSI 36 * @brief PSSI HAL module driver 37 * @{ 38 */ 39 40 #ifdef HAL_PSSI_MODULE_ENABLED 41 42 /* Exported types ------------------------------------------------------------*/ 43 /** @defgroup PSSI_Exported_Types PSSI Exported Types 44 * @{ 45 */ 46 47 48 /** 49 * @brief PSSI Init structure definition 50 */ 51 typedef struct 52 { 53 uint32_t DataWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */ 54 uint32_t BusWidth; /* !< Configures the parallel bus width 8 lines or 16 lines */ 55 uint32_t ControlSignal; /* !< Configures Data enable and Data ready */ 56 uint32_t ClockPolarity; /* !< Configures the PSSI Input Clock polarity */ 57 uint32_t DataEnablePolarity; /* !< Configures the PSSI Data Enable polarity */ 58 uint32_t ReadyPolarity; /* !< Configures the PSSI Ready polarity */ 59 60 } PSSI_InitTypeDef; 61 62 63 /** 64 * @brief HAL PSSI State structures definition 65 */ 66 typedef enum 67 { 68 HAL_PSSI_STATE_RESET = 0x00U, /* !< PSSI not yet initialized or disabled */ 69 HAL_PSSI_STATE_READY = 0x01U, /* !< Peripheral initialized and ready for use */ 70 HAL_PSSI_STATE_BUSY = 0x02U, /* !< An internal process is ongoing */ 71 HAL_PSSI_STATE_BUSY_TX = 0x03U, /* !< Transmit process is ongoing */ 72 HAL_PSSI_STATE_BUSY_RX = 0x04U, /* !< Receive process is ongoing */ 73 HAL_PSSI_STATE_TIMEOUT = 0x05U, /* !< Timeout state */ 74 HAL_PSSI_STATE_ERROR = 0x06U, /* !< PSSI state error */ 75 HAL_PSSI_STATE_ABORT = 0x07U, /* !< PSSI process is aborted */ 76 77 } HAL_PSSI_StateTypeDef; 78 79 /** 80 * @brief PSSI handle Structure definition 81 */ 82 typedef struct __PSSI_HandleTypeDef 83 { 84 PSSI_TypeDef *Instance; /*!< PSSI register base address */ 85 PSSI_InitTypeDef Init; /*!< PSSI Initialization Structure */ 86 uint32_t *pBuffPtr; /*!< PSSI Data buffer */ 87 uint32_t XferCount; /*!< PSSI transfer count */ 88 uint32_t XferSize; /*!< PSSI transfer size */ 89 DMA_HandleTypeDef *hdmatx; /*!< PSSI Tx DMA Handle parameters */ 90 DMA_HandleTypeDef *hdmarx; /*!< PSSI Rx DMA Handle parameters */ 91 92 void (* TxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback */ 93 void (* RxCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback */ 94 void (* ErrorCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer complete callback */ 95 void (* AbortCpltCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI transfer error callback */ 96 97 void (* MspInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp Init callback */ 98 void (* MspDeInitCallback)(struct __PSSI_HandleTypeDef *hpssi); /*!< PSSI Msp DeInit callback */ 99 100 HAL_LockTypeDef Lock; /*!< PSSI lock */ 101 __IO HAL_PSSI_StateTypeDef State; /*!< PSSI transfer state */ 102 __IO uint32_t ErrorCode; /*!< PSSI error code */ 103 104 } PSSI_HandleTypeDef; 105 106 107 /** 108 * @brief HAL PSSI Callback pointer definition 109 */ 110 typedef void (*pPSSI_CallbackTypeDef)(PSSI_HandleTypeDef *hpssi); /*!< Pointer to a PSSI common callback function */ 111 112 113 /** 114 * @brief HAL PSSI Callback ID enumeration definition 115 */ 116 typedef enum 117 { 118 HAL_PSSI_TX_COMPLETE_CB_ID = 0x00U, /*!< PSSI Tx Transfer completed callback ID */ 119 HAL_PSSI_RX_COMPLETE_CB_ID = 0x01U, /*!< PSSI Rx Transfer completed callback ID */ 120 HAL_PSSI_ERROR_CB_ID = 0x03U, /*!< PSSI Error callback ID */ 121 HAL_PSSI_ABORT_CB_ID = 0x04U, /*!< PSSI Abort callback ID */ 122 123 HAL_PSSI_MSPINIT_CB_ID = 0x05U, /*!< PSSI Msp Init callback ID */ 124 HAL_PSSI_MSPDEINIT_CB_ID = 0x06U /*!< PSSI Msp DeInit callback ID */ 125 126 } HAL_PSSI_CallbackIDTypeDef; 127 128 /** 129 * @} 130 */ 131 132 /* Exported constants --------------------------------------------------------*/ 133 /** @defgroup PSSI_Exported_Constants PSSI Exported Constants 134 * @{ 135 */ 136 137 /** @defgroup PSSI_ERROR_CODE PSSI Error Code 138 * @{ 139 */ 140 #define HAL_PSSI_ERROR_NONE 0x00000000U /*!< No error */ 141 #define HAL_PSSI_ERROR_NOT_SUPPORTED 0x00000001U /*!< Not supported operation */ 142 #define HAL_PSSI_ERROR_UNDER_RUN 0x00000002U /*!< FIFO Under-run error */ 143 #define HAL_PSSI_ERROR_OVER_RUN 0x00000004U /*!< FIFO Over-run error */ 144 #define HAL_PSSI_ERROR_DMA 0x00000008U /*!< Dma error */ 145 #define HAL_PSSI_ERROR_TIMEOUT 0x00000010U /*!< Timeout error */ 146 #define HAL_PSSI_ERROR_INVALID_CALLBACK 0x00000020U /*!< Invalid callback error */ 147 148 149 /** 150 * @} 151 */ 152 153 /** @defgroup PSSI_DATA_WIDTH PSSI Data Width 154 * @{ 155 */ 156 157 #define HAL_PSSI_8BITS 0x00000000U /*!< 8 Bits */ 158 #define HAL_PSSI_16BITS 0x00000001U /*!< 16 Bits */ 159 #define HAL_PSSI_32BITS 0x00000002U /*!< 32 Bits */ 160 /** 161 * @} 162 */ 163 164 /** @defgroup PSSI_BUS_WIDTH PSSI Bus Width 165 * @{ 166 */ 167 168 #define HAL_PSSI_8LINES 0x00000000U /*!< 8 data lines */ 169 #define HAL_PSSI_16LINES PSSI_CR_EDM /*!< 16 data lines */ 170 /** 171 * @} 172 */ 173 /** @defgroup PSSI_MODE PSSI mode 174 * @{ 175 */ 176 #define HAL_PSSI_UNIDIRECTIONAL 0x00000000U /*!< Uni-directional mode */ 177 #define HAL_PSSI_BIDIRECTIONAL 0x00000001U /*!< Bi-directional mode */ 178 /** 179 * @} 180 */ 181 182 /** @defgroup PSSI_CONTROL_SIGNAL PSSI Control Signal Configuration 183 * @{ 184 */ 185 #define HAL_PSSI_DE_RDY_DISABLE (0x0U << PSSI_CR_DERDYCFG_Pos) /*!< Neither DE nor RDY are enabled */ 186 #define HAL_PSSI_RDY_ENABLE (0x1U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled */ 187 #define HAL_PSSI_DE_ENABLE (0x2U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled */ 188 #define HAL_PSSI_DE_RDY_ALT_ENABLE (0x3U << PSSI_CR_DERDYCFG_Pos) /*!< Both RDY and DE alternate functions enabled */ 189 #define HAL_PSSI_MAP_RDY_BIDIR_ENABLE (0x4U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on RDY pin */ 190 #define HAL_PSSI_RDY_MAP_ENABLE (0x5U << PSSI_CR_DERDYCFG_Pos) /*!< Only RDY enabled, mapped to DE pin */ 191 #define HAL_PSSI_DE_MAP_ENABLE (0x6U << PSSI_CR_DERDYCFG_Pos) /*!< Only DE enabled, mapped to RDY pin */ 192 #define HAL_PSSI_MAP_DE_BIDIR_ENABLE (0x7U << PSSI_CR_DERDYCFG_Pos) /*!< Bi-directional on DE pin */ 193 194 /** 195 * @} 196 */ 197 198 199 /** @defgroup PSSI_DATA_ENABLE_POLARITY PSSI Data Enable Polarity 200 * @{ 201 */ 202 #define HAL_PSSI_DEPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 203 #define HAL_PSSI_DEPOL_ACTIVE_HIGH PSSI_CR_DEPOL /*!< Active High */ 204 /** 205 * @} 206 */ 207 /** @defgroup PSSI_READY_POLARITY PSSI Ready Polarity 208 * @{ 209 */ 210 #define HAL_PSSI_RDYPOL_ACTIVE_LOW 0x0U /*!< Active Low */ 211 #define HAL_PSSI_RDYPOL_ACTIVE_HIGH PSSI_CR_RDYPOL /*!< Active High */ 212 /** 213 * @} 214 */ 215 216 /** @defgroup PSSI_CLOCK_POLARITY PSSI Clock Polarity 217 * @{ 218 */ 219 #define HAL_PSSI_FALLING_EDGE 0x0U /*!< Falling Edge */ 220 #define HAL_PSSI_RISING_EDGE 0x1U /*!< Rising Edge */ 221 222 223 /** 224 * @} 225 */ 226 227 228 /** @defgroup PSSI_DEFINITION PSSI definitions 229 * @{ 230 */ 231 232 #define PSSI_MAX_NBYTE_SIZE 0x10000U /* 64 KB */ 233 #define PSSI_TIMEOUT_TRANSMIT 0x0000FFFFU /*!< Timeout Value */ 234 235 #define PSSI_CR_OUTEN_INPUT 0x00000000U /*!< Input Mode */ 236 #define PSSI_CR_OUTEN_OUTPUT PSSI_CR_OUTEN /*!< Output Mode */ 237 238 #define PSSI_CR_DMA_ENABLE PSSI_CR_DMAEN /*!< DMA Mode Enable */ 239 #define PSSI_CR_DMA_DISABLE (~PSSI_CR_DMAEN) /*!< DMA Mode Disble */ 240 241 #define PSSI_CR_16BITS PSSI_CR_EDM /*!< 16 Lines Mode */ 242 #define PSSI_CR_8BITS (~PSSI_CR_EDM) /*!< 8 Lines Mode */ 243 244 #define PSSI_FLAG_RTT1B PSSI_SR_RTT1B /*!< 1 Byte Fifo Flag*/ 245 #define PSSI_FLAG_RTT4B PSSI_SR_RTT4B /*!< 4 Bytes Fifo Flag*/ 246 247 248 249 /** 250 * @} 251 */ 252 253 /** @defgroup PSSI_INTERRUPTS PSSI Interrupts 254 * @{ 255 */ 256 257 #define PSSI_FLAG_OVR_RIS PSSI_RIS_OVR_RIS /*!< Overrun, Underrun errors flag */ 258 #define PSSI_FLAG_MASK PSSI_RIS_OVR_RIS_Msk /*!< Overrun, Underrun errors Mask */ 259 #define PSSI_FLAG_OVR_MIS PSSI_MIS_OVR_MIS /*!< Overrun, Underrun masked errors flag */ 260 /** 261 * @} 262 */ 263 264 265 266 /** 267 * @} 268 */ 269 /* Exported macros ------------------------------------------------------------*/ 270 /** @defgroup PSSI_Exported_Macros PSSI Exported Macros 271 * @{ 272 */ 273 274 /** @brief Reset PSSI handle state 275 * @param __HANDLE__ specifies the PSSI handle. 276 * @retval None 277 */ 278 279 #define HAL_PSSI_RESET_HANDLE_STATE(__HANDLE__) do{ \ 280 (__HANDLE__)->State = HAL_PSSI_STATE_RESET;\ 281 (__HANDLE__)->MspInitCallback = NULL; \ 282 (__HANDLE__)->MspDeInitCallback = NULL; \ 283 }while(0) 284 285 286 /** 287 * @brief Enable the PSSI. 288 * @param __HANDLE__ PSSI handle 289 * @retval None. 290 */ 291 #define HAL_PSSI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= PSSI_CR_ENABLE) 292 /** 293 * @brief Disable the PSSI. 294 * @param __HANDLE__ PSSI handle 295 * @retval None. 296 */ 297 #define HAL_PSSI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= (~PSSI_CR_ENABLE)) 298 299 /* PSSI pripheral STATUS */ 300 /** 301 * @brief Get the PSSI pending flags. 302 * @param __HANDLE__ PSSI handle 303 * @param __FLAG__ flag to check. 304 * This parameter can be any combination of the following values: 305 * @arg PSSI_FLAG_RTT1B: FIFO is ready to transfer one byte 306 * @arg PSSI_FLAG_RTT4B: FIFO is ready to transfer four bytes 307 * @retval The state of FLAG. 308 */ 309 310 #define HAL_PSSI_GET_STATUS(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR & (__FLAG__)) 311 312 313 314 /* Interrupt & Flag management */ 315 /** 316 * @brief Get the PSSI pending flags. 317 * @param __HANDLE__ PSSI handle 318 * @param __FLAG__ flag to check. 319 * This parameter can be any combination of the following values: 320 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 321 * @retval The state of FLAG. 322 */ 323 #define HAL_PSSI_GET_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->RIS & (__FLAG__)) 324 325 /** 326 * @brief Clear the PSSI pending flags. 327 * @param __HANDLE__ PSSI handle 328 * @param __FLAG__ specifies the flag to clear. 329 * This parameter can be any combination of the following values: 330 * @arg PSSI_FLAG_OVR_RIS: Data Buffer overrun/underrun error flag 331 * @retval None 332 */ 333 #define HAL_PSSI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) 334 335 /** 336 * @brief Enable the specified PSSI interrupts. 337 * @param __HANDLE__ PSSI handle 338 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be enabled. 339 * This parameter can be any combination of the following values: 340 * @arg PSSI_FLAG_OVR_RIS: Configuration error mask 341 * @retval None 342 */ 343 #define HAL_PSSI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER |= (__INTERRUPT__)) 344 345 /** 346 * @brief Disable the specified PSSI interrupts. 347 * @param __HANDLE__ PSSI handle 348 * @param __INTERRUPT__ specifies the PSSI interrupt sources to be disabled. 349 * This parameter can be any combination of the following values: 350 * @arg PSSI_IT_OVR_IE: Configuration error mask 351 * @retval None 352 */ 353 #define HAL_PSSI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER &= ~(__INTERRUPT__)) 354 355 /** 356 * @brief Check whether the specified PSSI interrupt source is enabled or not. 357 * @param __HANDLE__ PSSI handle 358 * @param __INTERRUPT__ specifies the PSSI interrupt source to check. 359 * This parameter can be one of the following values: 360 * @arg PSSI_IT_OVR_IE: Data Buffer overrun/underrun error interrupt mask 361 * @retval The state of INTERRUPT source. 362 */ 363 #define HAL_PSSI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IER & (__INTERRUPT__)) 364 365 366 /** 367 * @brief Check whether the PSSI Control signal is valid. 368 * @param __CONTROL__ Control signals configuration 369 * @retval Valid or not. 370 */ 371 372 #define IS_PSSI_CONTROL_SIGNAL(__CONTROL__) (((__CONTROL__) == HAL_PSSI_DE_RDY_DISABLE ) || \ 373 ((__CONTROL__) == HAL_PSSI_RDY_ENABLE ) || \ 374 ((__CONTROL__) == HAL_PSSI_DE_ENABLE ) || \ 375 ((__CONTROL__) == HAL_PSSI_DE_RDY_ALT_ENABLE ) || \ 376 ((__CONTROL__) == HAL_PSSI_MAP_RDY_BIDIR_ENABLE ) || \ 377 ((__CONTROL__) == HAL_PSSI_RDY_MAP_ENABLE ) || \ 378 ((__CONTROL__) == HAL_PSSI_DE_MAP_ENABLE ) || \ 379 ((__CONTROL__) == HAL_PSSI_MAP_DE_BIDIR_ENABLE )) 380 381 /** 382 * @brief Check whether the PSSI Bus Width is valid. 383 * @param __BUSWIDTH__ PSSI Bush width 384 * @retval Valid or not. 385 */ 386 387 #define IS_PSSI_BUSWIDTH(__BUSWIDTH__) (((__BUSWIDTH__) == HAL_PSSI_8LINES ) || \ 388 ((__BUSWIDTH__) == HAL_PSSI_16LINES )) 389 390 391 /** 392 * @brief Check whether the PSSI Clock Polarity is valid. 393 * @param __CLOCKPOL__ PSSI Clock Polarity 394 * @retval Valid or not. 395 */ 396 397 #define IS_PSSI_CLOCK_POLARITY(__CLOCKPOL__) (((__CLOCKPOL__) == HAL_PSSI_FALLING_EDGE ) || \ 398 ((__CLOCKPOL__) == HAL_PSSI_RISING_EDGE )) 399 400 /** 401 * @brief Check whether the PSSI Data Enable Polarity is valid. 402 * @param __DEPOL__ PSSI DE Polarity 403 * @retval Valid or not. 404 */ 405 406 #define IS_PSSI_DE_POLARITY(__DEPOL__) (((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_LOW ) || \ 407 ((__DEPOL__) == HAL_PSSI_DEPOL_ACTIVE_HIGH )) 408 409 /** 410 * @brief Check whether the PSSI Ready Polarity is valid. 411 * @param __RDYPOL__ PSSI RDY Polarity 412 * @retval Valid or not. 413 */ 414 415 #define IS_PSSI_RDY_POLARITY(__RDYPOL__) (((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_LOW ) || \ 416 ((__RDYPOL__) == HAL_PSSI_RDYPOL_ACTIVE_HIGH )) 417 /** 418 * @} 419 */ 420 421 422 /* Exported functions --------------------------------------------------------*/ 423 /** @defgroup PSSI_Exported_Functions PSSI Exported Functions 424 * @{ 425 */ 426 427 /** @defgroup PSSI_Exported_Functions_Group1 Initialization and de-initialization functions 428 * @{ 429 */ 430 431 /* Initialization and de-initialization functions *******************************/ 432 HAL_StatusTypeDef HAL_PSSI_Init(PSSI_HandleTypeDef *hpssi); 433 HAL_StatusTypeDef HAL_PSSI_DeInit(PSSI_HandleTypeDef *hpssi); 434 void HAL_PSSI_MspInit(PSSI_HandleTypeDef *hpssi); 435 void HAL_PSSI_MspDeInit(PSSI_HandleTypeDef *hpssi); 436 /* Callbacks Register/UnRegister functions ***********************************/ 437 438 HAL_StatusTypeDef HAL_PSSI_RegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID, pPSSI_CallbackTypeDef pCallback); 439 HAL_StatusTypeDef HAL_PSSI_UnRegisterCallback(PSSI_HandleTypeDef *hpssi, HAL_PSSI_CallbackIDTypeDef CallbackID); 440 441 442 /** 443 * @} 444 */ 445 446 447 /** @defgroup PSSI_Exported_Functions_Group2 IO operation functions 448 * @{ 449 */ 450 451 /* IO operation functions *******************************************************/ 452 HAL_StatusTypeDef HAL_PSSI_Transmit(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 453 HAL_StatusTypeDef HAL_PSSI_Receive(PSSI_HandleTypeDef *hpssi, uint8_t *pData, uint32_t Size, uint32_t Timeout); 454 HAL_StatusTypeDef HAL_PSSI_Transmit_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 455 HAL_StatusTypeDef HAL_PSSI_Receive_DMA(PSSI_HandleTypeDef *hpssi, uint32_t *pData, uint32_t Size); 456 HAL_StatusTypeDef HAL_PSSI_Abort_DMA(PSSI_HandleTypeDef *hpssi); 457 void HAL_PSSI_IRQHandler(PSSI_HandleTypeDef *hpssi); 458 459 /** 460 * @} 461 */ 462 463 /** @defgroup PSSI_Exported_Functions_Group3 Peripheral Control functions 464 * @{ 465 */ 466 467 void HAL_PSSI_TxCpltCallback(PSSI_HandleTypeDef *hpssi); 468 void HAL_PSSI_RxCpltCallback(PSSI_HandleTypeDef *hpssi); 469 void HAL_PSSI_ErrorCallback(PSSI_HandleTypeDef *hpssi); 470 void HAL_PSSI_AbortCpltCallback(PSSI_HandleTypeDef *hpssi); 471 472 473 /** 474 * @} 475 */ 476 477 /** @defgroup PSSI_Exported_Functions_Group4 Peripheral State and Error functions 478 * @{ 479 */ 480 481 /* Peripheral State functions ***************************************************/ 482 HAL_PSSI_StateTypeDef HAL_PSSI_GetState(PSSI_HandleTypeDef *hpssi); 483 uint32_t HAL_PSSI_GetError(PSSI_HandleTypeDef *hpssi); 484 485 /** 486 * @} 487 */ 488 489 /** 490 * @} 491 */ 492 493 /* Private constants ---------------------------------------------------------*/ 494 495 496 /* Private macros ------------------------------------------------------------*/ 497 498 #endif /* HAL_PSSI_MODULE_ENABLED */ 499 /** 500 * @} 501 */ 502 #endif /* PSSI */ 503 504 /** 505 * @} 506 */ 507 508 509 #ifdef __cplusplus 510 } 511 #endif 512 513 #endif /* STM32L4xx_HAL_PSSI_H */ 514 515 516 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ 517