xref: /btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/inc/driver/instances/r_dtc.h (revision 3b5c872a8c45689e8cc17891f01530f5aa5e911c)
1 /***********************************************************************************************************************
2  * Copyright [2015-2017] Renesas Electronics Corporation and/or its licensors. All Rights Reserved.
3  *
4  * This file is part of Renesas SynergyTM Software Package (SSP)
5  *
6  * The contents of this file (the "contents") are proprietary and confidential to Renesas Electronics Corporation
7  * and/or its licensors ("Renesas") and subject to statutory and contractual protections.
8  *
9  * This file is subject to a Renesas SSP license agreement. Unless otherwise agreed in an SSP license agreement with
10  * Renesas: 1) you may not use, copy, modify, distribute, display, or perform the contents; 2) you may not use any name
11  * or mark of Renesas for advertising or publicity purposes or in connection with your use of the contents; 3) RENESAS
12  * MAKES NO WARRANTY OR REPRESENTATIONS ABOUT THE SUITABILITY OF THE CONTENTS FOR ANY PURPOSE; THE CONTENTS ARE PROVIDED
13  * "AS IS" WITHOUT ANY EXPRESS OR IMPLIED WARRANTY, INCLUDING THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A
14  * PARTICULAR PURPOSE, AND NON-INFRINGEMENT; AND 4) RENESAS SHALL NOT BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, OR
15  * CONSEQUENTIAL DAMAGES, INCLUDING DAMAGES RESULTING FROM LOSS OF USE, DATA, OR PROJECTS, WHETHER IN AN ACTION OF
16  * CONTRACT OR TORT, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THE CONTENTS. Third-party contents
17  * included in this file may be subject to different terms.
18  **********************************************************************************************************************/
19 
20 /**********************************************************************************************************************
21  * File Name    : r_dtc.h
22  * Description  : DTC extension of transfer interface.
23  **********************************************************************************************************************/
24 
25 /*******************************************************************************************************************//**
26  * @ingroup HAL_Library
27  * @defgroup DTC DTC
28  * @brief Driver for the Data Transfer Controller (DTC).
29  *
30  * @section DTC_SUMMARY Summary
31  * Extends @ref TRANSFER_API.
32  *
33  * The Data Transfer Controller allows data transfers to occur in place of or in addition to any interrupt. It does not
34  * support data transfers using software start.
35  *
36  * @note The transfer length is limited to 256 (8 bits) in ::TRANSFER_MODE_BLOCK and ::TRANSFER_MODE_REPEAT.
37  * @{
38  **********************************************************************************************************************/
39 
40 #ifndef R_DTC_H
41 #define R_DTC_H
42 
43 /***********************************************************************************************************************
44  * Includes
45  **********************************************************************************************************************/
46 #include "bsp_api.h"
47 #include "r_transfer_api.h"
48 #include "r_dtc_cfg.h"
49 
50 /* Common macro for SSP header files. There is also a corresponding SSP_FOOTER macro at the end of this file. */
51 SSP_HEADER
52 
53 /***********************************************************************************************************************
54  * Macro definitions
55  **********************************************************************************************************************/
56 #define DTC_CODE_VERSION_MAJOR (1U)
57 #define DTC_CODE_VERSION_MINOR (12U)
58 
59 /** Length limited to 256 transfers for repeat and block mode */
60 #define DTC_REPEAT_BLOCK_MAX_LENGTH (0x100)
61 
62 /** Length limited to 65536 transfers for normal mode */
63 #define DTC_NORMAL_MAX_LENGTH (0x10000)
64 
65 /***********************************************************************************************************************
66  * Typedef definitions
67  **********************************************************************************************************************/
68 /** Control block used by driver. DO NOT INITIALIZE - this structure will be initialized in transfer_api_t::open. */
69 typedef struct st_dtc_instance_ctrl
70 {
71     uint32_t     id;         ///< Driver ID
72     elc_event_t  trigger;    ///< Transfer activation event.  Matches event returned by transfer_api_t::infoGet.
73     IRQn_Type    irq;        ///< Transfer activation IRQ, does not apply to all HAL drivers.
74 
75     /** Callback for transfer end interrupt used for ELC software trigger. */
76     void (* p_callback)(transfer_callback_args_t * cb_data);
77 
78     /** Placeholder for user data.  Passed to the user p_callback in ::transfer_callback_args_t. */
79     void const * p_context;
80 } dtc_instance_ctrl_t;
81 
82 /* --------------------  Begin section using anonymous unions  ------------------- */
83 #if defined(__CC_ARM)
84 #pragma push
85 #pragma anon_unions
86 #elif defined(__ICCARM__)
87 #pragma language=extended
88 #elif defined(__GNUC__)
89 /* anonymous unions are enabled by default */
90 #elif defined(__TMS470__)
91 /* anonymous unions are enabled by default */
92 #elif defined(__TASKING__)
93 #pragma warning 586
94 #else // if defined(__CC_ARM)
95 #warning Not supported compiler type
96 #endif // if defined(__CC_ARM)
97 
98 /** DTC Registers. Same as ::transfer_info_t, but uses register names.
99  *  Provided as service to typecast ::transfer_info_t.
100  */
101 typedef struct st_dtc_reg
102 {
103 	///* Mode registers */
104     /*LDRA_INSPECTED 381 S Anonymous structures and unions are allowed in SSP code. */
105     struct
106     {
107         uint32_t : 16;
108         ///* Mode register B */
109     /*LDRA_INSPECTED 381 S Anonymous structures and unions are allowed in SSP code. */
110         union
111         {
112             uint8_t  MRB; ///< Mode Register B
113             ///* MRB bits  */
114     /*LDRA_INSPECTED 381 S Anonymous structures and unions are allowed in SSP code. */
115             struct
116             {
117                 uint8_t        : 2;
118                 uint8_t  DM    : 2;  ///< Transfer Destination Address mode
119                 uint8_t  DTS   : 1;  ///< DTC Transfer Mode Select
120                 uint8_t  DISEL : 1;  ///< DTC Interrupt Select
121                 uint8_t  CHNS  : 1;  ///< DTC Chain Transfer Select
122                 uint8_t  CHNE  : 1;  ///< DTC CHain Transfer Enable
123             }  MRB_b;
124         };
125         ///* Mode register A */
126     /*LDRA_INSPECTED 381 S Anonymous structures and unions are allowed in SSP code. */
127         union
128         {
129             uint8_t  MRA; ///< Mode Register A
130             ///* MRA bits  */
131     /*LDRA_INSPECTED 381 S Anonymous structures and unions are allowed in SSP code. */
132             struct
133             {
134                 uint8_t     : 2;
135                 uint8_t  SM : 2;     ///< Transfer Source Address mode
136                 uint8_t  SZ : 2;     ///< DTC Data Transfer Size
137                 uint8_t  MD : 2;     ///< DTC Transfer Mode Select
138             }  MRA_b;
139         };
140     };
141 
142     void * volatile  SAR;  ///< Source address register
143     void * volatile  DAR;  ///< Destination address register
144     ///* Transfer count registers */
145     /*LDRA_INSPECTED 381 S Anonymous structures and unions are allowed in SSP code. */
146     struct
147     {
148         volatile uint16_t  CRB; ///< Transfer count register B
149         ///* Transfer count register A */
150     /*LDRA_INSPECTED 381 S Anonymous structures and unions are allowed in SSP code. */
151         union
152         {
153             uint16_t  CRA;  ///< Transfer count register A
154             ///* bits */
155     /*LDRA_INSPECTED 381 S Anonymous structures and unions are allowed in SSP code. */
156             struct
157             {
158                 uint8_t  CRAL;    ///< Transfer counter A lower register
159                 uint8_t  CRAH;    ///< Transfer counter B upper register
160             }  CRA_b;
161         };
162     };
163 } dtc_reg_t;
164 
165 /* --------------------  End of section using anonymous unions  ------------------- */
166 #if defined(__CC_ARM)
167 #pragma pop
168 #elif defined(__ICCARM__)
169 /* leave anonymous unions enabled */
170 #elif defined(__GNUC__)
171 /* anonymous unions are enabled by default */
172 #elif defined(__TMS470__)
173 /* anonymous unions are enabled by default */
174 #elif defined(__TASKING__)
175 #pragma warning restore
176 #else // if defined(__CC_ARM)
177 #warning Not supported compiler type
178 #endif // if defined(__CC_ARM)
179 
180 /**********************************************************************************************************************
181  * Exported global variables
182  **********************************************************************************************************************/
183 /** @cond INC_HEADER_DEFS_SEC */
184 /** Filled in Interface API structure for this Instance. */
185 extern const transfer_api_t g_transfer_on_dtc;
186 /** @endcond */
187 
188 /* Common macro for SSP header files. There is also a corresponding SSP_HEADER macro at the top of this file. */
189 SSP_FOOTER
190 
191 #endif /* R_DTC_H */
192 
193 /*******************************************************************************************************************//**
194  * @} (end defgroup DTC)
195  **********************************************************************************************************************/
196