xref: /aosp_15_r20/external/coreboot/src/soc/intel/common/block/irq/Kconfig (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1## SPDX-License-Identifier: GPL-2.0-only
2
3config SOC_INTEL_COMMON_BLOCK_IRQ
4	bool
5	select SOC_INTEL_COMMON_BLOCK_GPIO
6	select SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN
7	help
8	  Intel common block support for assigning PCI IRQs dynamically. This
9	  allows coreboot to control the IRQ assignments. They are passed to the
10	  FSP via UPD, and also exposed to the OS in ACPI tables. The SoC must
11	  provide a list of IRQ programming constraints; this module will avoid
12	  IRQs that are used by GPIOs routed to IOAPIC.
13