xref: /aosp_15_r20/external/coreboot/src/soc/amd/common/block/gpio/Kconfig (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1## SPDX-License-Identifier: GPL-2.0-only
2
3config SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
4	bool
5	depends on SOC_AMD_COMMON_BLOCK_ACPIMMIO
6	help
7	  Select this option to use the newer style banks of GPIO signals.
8	  These are at offsets +0x1500, +0x1600, and +0x1700 from the AcpiMmio
9	  base.
10
11if SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
12
13config SOC_AMD_COMMON_BLOCK_BANKED_GPIOS_NON_SOC_CODEBASE
14	bool
15	help
16	  Select this option when selecting the GPIO bank support from AMD
17	  chipsets outside the soc/ subtree that only support a subset of the
18	  features available on the chipsets inside the soc/ subtree. When this
19	  option is selected, no SMI or SCI event can be configured by the GPIO
20	  code.
21
22endif # SOC_AMD_COMMON_BLOCK_BANKED_GPIOS
23
24config GSC_IRQ_GPIO
25	int
26	help
27	  gpio_interrupt_status() is used to provide interrupt status to TPM layer.
28	  This option specifies the GPIO number.
29