xref: /aosp_15_r20/external/coreboot/src/soc/qualcomm/ipq40xx/Kconfig (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1## SPDX-License-Identifier: GPL-2.0-only
2
3config SOC_QC_IPQ40XX
4	bool
5	default n
6	select ARCH_BOOTBLOCK_ARMV7
7	select ARCH_VERSTAGE_ARMV7
8	select ARCH_ROMSTAGE_ARMV7
9	select ARCH_RAMSTAGE_ARMV7
10	select HAVE_UART_SPECIAL
11	select GENERIC_GPIO_LIB
12
13if SOC_QC_IPQ40XX
14
15config MEMLAYOUT_LD_FILE
16	string
17	default "src/soc/qualcomm/ipq40xx/memlayout.ld"
18
19config GENERIC_UDELAY
20	def_bool n
21
22config VBOOT
23	select VBOOT_STARTS_IN_BOOTBLOCK
24	select VBOOT_SEPARATE_VERSTAGE
25	select VBOOT_RETURN_FROM_VERSTAGE
26	select VBOOT_VBNV_FLASH
27
28config IPQ_QFN_PART
29	bool
30	default n
31	help
32	  Is the SoC a QFN part (as opposed to a BGA part)
33
34config CDT_MBN
35	string "CDT binary blob"
36	default "cdt-AP.DK01.1-C1.bin"
37
38config DDR_MBN
39	string "DDR driver binary blob"
40	default "ddr.mbn"
41
42config TZ_MBN
43	string "TZ binary blob"
44	default "tzbsp_no_xpu.mbn"
45
46config SBL_ELF
47	depends on USE_BLOBS
48	string "file name of the QCA SBL ELF"
49	default "3rdparty/blobs/cpu/qualcomm/ipq40xx/sbl.elf"
50	help
51	  The path and filename of the binary blob containing
52	  ipq40xx early initialization code, as supplied by the
53	  vendor.
54
55config SBL_UTIL_PATH
56	depends on USE_BLOBS
57	string "Path for utils to combine SBL_ELF and bootblock"
58	default "util/qualcomm"
59	help
60	  Path for utils to combine SBL_ELF and bootblock
61
62endif
63