xref: /aosp_15_r20/external/coreboot/src/northbridge/intel/sandybridge/sandybridge.h (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__
4 #define __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__
5 
6 /* Device ID for SandyBridge and IvyBridge */
7 #define BASE_REV_SNB	0x00
8 #define BASE_REV_IVB	0x50
9 #define BASE_REV_MASK	0x50
10 
11 #include "memmap.h"
12 
13 /* Everything below this line is ignored in the DSDT */
14 #ifndef __ASSEMBLER__
15 #include <types.h>
16 
17 /* Chipset types */
18 enum platform_type {
19 	PLATFORM_MOBILE = 0,
20 	PLATFORM_DESKTOP_SERVER,
21 };
22 
23 /* Device 0:0.0 PCI configuration space (Host Bridge) */
24 #define HOST_BRIDGE	PCI_DEV(0, 0, 0)
25 
26 #include "registers/host_bridge.h"
27 
28 /* Devices 0:1.0, 0:1.1, 0:1.2, 0:6.0 PCI configuration space (PCI Express Graphics) */
29 
30 #define AFE_PWRON	0xc24	/* PEG Analog Front-End Power-On */
31 
32 /* Device 0:2.0 PCI configuration space (Graphics Device) */
33 
34 #define MSAC		0x62	/* Multi Size Aperture Control */
35 
36 /*
37  * MCHBAR
38  */
39 
40 #include <northbridge/intel/common/fixed_bars.h>
41 
42 /* As there are many registers, define them on a separate file */
43 #include "registers/mchbar.h"
44 
45 /*
46  * EPBAR - Egress Port Root Complex Register Block
47  */
48 
49 #include "registers/epbar.h"
50 
51 /*
52  * DMIBAR
53  */
54 
55 #include "registers/dmibar.h"
56 
57 bool is_sandybridge(void);
58 
59 void intel_sandybridge_finalize_smm(void);
60 void systemagent_early_init(void);
61 void sandybridge_init_iommu(void);
62 void sandybridge_late_initialization(void);
63 void northbridge_romstage_finalize(void);
64 void early_init_dmi(void);
65 
66 /* mainboard_early_init: Optional callback, run after console init but before raminit. */
67 void mainboard_early_init(int s3resume);
68 void perform_raminit(int s3resume);
69 void report_memory_config(void);
70 enum platform_type get_platform_type(void);
71 
72 #include <device/device.h>
73 
74 struct acpi_rsdp;
75 unsigned long northbridge_write_acpi_tables(const struct device *device, unsigned long start,
76 					    struct acpi_rsdp *rsdp);
77 
78 #endif /* __ASSEMBLER__ */
79 #endif /* __NORTHBRIDGE_INTEL_SANDYBRIDGE_SANDYBRIDGE_H__ */
80