e8(# ',Qualcomm Technologies, Inc. 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VNN[txrx$okays/spi@9940002qcom,geni-spi@@se1` ^+default9`aH3345 Cqup-corequp-configqup-memory VNN[txrx  $disableds0i2c@9980002qcom,geni-i2c@se1b+default9b _ H3345 Cqup-corequp-configqup-memory VNN[txrx $disableds1spi@9980002qcom,geni-spi@se1b _+default9cdH3345 Cqup-corequp-configqup-memory VNN[txrx  $disableds2serial@99c0002qcom,geni-debug-uart@se1d+default9ef `0335GCqup-corequp-config$okays3dma-controller@a00000(2qcom,sm8450-gpi-dmaqcom,sm6350-gpi-dma%&'()*  ~ 0V $disabledshgeniqup@ac00002qcom,geni-se-qup` m-ahbs-ahb11 0C33 Cqup-core  $disableds4i2c@a800002qcom,geni-i2c@se1h+default9g a H3345 Cqup-corequp-configqup-memory Vhh[txrx $disableds5spi@a800002qcom,geni-spi@se1h a+default9ijH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disableds6i2c@a840002qcom,geni-i2c@@se1j+default9k b H3345 Cqup-corequp-configqup-memory Vhh[txrx $disableds7spi@a840002qcom,geni-spi@@se1j b+default9lmH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disableds8i2c@a880002qcom,geni-i2c@se1l+default9n c H3345 Cqup-corequp-configqup-memory Vhh[txrx $disableds9spi@a880002qcom,geni-spi@se1l c+default9opH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disableds:i2c@a8c0002qcom,geni-i2c@se1n+default9q d H3345 Cqup-corequp-configqup-memory Vhh[txrx $disableds;spi@a8c0002qcom,geni-spi@se1n d+default9rsH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disableds<i2c@a900002qcom,geni-i2c@se1p+default9t e H3345 Cqup-corequp-configqup-memory Vhh[txrx $disableds=spi@a900002qcom,geni-spi@se1p e+default9uvH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disableds>i2c@a940002qcom,geni-i2c@@se1r+default9w fH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disableds?spi@a940002qcom,geni-spi@@se1r f+default9xyH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disableds@i2c@a980002qcom,geni-i2c@se1t+default9z kH3345 Cqup-corequp-configqup-memory Vhh[txrx  $disabledsAspi@a980002qcom,geni-spi@se1t k+default9{|H3345 Cqup-corequp-configqup-memory Vhh[txrx  $disabledsBrng@10c30002qcom,sm8450-trngqcom,trng 0sCpcie@1c000002qcom,pcie-sm8450-pcie0P0`` ``yparfdbielbiatuconfig{pci 8` `0`0 }Y}Y`(msi0msi1msi2msi3msi4msi5msi6msi7\1617,*1/11131819111 ]pipepipe_muxphy_piperefauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbuaggre0aggre1 001pci1 ,pciephy ~^ &~`+default9$okaysDphy@1c06000 2qcom,sm8450-qmp-gen3x1-pcie-phy` (1/11121416auxcfg_ahbrefrchngpipe1pcie_0_pipe_clkVD1phyO14_$okayts,pcie@1c080002qcom,pcie-sm8450-pcie1P0@@ @@yparfdbielbiatuconfig{pci 8@ @0@0 }Z}Z`34589:vw(msi0msi1msi2msi3msi4msi5msi6msi7T1C1D-*1:1<1>1E1F11 Vpipepipe_muxphy_piperefauxcfgbus_masterbus_slaveslave_q2addrss_sf_tbuaggre1 001 pci1 -pciephy ~a &~c+default9 $disabledsEphy@1c0e000 2qcom,sm8450-qmp-gen4x2-pcie-phy (1?1<1=1A1Cauxcfg_ahbrefrchngpipe1pcie_1_pipe_clkVD1 phyO1A_ $disableds-interconnect@15000002qcom,sm8450-config-nocPsGinterconnect@16800002qcom,sm8450-system-nochs4interconnect@16c00002qcom,sm8450-pcie-anoclsFinterconnect@16e00002qcom,sm8450-aggre1-nocn1 1 sinterconnect@17000002qcom,sm8450-aggre2-nocp 11 1 * sinterconnect@17400002qcom,sm8450-mmss-noctshwlock@1f400002qcom,tcsr-mutexs(syscon@1fc00002qcom,sm8450-tcsrsysconsgpu@3d000002qcom,adreno-730.1qcom,adreno0#ykgsl_3d0_reg_memorycx_memcx_dbgc ,e $disabledszap-shaderopp-table2operating-points-v2sopp-8180000000opp-791000000/%@opp-734000000+opp-640000000&%opp-599000000#opp-545000000 | @opp-492000000SSopp-421000000@Popp-350000000ܓ@opp-317000000 @@opp-285000000@8opp-220000000 8gmu@3d6a000&2qcom,adreno-gmu-730.1qcom,adreno-gmu0֠P )ygmursccgmu_pdc01hfigmu811-!ahbgmucxoaximemnochubdemetcxgx esopp-table2operating-points-v2sopp-500000000eopp-200000000 @clock-controller@3d900002qcom,sm8450-gpucc*1+1,Vsiommu@3da0000@2qcom,sm8450-smmu-500qcom,adreno-smmuqcom,smmu-500arm,mmu-5008>?@A01-1.gmuhubhlosbusifaceahbsphy@88e300002qcom,sm8450-usb-hs-phyqcom,usb-snps-hs-7nm-phy0$okayD*ref1sphy@88e80002qcom,sm8450-qmp-usb3-dp-phy0 1*11auxrefcom_auxusb3_pipe11 phycommonVD$okayts/ports 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dmic2_clkdata-pinsgpio9 dmic2_datawsa-swr-active-statesclk-pinsgpio10 wsa_swr_clkdata-pinsgpio11 wsa_swr_datawsa2-swr-active-statesclk-pinsgpio15 wsa2_swr_clkdata-pinsgpio16wsa2_swr_datasram@146aa000#2qcom,sm8450-imemsysconsimple-mfdjj pil-reloc@94c2qcom,pil-reloc-info Liommu@15000000!2qcom,sm8450-smmu-500arm,mmu-500Aabcdefghijklmnopqrstuv;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYs0interrupt-controller@17100000 2arm,gic-v3      smsi-controller@171400002arm,gic-v3-its!0s}timer@174200002arm,armv7-timer-mem  Bc$frame@17421000;BB frame@17423000;  B0 $disabledframe@17425000;  BP $disabledframe@17427000;  Bp $disabledframe@17429000;  B $disabledframe@1742b000;  B $disabledframe@1742d000; B $disabledrsc@17a00000 Japps_rsc2qcom,rpmh-rsc@ydrv-0drv-1drv-2drv-3$H X d swbcm-voter2qcom,bcm-votersclock-controller2qcom,sm8450-rpmh-clkVxos*power-controller2qcom,sm8450-rpmhpdesQopp-table2operating-points-v2sopp1sxopp20s%opp38sopp4@s&opp5Psyopp6s'opp7szopp8sopp9s{opp10sopp11@s|opp12Ps}opp13s~opp14sregulators-02qcom,pm8350-rpmh-regulatorstb   , = N _ tsmps10 vreg_s10b_1p8 w@ w@ssmps11 vreg_s11b_0p95  ؀ssmps12 vreg_s12b_1p25 @ \sldo1 vreg_l1b_0p91    sldo2 vreg_l2b_3p07 . . sldo3 vreg_l3b_0p9 @ @ sldo5 vreg_l5b_0p88 m  sldo6 vreg_l6b_1p2 O O sldo7 vreg_l7b_2p5 &5@ &5@ sldo9 vreg_l9b_1p2 O O sregulators-12qcom,pm8350c-rpmh-regulatorstc     +smps1 vreg_s1c_1p86 w@ @ssmps10 vreg_s10c_1p05 B@ sbob vreg_bob - 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