Lines Matching full:n
37 __asm__ volatile ("movc p0.c5, r1, #28\n" in cache_invalid()
38 "nop;nop;nop;nop;nop;nop;nop;nop;\n" in cache_invalid()
47 __asm__ volatile ( "movc r1, p0.c1, #0\n" in cache_enable()
48 "or r1, r1, #0xc\n" in cache_enable()
49 "movc p0.c1, r1, #0\n" in cache_enable()
50 "nop;nop;nop;nop;nop;nop;nop;nop;\n" in cache_enable()
58 __asm__ volatile ( "mov ip, #0\n" in clean_dcache()
59 "movc p0.c5, ip, #10\n" in clean_dcache()
60 "nop; nop; nop; nop; nop; nop; nop; nop\n" in clean_dcache()
70 __asm__ volatile ( "movc %0, p0.c1, #0\n" in icache_status()
71 "and %0, %0, #8\n" in icache_status()
83 __asm__ volatile ( "movc %0, p0.c1, #0\n" in dcache_status()
84 "and %0, %0, #4\n" in dcache_status()
94 __asm__ volatile ( "mov ip, #0\n" in dcache_flush()
95 "movc p0.c5, ip, #14\n" in dcache_flush()
96 "nop; nop; nop; nop; nop; nop; nop; nop\n" in dcache_flush()
104 __asm__ volatile ( "mov r0, #0\n" in icache_invalid()
105 "movc p0.c5, r0, #20\n" in icache_invalid()
106 "nop; nop; nop; nop; nop; nop; nop; nop\n" in icache_invalid()
114 __asm__ volatile ( "mov r0, #0\n" in dcache_invalid()
115 "movc p0.c5, r0, #12\n" in dcache_invalid()
116 "nop; nop; nop; nop; nop; nop; nop; nop\n" in dcache_invalid()
125 __asm__ volatile ( "movc r0, p0.c1, #0\n" in icache_disable()
126 "andn r0, r0, #8\n" in icache_disable()
127 "movc p0.c1, r0, #0\n" in icache_disable()
136 __asm__ volatile ( "movc r0, p0.c1, #0\n" in dcache_disable()
137 "andn r0, r0, #20\n" in dcache_disable()
138 "movc p0.c1, r0, #0\n" in dcache_disable()
147 __asm__ volatile ( "mov r0, #0\n" in icache_enable()
148 "movc p0.c5, r0, #20\n" in icache_enable()
149 "nop; nop; nop; nop; nop; nop; nop; nop\n" in icache_enable()
154 __asm__ volatile ( "movc r0, p0.c1, #0\n" in icache_enable()
155 "or r0, r0, #8\n" in icache_enable()
156 "movc p0.c1, r0, #0\n" in icache_enable()
164 __asm__ volatile ( "mov r0, #0\n" in dcache_enable()
165 "movc p0.c5, r0, #12\n" in dcache_enable()
166 "nop; nop; nop; nop; nop; nop; nop; nop\n" in dcache_enable()
171 __asm__ volatile ( "movc r0, p0.c1, #0\n" in dcache_enable()
172 "or r0, r0, #20\n" in dcache_enable()
173 "movc p0.c1, r0, #0\n" in dcache_enable()
237 __asm__ volatile ( "mov ip, #0\n" in sep6200_reset()
238 "movc p0.c5, ip, #28\n" /*Cache invalidate all*/ in sep6200_reset()
239 "movc p0.c6, ip, #6\n" /*TLB invalidate all*/ in sep6200_reset()
240 "nop;nop;nop;nop;nop;nop;nop;nop;\n" in sep6200_reset()
241 "movc ip, p0.c1, #0\n" /*ctrl register*/ in sep6200_reset()
242 "andn ip, ip, #0x000f\n" /*disable caches and mmu*/ in sep6200_reset()
243 "movc p0.c1, ip, #0\n" in sep6200_reset()
244 "nop\n" in sep6200_reset()
245 "mov pc, %0\n" in sep6200_reset()
246 "nop;nop;nop;nop;nop;nop;nop;nop;\n" in sep6200_reset()
254 rt_kprintf("sep6200 power off not implemented\n"); in sep6200_poweroff()
265 rt_kprintf("Soft reset, Restarting system...\n"); in rt_hw_cpu_reset()
280 rt_kprintf("shutdown...\n"); in rt_hw_cpu_shutdown()