Lines Matching full:target
53 uint32_t current = plic->target_enables.target[core_id].enable[irq_number / 32]; in rt_hw_plic_irq_enable()
57 plic->target_enables.target[core_id].enable[irq_number / 32] = current; in rt_hw_plic_irq_enable()
69 uint32_t current = plic->target_enables.target[core_id].enable[irq_number / 32]; in rt_hw_plic_irq_disable()
73 plic->target_enables.target[core_id].enable[irq_number / 32] = current; in rt_hw_plic_irq_disable()
89 plic->target_enables.target[cpuid].enable[idx] = 0; in rt_hw_interrupt_init()
96 plic->targets.target[cpuid].priority_threshold = 0; in rt_hw_interrupt_init()
123 plic->target_enables.target[cpuid].enable[idx] = 0; in rt_hw_scondary_interrupt_init()
126 plic->targets.target[cpuid].priority_threshold = 0; in rt_hw_scondary_interrupt_init()
189 * After the highest-priority pending interrupt is claimed by a target in handle_irq_m_ext()
191 * pending interrupts might then become visible to the target, and so in handle_irq_m_ext()
205 uint32_t int_num = plic->targets.target[core_id].claim_complete; in handle_irq_m_ext()
207 uint32_t int_threshold = plic->targets.target[core_id].priority_threshold; in handle_irq_m_ext()
209 … plic->targets.target[core_id].priority_threshold = plic->source_priorities.priority[int_num]; in handle_irq_m_ext()
225 plic->targets.target[core_id].claim_complete = int_num; in handle_irq_m_ext()
231 plic->targets.target[core_id].priority_threshold = int_threshold; in handle_irq_m_ext()