Lines Matching full:divider
153 #define PLLMR0_CPU_DIV_MASK 0x00300000 /* CPU clock divider */
209 #define PLLMR1_FWDVA_MASK 0x00070000 /* PLL forward divider A value */
218 #define PLLMR1_FWDVB_MASK 0x00007000 /* PLL forward divider B value */
442 #define CPR_PERD0_SPIDV_MASK 0x000F0000 /* SPI Clock Divider */
446 #define PLLD_FBDV_MASK 0x1F000000 /* PLL feedback divider value */
447 #define PLLD_FWDVA_MASK 0x000F0000 /* PLL forward divider A value */
448 #define PLLD_FWDVB_MASK 0x00000700 /* PLL forward divider B value */
455 #define PERD0_PWMDV_MASK 0xFF000000 /* PWM Divider Mask */
456 #define PERD0_SPIDV_MASK 0x000F0000 /* SPI Divider Mask */
457 #define PERD0_U0DV_MASK 0x0000FF00 /* UART 0 Divider Mask */
458 #define PERD0_U1DV_MASK 0x000000FF /* UART 1 Divider Mask */