Lines Matching full:4
36 #define GIC_DIST_IGROUP(hw_base, n) __REG32((hw_base) + 0x080 + (n/32) * 4)
37 #define GIC_DIST_ENABLE_SET(hw_base, n) __REG32((hw_base) + 0x100 + (n/32) * 4)
38 #define GIC_DIST_ENABLE_CLEAR(hw_base, n) __REG32((hw_base) + 0x180 + (n/32) * 4)
42 #define GIC_DIST_PRI(hw_base, n) __REG32((hw_base) + 0x400 + (n/4) * 4)
43 #define GIC_DIST_TARGET(hw_base, n) __REG32((hw_base) + 0x800 + (n/4) * 4)
44 #define GIC_DIST_CONFIG(hw_base, n) __REG32((hw_base) + 0xc00 + (n/16) * 4)
46 #define GIC_DIST_CPENDSGI(hw_base, n) __REG32((hw_base) + 0xf10 + (n/4) * 4)
99 old_tgt &= ~(0x0FFUL << ((irq % 4)*8)); in arm_gic_set_cpu()
100 old_tgt |= cpumask << ((irq % 4)*8); in arm_gic_set_cpu()
123 (GIC_DIST_ICPIDR2(_gic_table[index].dist_hw_base) >> 4) & 0xf, in arm_gic_dump_type()
164 for (i = 32; i < _gic_max_irq; i += 4) in arm_gic_dist_init()
168 for (i = 0; i < _gic_max_irq; i += 4) in arm_gic_dist_init()
228 GIC_DIST_CPENDSGI(_gic_table[index].dist_hw_base, irq) = target_cpu << (irq % 4); in arm_gic_clear_sgi()