42  * NOTE: This code uses a couple of PPI channels so care should be taken when
231  * I figure this out I am just going to allocate 67 words so we have enough
290      * so no need to apply them every time.  in ble_phy_apply_nrf52840_errata()
507      * delay (the latter only if applicable, so only for TX).  in ble_phy_set_start_time()
610      * less than N+2) so in rare cases actual start time may be 2 ticks earlier  in ble_phy_set_start_now()
612      * to be scheduled 1 or 2 ticks too late so we'll miss it - it's acceptable  in ble_phy_set_start_now()
621  * Function is used to set PPI so that we can time out waiting for a reception
662              * so let's wait a bit longer to be able to talk to them if this  in ble_phy_wfr_enable()
671          * CC[0] is the time of RXEN so adjust for radio ram-up.  in ble_phy_wfr_enable()
678      * Note: on LE Coded EVENT_ADDRESS is fired after TERM1 is received, so  in ble_phy_wfr_enable()
695     /* Enable the disabled interrupt so we time out on events compare */  in ble_phy_wfr_enable()
707      * CC[1] is only used as a reference on RX start, we do not need it here so  in ble_phy_wfr_enable()
799      * On Coded PHY there are CI and TERM1 fields before PDU starts so we need  in ble_phy_rx_xcvr_setup()
931      * packet as this determines pipeline delays so need to figure this out  in ble_phy_get_cur_rx_phy_mode()
1014      * armed) so we may simply miss the slot and set the timer in the past.  in ble_phy_rx_end_isr()
1028     /* XXX: we may have asymmetric phy so next phy may be different... */  in ble_phy_rx_end_isr()
1041      * For now let's set a flag denoting that we are late in RX-TX transition so  in ble_phy_rx_end_isr()
1214          * receiving a packet (with 1 usec precision) so it is possible  it will  in ble_phy_isr()
1218          * case we should not clear DISABLED irq mask so it will be handled as  in ble_phy_isr()
1220          * on purpose and there's nothing more to handle so we can clear mask.  in ble_phy_isr()
1365     /* Set phy channel to an invalid channel so first set channel works */  in ble_phy_init()
1482      * Note that TX and RX states values are the same except for 3rd bit so we  in ble_phy_rx()
1513  * disable so that future PHY transmits/receives will not be encrypted.
1629         /* We're late so let's just try to start RX as soon as possible */  in ble_phy_rx_set_start_time()
1642      * If we enabled receiver but were late, let's return proper error code so  in ble_phy_rx_set_start_time()
1671      * it is moving to disabled state. If so, let it get there.  in ble_phy_tx()
1764  * the chip limits, we "rail" the power level so we dont exceed the min/max