51 …PU_Type, EVENTS_RAMACCERR),   ///< A security violation has been detected for the RAM memory space.
64 /** @brief SPU Non-Secure Callable (NSC) region size. */
67     NRF_SPU_NSC_SIZE_DISABLED = 0, ///< Not defined as a non-secure callable region.
68     NRF_SPU_NSC_SIZE_32B      = 1, ///< Non-Secure Callable region with a 32-byte size
69     NRF_SPU_NSC_SIZE_64B      = 2, ///< Non-Secure Callable region with a 64-byte size
70     NRF_SPU_NSC_SIZE_128B     = 3, ///< Non-Secure Callable region with a 128-byte size
71     NRF_SPU_NSC_SIZE_256B     = 4, ///< Non-Secure Callable region with a 256-byte size
72     NRF_SPU_NSC_SIZE_512B     = 5, ///< Non-Secure Callable region with a 512-byte size
73     NRF_SPU_NSC_SIZE_1024B    = 6, ///< Non-Secure Callable region with a 1024-byte size
74     NRF_SPU_NSC_SIZE_2048B    = 7, ///< Non-Secure Callable region with a 2048-byte size
75     NRF_SPU_NSC_SIZE_4096B    = 8  ///< Non-Secure Callable region with a 4096-byte size
138  * @brief Function for setting up publication configuration of a given SPU event.
171  * domain. Set zero to make it available in secure and non-secure domains.
187  * in secure domain. Set zero to make it available in secure and non-secure domains.
200  * @brief Function for configuring non-secure callable flash region.
203  * @param[in] flash_nsc_id   Non-secure callable flash region ID.
204  * @param[in] flash_nsc_size Non-secure callable flash region size.
215  * @brief Function for configuring non-secure callable RAM region.
218  * @param[in] ram_nsc_id    Non-secure callable RAM region ID.
219  * @param[in] ram_nsc_size  Non-secure callable RAM region size.
220  * @param[in] region_number RAM region number.
247  * @brief Function for configuring security for the RAM region.
252  * @param[in] region_id   RAM region index.
254  * @param[in] permissions RAM region permissions.
269  * @param[in] secure_dma    DMA transfers possible only from RAM memory in secure domain.
298     p_reg->INTENSET = mask;  in nrf_spu_int_enable()
304     p_reg->INTENCLR = mask;  in nrf_spu_int_disable()
310     return (bool)(p_reg->INTENSET & spu_int);  in nrf_spu_int_enable_check()
329     return (p_reg->CAP & SPU_CAP_TZM_Msk ? true : false);  in nrf_spu_tz_is_available()
337     NRFX_ASSERT(!(p_reg->DPPI[dppi_id].LOCK & SPU_DPPI_LOCK_LOCK_Msk));  in nrf_spu_dppi_config_set()
339     p_reg->DPPI[dppi_id].PERM = channels_mask;  in nrf_spu_dppi_config_set()
343         p_reg->DPPI[dppi_id].LOCK = (SPU_DPPI_LOCK_LOCK_Msk);  in nrf_spu_dppi_config_set()
352     NRFX_ASSERT(!(p_reg->GPIOPORT[gpio_port].LOCK & SPU_GPIOPORT_LOCK_LOCK_Msk));  in nrf_spu_gpio_config_set()
354     p_reg->GPIOPORT[gpio_port].PERM = gpio_mask;  in nrf_spu_gpio_config_set()
358         p_reg->GPIOPORT[gpio_port].LOCK = (SPU_GPIOPORT_LOCK_LOCK_Msk);  in nrf_spu_gpio_config_set()
368     NRFX_ASSERT(!(p_reg->FLASHNSC[flash_nsc_id].REGION & SPU_FLASHNSC_REGION_LOCK_Msk));  in nrf_spu_flashnsc_set()
369     NRFX_ASSERT(!(p_reg->FLASHNSC[flash_nsc_id].SIZE & SPU_FLASHNSC_SIZE_LOCK_Msk));  in nrf_spu_flashnsc_set()
371     p_reg->FLASHNSC[flash_nsc_id].REGION = (uint32_t)region_number |  in nrf_spu_flashnsc_set()
373     p_reg->FLASHNSC[flash_nsc_id].SIZE = (uint32_t)flash_nsc_size |  in nrf_spu_flashnsc_set()
383     NRFX_ASSERT(!(p_reg->RAMNSC[ram_nsc_id].REGION & SPU_RAMNSC_REGION_LOCK_Msk));  in nrf_spu_ramnsc_set()
384     NRFX_ASSERT(!(p_reg->RAMNSC[ram_nsc_id].SIZE & SPU_RAMNSC_SIZE_LOCK_Msk));  in nrf_spu_ramnsc_set()
386     p_reg->RAMNSC[ram_nsc_id].REGION = (uint32_t)region_number |  in nrf_spu_ramnsc_set()
388     p_reg->RAMNSC[ram_nsc_id].SIZE = (uint32_t)ram_nsc_size |  in nrf_spu_ramnsc_set()
398     NRFX_ASSERT(!(p_reg->FLASHREGION[region_id].PERM & SPU_FLASHREGION_PERM_LOCK_Msk));  in nrf_spu_flashregion_set()
400     p_reg->FLASHREGION[region_id].PERM = permissions         |  in nrf_spu_flashregion_set()
411     NRFX_ASSERT(!(p_reg->RAMREGION[region_id].PERM & SPU_RAMREGION_PERM_LOCK_Msk));  in nrf_spu_ramregion_set()
413     p_reg->RAMREGION[region_id].PERM = permissions         |  in nrf_spu_ramregion_set()
424     NRFX_ASSERT(p_reg->PERIPHID[peripheral_id].PERM & SPU_PERIPHID_PERM_PRESENT_Msk);  in nrf_spu_peripheral_set()
425     NRFX_ASSERT(!(p_reg->PERIPHID[peripheral_id].PERM & SPU_PERIPHID_PERM_LOCK_Msk));  in nrf_spu_peripheral_set()
427     p_reg->PERIPHID[peripheral_id].PERM =  in nrf_spu_peripheral_set()