Lines Matching +full:ram +full:- +full:up
2 * Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
84 typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
88 } nrf_power_task_t; /*lint -restore */
91 typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
105 } nrf_power_event_t; /*lint -restore */
159 * @brief RAM blocks numbers
163 * Ram blocks has to been used in nrf51.
164 * In new CPU ram is divided into segments and this functionality is depreciated.
165 * For the newer MCU see the PS for mapping between internal RAM and RAM blocks,
178 * @brief RAM blocks masks
192 * @brief RAM power state position of the bits
198 NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */
199 NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */
200 NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */
201 NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */
202 NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */
203 NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched off */
204 NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */
205 NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched off */
209 * @brief RAM power state bit masks
215 …NRF_POWER_ONRAM0_MASK = 1U << NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mod…
216 …NRF_POWER_OFFRAM0_MASK = 1U << NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM bloc…
217 …NRF_POWER_ONRAM1_MASK = 1U << NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mod…
218 …NRF_POWER_OFFRAM1_MASK = 1U << NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM bloc…
219 …NRF_POWER_ONRAM2_MASK = 1U << NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mod…
220 …NRF_POWER_OFFRAM2_MASK = 1U << NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM bloc…
221 …NRF_POWER_ONRAM3_MASK = 1U << NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mod…
222 …NRF_POWER_OFFRAM3_MASK = 1U << NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM bloc…
285 /** Keep RAM section S0 ON in System ON mode */
287 NRF_POWER_RAMPOWER_S1POWER, /**< Keep RAM section S1 ON in System ON mode */
288 NRF_POWER_RAMPOWER_S2POWER, /**< Keep RAM section S2 ON in System ON mode */
289 NRF_POWER_RAMPOWER_S3POWER, /**< Keep RAM section S3 ON in System ON mode */
290 NRF_POWER_RAMPOWER_S4POWER, /**< Keep RAM section S4 ON in System ON mode */
291 NRF_POWER_RAMPOWER_S5POWER, /**< Keep RAM section S5 ON in System ON mode */
292 NRF_POWER_RAMPOWER_S6POWER, /**< Keep RAM section S6 ON in System ON mode */
293 NRF_POWER_RAMPOWER_S7POWER, /**< Keep RAM section S7 ON in System ON mode */
294 NRF_POWER_RAMPOWER_S8POWER, /**< Keep RAM section S8 ON in System ON mode */
295 NRF_POWER_RAMPOWER_S9POWER, /**< Keep RAM section S9 ON in System ON mode */
296 NRF_POWER_RAMPOWER_S10POWER, /**< Keep RAM section S10 ON in System ON mode */
297 NRF_POWER_RAMPOWER_S11POWER, /**< Keep RAM section S11 ON in System ON mode */
298 NRF_POWER_RAMPOWER_S12POWER, /**< Keep RAM section S12 ON in System ON mode */
299 NRF_POWER_RAMPOWER_S13POWER, /**< Keep RAM section S13 ON in System ON mode */
300 NRF_POWER_RAMPOWER_S14POWER, /**< Keep RAM section S14 ON in System ON mode */
301 NRF_POWER_RAMPOWER_S15POWER, /**< Keep RAM section S15 ON in System ON mode */
493 * this indicates that the chip was reset from the on-chip reset generator,
494 * which indicates a power-on-reset or a brown out reset.
524 * Returns the masks of RAM blocks that are powered ON.
536 * The only way to wake up the CPU is by reset.
668 * @brief Turn ON sections in selected RAM block.
675 * @param[in] block RAM block index.
682 * @brief Turn ON sections in selected RAM block.
689 * @param[in] block RAM block index.
696 * @brief Get the mask of ON and retention sections in selected RAM block.
698 * @param[in] block RAM block index.
808 NRF_POWER->INTENSET = int_mask; in nrf_power_int_enable()
813 return (bool)(NRF_POWER->INTENSET & int_mask); in nrf_power_int_enable_check()
818 return NRF_POWER->INTENSET; in nrf_power_int_enable_get()
823 NRF_POWER->INTENCLR = int_mask; in nrf_power_int_disable()
854 return NRF_POWER->RESETREAS; in nrf_power_resetreas_get()
859 NRF_POWER->RESETREAS = mask; in nrf_power_resetreas_clear()
865 return (NRF_POWER->POWERSTATUS & POWER_POWERSTATUS_LTEMODEM_Msk) == in nrf_power_powerstatus_get()
873 return NRF_POWER->RAMSTATUS; in nrf_power_ramstatus_get()
880 NRF_POWER->SYSTEMOFF = POWER_SYSTEMOFF_SYSTEMOFF_Enter; in nrf_power_system_off()
896 uint32_t pofcon = NRF_POWER->POFCON; in nrf_power_pofcon_set()
900 NRF_POWER->POFCON = in nrf_power_pofcon_set()
908 NRF_POWER->POFCON = pofcon; in nrf_power_pofcon_set()
914 uint32_t pofcon = NRF_POWER->POFCON; in nrf_power_pofcon_get()
929 uint32_t pofcon = NRF_POWER->POFCON; in nrf_power_pofcon_vddh_set()
932 NRF_POWER->POFCON = pofcon; in nrf_power_pofcon_vddh_set()
937 return (nrf_power_pof_thrvddh_t)((NRF_POWER->POFCON & in nrf_power_pofcon_vddh_get()
945 if (sizeof(NRF_POWER->GPREGRET) > sizeof(uint32_t)) in nrf_power_gpregret_set()
947 p_gpregret = &((volatile uint32_t *)NRF_POWER->GPREGRET)[0]; in nrf_power_gpregret_set()
951 p_gpregret = &((volatile uint32_t *)&NRF_POWER->GPREGRET)[0]; in nrf_power_gpregret_set()
959 if (sizeof(NRF_POWER->GPREGRET) > sizeof(uint32_t)) in nrf_power_gpregret_get()
961 p_gpregret = &((volatile uint32_t *)NRF_POWER->GPREGRET)[0]; in nrf_power_gpregret_get()
965 p_gpregret = &((volatile uint32_t *)&NRF_POWER->GPREGRET)[0]; in nrf_power_gpregret_get()
973 NRF_POWER->GPREGRET[reg_num] = val; in nrf_power_gpregret_ext_set()
976 NRF_POWER->GPREGRET = val; in nrf_power_gpregret_ext_set()
983 return NRF_POWER->GPREGRET[reg_num]; in nrf_power_gpregret_ext_get()
986 return NRF_POWER->GPREGRET; in nrf_power_gpregret_ext_get()
993 NRF_POWER->GPREGRET2 = val; in nrf_power_gpregret2_set()
998 return NRF_POWER->GPREGRET2; in nrf_power_gpregret2_get()
1005 NRF_POWER->DCDCEN = (enable ? in nrf_power_dcdcen_set()
1012 return (NRF_POWER->DCDCEN & POWER_DCDCEN_DCDCEN_Msk) in nrf_power_dcdcen_get()
1021 NRFX_ASSERT(block < NRFX_ARRAY_SIZE(NRF_POWER->RAM)); in nrf_power_rampower_mask_on()
1022 NRF_POWER->RAM[block].POWERSET = section_mask; in nrf_power_rampower_mask_on()
1027 NRFX_ASSERT(block < NRFX_ARRAY_SIZE(NRF_POWER->RAM)); in nrf_power_rampower_mask_off()
1028 NRF_POWER->RAM[block].POWERCLR = section_mask; in nrf_power_rampower_mask_off()
1033 NRFX_ASSERT(block < NRFX_ARRAY_SIZE(NRF_POWER->RAM)); in nrf_power_rampower_mask_get()
1034 return NRF_POWER->RAM[block].POWER; in nrf_power_rampower_mask_get()
1041 NRF_POWER->DCDCEN0 = (enable ? in nrf_power_dcdcen_vddh_set()
1048 return (NRF_POWER->DCDCEN0 & POWER_DCDCEN0_DCDCEN_Msk) in nrf_power_dcdcen_vddh_get()
1055 return (nrf_power_mainregstatus_t)(((NRF_POWER->MAINREGSTATUS) & in nrf_power_mainregstatus_get()
1064 return NRF_POWER->USBREGSTATUS; in nrf_power_usbregstatus_get()