Lines Matching full:after

92     bool                 hold_bus_uninit;     ///< Hold pull up state on gpio pins after uninit.
107 #define NRFX_TWIM_FLAG_TX_POSTINC          (1UL << 0) /**< TX buffer address incremented after tran…
108 #define NRFX_TWIM_FLAG_RX_POSTINC          (1UL << 1) /**< RX buffer address incremented after tran…
109 #define NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppres…
120     NRFX_TWIM_EVT_ADDRESS_NACK, ///< Error event: NACK received after sending the address.
121     NRFX_TWIM_EVT_DATA_NACK     ///< Error event: NACK received after sending a data byte.
263  *                       after the transfer has completed successfully (allowing
270  * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK  If NACK received after sending the address in polling mode.
271  * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK  If NACK received after sending a data byte in polling mode.
296 …* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK    If NACK received after sending the address in polling mo…
297 …* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK    If NACK received after sending a data byte in polling mo…
317 …* - @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER<span></span>: No user event handler after transfer com…
322 …*   After the transfer is set up, a set of transfers can be triggered by PPI that will read, for e…
327  * - @ref NRFX_TWIM_FLAG_TX_NO_STOP<span></span>: No stop condition after TX transfer.
351  * @retval NRFX_ERROR_DRV_TWI_ERR_ANACK    If NACK received after sending the address.
352  * @retval NRFX_ERROR_DRV_TWI_ERR_DNACK    If NACK received after sending a data byte.