Lines Matching +full:ram +full:- +full:up

2  * Copyright (c) 2015 - 2018, Nordic Semiconductor ASA
107     uint8_t orc;          ///< Over-run character.
163 #define NRFX_SPIM_FLAG_HOLD_XFER           (1UL << 3) /**< Set up the transfer but do not start it.…
178  * @brief Macro for setting up single transfer descriptor.
267  * - @ref NRFX_SPIM_FLAG_TX_POSTINC and @ref NRFX_SPIM_FLAG_RX_POSTINC<span></span>:
268  *   Post-incrementation of buffer addresses. Supported only by SPIM.
269  * - @ref NRFX_SPIM_FLAG_HOLD_XFER<span></span>: Driver is not starting the transfer. Use this
272  * - @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER<span></span>: No user event handler after transfer
275  *   busy state, so you must ensure that the next transfers are set up when SPIM is not active.
279  * - @ref NRFX_SPIM_FLAG_REPEATED_XFER<span></span>: Prepare for repeated transfers. You can set
280  *   up a number of transfers that will be triggered externally (for example by PPI). An example is
283  *   transfer is set up, a set of transfers can be triggered by PPI that will read, for example,
284  *   the same register of an external component and put it into a RAM buffer without any interrupts.
288  *   transfers are set up when SPIM is not active. Supported only by SPIM.
291  *       to be placed in the Data RAM region. If this condition is not met,
302  *                                  RAM region.
316  *       to be placed in the Data RAM region. If this condition is not met,
326  *                    into command bytes and data bytes is @ref NRF_SPIM_DCX_CNT_ALL_CMD - 1.
335  *                                   RAM region.