1 // SPDX-License-Identifier: GPL-2.0-only
21 #include "syscall-abi.h"
24  * The kernel defines a much larger SVE_VQ_MAX than is expressable in
25  * the architecture, this creates a *lot* of overhead filling the
26  * buffers (especially ZA) on emulated platforms so use the actual
45 	/* random() returns a 32 bit number regardless of the size of long */  in fill_random()
70 	gpr_in[8] = cfg->syscall_nr;  in setup_gpr()
80 	 * GPR x0-x7 may be clobbered, and all others should be preserved.  in check_gpr()
85 				       cfg->name, sve_vl, i,  in check_gpr()
116 					       cfg->name,  in check_fpr()
130 			ksft_print_msg("%s FPSIMD registers non-zero exiting SM\n",  in check_fpr()
131 				       cfg->name);  in check_fpr()
173 				ksft_print_msg("%s SVE VL %d Z%d non-zero\n",  in check_z()
174 					       cfg->name, sve_vl, i);  in check_z()
183 				ksft_print_msg("%s SVE VL %d Z%d low 128 bits changed\n",  in check_z()
184 					       cfg->name, sve_vl, i);  in check_z()
190 				    reg_size - SVE_Z_SHARED_BYTES) != 0)) {  in check_z()
191 				ksft_print_msg("%s SVE VL %d Z%d high bits non-zero\n",  in check_z()
192 					       cfg->name, sve_vl, i);  in check_z()
222 	/* After a syscall the P registers should be zeroed */  in check_p()
227 		ksft_print_msg("%s SVE VL %d predicate registers non-zero\n",  in check_p()
228 			       cfg->name, sve_vl);  in check_p()
250 	 * It is only valid to set a contiguous set of bits starting  in setup_ffr()
252 	 * a syscall just set all bits.  in setup_ffr()
272 	/* After a syscall FFR should be zeroed */  in check_ffr()
277 		ksft_print_msg("%s SVE VL %d FFR non-zero\n",  in check_ffr()
278 			       cfg->name, sve_vl);  in check_ffr()
298 			       cfg->name, svcr_out);  in check_svcr()
303 		ksft_print_msg("%s PSTATE.ZA changed, SVCR %lx != %lx\n",  in check_svcr()
304 			       cfg->name, svcr_in, svcr_out);  in check_svcr()
331 		ksft_print_msg("SME VL %d ZA does not match\n", sme_vl);  in check_za()
373  * Each set of registers has a setup function which is called before
374  * the syscall to fill values in a global variable for loading by the
375  * test code and a check function which validates that the results are
376  * as expected.  Vector lengths are passed everywhere, a vector length
417 			 "%s FPSIMD\n", cfg->name);  in test_one_syscall()
421 		if (ret == -1)  in test_one_syscall()
426 				 "%s SVE VL %d\n", cfg->name, sve_vls[sve]);  in test_one_syscall()
430 			if (ret == -1)  in test_one_syscall()
437 					 "%s SVE VL %d/SME VL %d SM+ZA\n",  in test_one_syscall()
438 					 cfg->name, sve_vls[sve],  in test_one_syscall()
443 					 cfg->name, sve_vls[sve],  in test_one_syscall()
447 					 "%s SVE VL %d/SME VL %d ZA\n",  in test_one_syscall()
448 					 cfg->name, sve_vls[sve],  in test_one_syscall()
455 		if (ret == -1)  in test_one_syscall()
461 				 "%s SME VL %d SM+ZA\n",  in test_one_syscall()
462 				 cfg->name, sme_vls[sme]);  in test_one_syscall()
465 				 cfg->name, sme_vls[sme]);  in test_one_syscall()
467 				 "%s SME VL %d ZA\n",  in test_one_syscall()
468 				 cfg->name, sme_vls[sme]);  in test_one_syscall()
485 		if (vl == -1)  in sve_count_vls()
511 		if (vl == -1)  in sme_count_vls()
527 	/* Ensure we configure a SME VL, used to flag if SVCR is set */  in sme_count_vls()