Lines Matching +full:spe +full:- +full:pmu
1 // SPDX-License-Identifier: GPL-2.0
3 * Arm Statistical Profiling Extensions (SPE) support
4 * Copyright (c) 2017-2018, Arm Ltd.
28 #include "thread-stack.h"
31 #include "util/synthetic-events.h"
33 #include "arm-spe.h"
34 #include "arm-spe-decoder/arm-spe-decoder.h"
35 #include "arm-spe-decoder/arm-spe-pkt-decoder.h"
90 struct arm_spe *spe;
120 static void arm_spe_dump(struct arm_spe *spe __maybe_unused,
130 ". ... ARM SPE data: size %#zx bytes\n",
155 len -= pkt_len;
159 static void arm_spe_dump_event(struct arm_spe *spe, unsigned char *buf,
163 arm_spe_dump(spe, buf, len);
169 struct auxtrace_buffer *buffer = speq->buffer;
170 struct auxtrace_buffer *old_buffer = speq->old_buffer;
173 queue = &speq->spe->queues.queue_array[speq->queue_nr];
180 b->len = 0;
184 speq->buffer = buffer;
187 if (!buffer->data) {
189 int fd = perf_data__fd(speq->spe->session->data);
191 buffer->data = auxtrace_buffer__get_data(buffer, fd);
192 if (!buffer->data)
193 return -ENOMEM;
196 b->len = buffer->size;
197 b->buf = buffer->data;
199 if (b->len) {
202 speq->old_buffer = buffer;
211 static struct arm_spe_queue *arm_spe__alloc_queue(struct arm_spe *spe,
221 speq->event_buf = malloc(PERF_SAMPLE_MAX_SIZE);
222 if (!speq->event_buf)
225 speq->spe = spe;
226 speq->queue_nr = queue_nr;
227 speq->pid = -1;
228 speq->tid = -1;
229 speq->cpu = -1;
230 speq->period_instructions = 0;
237 speq->decoder = arm_spe_decoder_new(¶ms);
238 if (!speq->decoder)
244 zfree(&speq->event_buf);
250 static inline u8 arm_spe_cpumode(struct arm_spe *spe, u64 ip)
252 return ip >= spe->kernel_start ?
257 static void arm_spe_set_pid_tid_cpu(struct arm_spe *spe,
260 struct arm_spe_queue *speq = queue->priv;
263 tid = machine__get_current_tid(spe->machine, speq->cpu);
264 if (tid != -1) {
265 speq->tid = tid;
266 thread__zput(speq->thread);
268 speq->tid = queue->tid;
270 if ((!speq->thread) && (speq->tid != -1)) {
271 speq->thread = machine__find_thread(spe->machine, -1,
272 speq->tid);
275 if (speq->thread) {
276 speq->pid = thread__pid(speq->thread);
277 if (queue->cpu == -1)
278 speq->cpu = thread__cpu(speq->thread);
284 struct arm_spe *spe = speq->spe;
285 int err = machine__set_current_tid(spe->machine, speq->cpu, -1, tid);
290 arm_spe_set_pid_tid_cpu(spe, &spe->queues.queue_array[speq->queue_nr]);
295 static u64 *arm_spe__get_metadata_by_cpu(struct arm_spe *spe, u64 cpu)
299 if (!spe->metadata)
302 for (i = 0; i < spe->metadata_nr_cpu; i++)
303 if (spe->metadata[i][ARM_SPE_CPU] == cpu)
304 return spe->metadata[i];
313 if ((record->op & ARM_SPE_OP_LDST) && (record->op & ARM_SPE_OP_SVE_LDST))
316 if ((record->op & ARM_SPE_OP_OTHER) && (record->op & ARM_SPE_OP_SVE_OTHER))
319 if (record->type & ARM_SPE_SVE_PARTIAL_PRED)
322 if (record->type & ARM_SPE_SVE_EMPTY_PRED)
328 static void arm_spe_prep_sample(struct arm_spe *spe,
333 struct arm_spe_record *record = &speq->decoder->record;
335 if (!spe->timeless_decoding)
336 sample->time = tsc_to_perf_time(record->timestamp, &spe->tc);
338 sample->ip = record->from_ip;
339 sample->cpumode = arm_spe_cpumode(spe, sample->ip);
340 sample->pid = speq->pid;
341 sample->tid = speq->tid;
342 sample->period = 1;
343 sample->cpu = speq->cpu;
344 sample->simd_flags = arm_spe__synth_simd_flags(record);
346 event->sample.header.type = PERF_RECORD_SAMPLE;
347 event->sample.header.misc = sample->cpumode;
348 event->sample.header.size = sizeof(struct perf_event_header);
353 event->header.size = perf_event__sample_event_size(sample, type, 0);
358 arm_spe_deliver_synth_event(struct arm_spe *spe,
365 if (spe->synth_opts.inject) {
366 ret = arm_spe__inject_event(event, sample, spe->sample_type);
371 ret = perf_session__deliver_synth_event(spe->session, event, sample);
373 pr_err("ARM SPE: failed to deliver event, error %d\n", ret);
381 struct arm_spe *spe = speq->spe;
382 struct arm_spe_record *record = &speq->decoder->record;
383 union perf_event *event = speq->event_buf;
386 arm_spe_prep_sample(spe, speq, event, &sample);
390 sample.addr = record->virt_addr;
391 sample.phys_addr = record->phys_addr;
393 sample.weight = record->latency;
395 return arm_spe_deliver_synth_event(spe, speq, event, &sample);
401 struct arm_spe *spe = speq->spe;
402 struct arm_spe_record *record = &speq->decoder->record;
403 union perf_event *event = speq->event_buf;
406 arm_spe_prep_sample(spe, speq, event, &sample);
410 sample.addr = record->to_ip;
411 sample.weight = record->latency;
412 sample.flags = speq->flags;
414 return arm_spe_deliver_synth_event(spe, speq, event, &sample);
420 struct arm_spe *spe = speq->spe;
421 struct arm_spe_record *record = &speq->decoder->record;
422 union perf_event *event = speq->event_buf;
428 speq->period_instructions++;
429 if (speq->period_instructions < spe->instructions_sample_period)
431 speq->period_instructions = 0;
433 arm_spe_prep_sample(spe, speq, event, &sample);
437 sample.addr = record->to_ip;
438 sample.phys_addr = record->phys_addr;
440 sample.period = spe->instructions_sample_period;
441 sample.weight = record->latency;
442 sample.flags = speq->flags;
444 return arm_spe_deliver_synth_event(spe, speq, event, &sample);
467 const struct arm_spe_record *record = &speq->decoder->record;
469 speq->flags = 0;
470 if (record->op & ARM_SPE_OP_BRANCH_ERET) {
471 speq->flags = PERF_IP_FLAG_BRANCH;
473 if (record->type & ARM_SPE_BRANCH_MISS)
474 speq->flags |= PERF_IP_FLAG_BRANCH_MISS;
491 * Neoverse SPE records.
493 if (record->op & ARM_SPE_OP_ST) {
494 data_src->mem_lvl = PERF_MEM_LVL_NA;
495 data_src->mem_lvl_num = PERF_MEM_LVLNUM_NA;
496 data_src->mem_snoop = PERF_MEM_SNOOP_NA;
500 switch (record->source) {
502 data_src->mem_lvl = PERF_MEM_LVL_L1 | PERF_MEM_LVL_HIT;
503 data_src->mem_lvl_num = PERF_MEM_LVLNUM_L1;
504 data_src->mem_snoop = PERF_MEM_SNOOP_NONE;
507 data_src->mem_lvl = PERF_MEM_LVL_L2 | PERF_MEM_LVL_HIT;
508 data_src->mem_lvl_num = PERF_MEM_LVLNUM_L2;
509 data_src->mem_snoop = PERF_MEM_SNOOP_NONE;
512 data_src->mem_lvl = PERF_MEM_LVL_L2 | PERF_MEM_LVL_HIT;
513 data_src->mem_lvl_num = PERF_MEM_LVLNUM_L2;
514 data_src->mem_snoopx = PERF_MEM_SNOOPX_PEER;
517 * We don't know if this is L1, L2 but we do know it was a cache-2-cache
522 data_src->mem_lvl = PERF_MEM_LVL_L3 | PERF_MEM_LVL_HIT;
523 data_src->mem_lvl_num = PERF_MEM_LVLNUM_L3;
524 data_src->mem_snoopx = PERF_MEM_SNOOPX_PEER;
530 data_src->mem_lvl = PERF_MEM_LVL_L3 | PERF_MEM_LVL_HIT;
531 data_src->mem_lvl_num = PERF_MEM_LVLNUM_L3;
532 data_src->mem_snoop = PERF_MEM_SNOOP_HIT;
539 data_src->mem_lvl = PERF_MEM_LVL_REM_CCE1;
540 data_src->mem_lvl_num = PERF_MEM_LVLNUM_ANY_CACHE;
541 data_src->mem_remote = PERF_MEM_REMOTE_REMOTE;
542 data_src->mem_snoopx = PERF_MEM_SNOOPX_PEER;
545 data_src->mem_lvl = PERF_MEM_LVL_LOC_RAM | PERF_MEM_LVL_HIT;
546 data_src->mem_lvl_num = PERF_MEM_LVLNUM_RAM;
547 data_src->mem_snoop = PERF_MEM_SNOOP_NONE;
563 switch (record->source) {
584 record->source);
588 common_record.op = record->op;
600 if (record->type & (ARM_SPE_LLC_ACCESS | ARM_SPE_LLC_MISS)) {
601 data_src->mem_lvl = PERF_MEM_LVL_L3;
603 if (record->type & ARM_SPE_LLC_MISS)
604 data_src->mem_lvl |= PERF_MEM_LVL_MISS;
606 data_src->mem_lvl |= PERF_MEM_LVL_HIT;
607 } else if (record->type & (ARM_SPE_L1D_ACCESS | ARM_SPE_L1D_MISS)) {
608 data_src->mem_lvl = PERF_MEM_LVL_L1;
610 if (record->type & ARM_SPE_L1D_MISS)
611 data_src->mem_lvl |= PERF_MEM_LVL_MISS;
613 data_src->mem_lvl |= PERF_MEM_LVL_HIT;
616 if (record->type & ARM_SPE_REMOTE_ACCESS)
617 data_src->mem_lvl |= PERF_MEM_LVL_REM_CCE1;
624 struct arm_spe *spe = speq->spe;
630 if (spe->metadata_ver == 1) {
633 pr_warning_once("Old SPE metadata, re-record to improve decode accuracy\n");
634 cpuid = perf_env__cpuid(spe->session->evlist->env);
637 /* CPU ID is -1 for per-thread mode */
638 if (speq->cpu < 0) {
640 * On the heterogeneous system, due to CPU ID is -1,
643 if (!spe->is_homogeneous)
647 if (spe->metadata)
648 metadata = spe->metadata[0];
650 metadata = arm_spe__get_metadata_by_cpu(spe, speq->cpu);
675 if (!is_ldst_op(record->op))
678 if (record->op & ARM_SPE_OP_LD)
680 else if (record->op & ARM_SPE_OP_ST)
688 if (record->type & (ARM_SPE_TLB_ACCESS | ARM_SPE_TLB_MISS)) {
691 if (record->type & ARM_SPE_TLB_MISS)
702 const struct arm_spe_record *record = &speq->decoder->record;
703 struct arm_spe *spe = speq->spe;
710 if (spe->sample_flc) {
711 if (record->type & ARM_SPE_L1D_MISS) {
712 err = arm_spe__synth_mem_sample(speq, spe->l1d_miss_id,
718 if (record->type & ARM_SPE_L1D_ACCESS) {
719 err = arm_spe__synth_mem_sample(speq, spe->l1d_access_id,
726 if (spe->sample_llc) {
727 if (record->type & ARM_SPE_LLC_MISS) {
728 err = arm_spe__synth_mem_sample(speq, spe->llc_miss_id,
734 if (record->type & ARM_SPE_LLC_ACCESS) {
735 err = arm_spe__synth_mem_sample(speq, spe->llc_access_id,
742 if (spe->sample_tlb) {
743 if (record->type & ARM_SPE_TLB_MISS) {
744 err = arm_spe__synth_mem_sample(speq, spe->tlb_miss_id,
750 if (record->type & ARM_SPE_TLB_ACCESS) {
751 err = arm_spe__synth_mem_sample(speq, spe->tlb_access_id,
758 if (spe->sample_branch && (record->op & ARM_SPE_OP_BRANCH_ERET)) {
759 err = arm_spe__synth_branch_sample(speq, spe->branch_id);
764 if (spe->sample_remote_access &&
765 (record->type & ARM_SPE_REMOTE_ACCESS)) {
766 err = arm_spe__synth_mem_sample(speq, spe->remote_access_id,
776 if (spe->sample_memory && is_ldst_op(record->op)) {
777 err = arm_spe__synth_mem_sample(speq, spe->memory_id, data_src);
782 if (spe->sample_instructions) {
783 err = arm_spe__synth_instruction_sample(speq, spe->instructions_id, data_src);
793 struct arm_spe *spe = speq->spe;
797 if (!spe->kernel_start)
798 spe->kernel_start = machine__kernel_start(spe->machine);
817 * can correlate samples between Arm SPE trace data and other
824 record = &speq->decoder->record;
825 if (!spe->timeless_decoding && record->context_id != (u64)-1) {
826 ret = arm_spe_set_tid(speq, record->context_id);
830 spe->use_ctx_pkt_for_pid = true;
837 ret = arm_spe_decode(speq->decoder);
844 * Error is detected when decode SPE trace data, continue to
850 record = &speq->decoder->record;
853 if (record->timestamp > speq->timestamp)
854 speq->timestamp = record->timestamp;
861 if (!spe->timeless_decoding && speq->timestamp >= *timestamp) {
862 *timestamp = speq->timestamp;
870 static int arm_spe__setup_queue(struct arm_spe *spe,
874 struct arm_spe_queue *speq = queue->priv;
877 if (list_empty(&queue->head) || speq)
880 speq = arm_spe__alloc_queue(spe, queue_nr);
883 return -ENOMEM;
885 queue->priv = speq;
887 if (queue->cpu != -1)
888 speq->cpu = queue->cpu;
890 if (!speq->on_heap) {
893 if (spe->timeless_decoding)
897 ret = arm_spe_decode(speq->decoder);
905 record = &speq->decoder->record;
907 speq->timestamp = record->timestamp;
908 ret = auxtrace_heap__add(&spe->heap, queue_nr, speq->timestamp);
911 speq->on_heap = true;
917 static int arm_spe__setup_queues(struct arm_spe *spe)
922 for (i = 0; i < spe->queues.nr_queues; i++) {
923 ret = arm_spe__setup_queue(spe, &spe->queues.queue_array[i], i);
931 static int arm_spe__update_queues(struct arm_spe *spe)
933 if (spe->queues.new_data) {
934 spe->queues.new_data = false;
935 return arm_spe__setup_queues(spe);
941 static bool arm_spe__is_timeless_decoding(struct arm_spe *spe)
944 struct evlist *evlist = spe->session->evlist;
952 if ((evsel->core.attr.sample_type & PERF_SAMPLE_TIME))
959 static int arm_spe_process_queues(struct arm_spe *spe, u64 timestamp)
969 if (!spe->heap.heap_cnt)
972 if (spe->heap.heap_array[0].ordinal >= timestamp)
975 queue_nr = spe->heap.heap_array[0].queue_nr;
976 queue = &spe->queues.queue_array[queue_nr];
977 speq = queue->priv;
979 auxtrace_heap__pop(&spe->heap);
981 if (spe->heap.heap_cnt) {
982 ts = spe->heap.heap_array[0].ordinal + 1;
990 * A previous context-switch event has set pid/tid in the machine's context, so
991 * here we need to update the pid/tid in the thread and SPE queue.
993 if (!spe->use_ctx_pkt_for_pid)
994 arm_spe_set_pid_tid_cpu(spe, queue);
998 auxtrace_heap__add(&spe->heap, queue_nr, ts);
1003 ret = auxtrace_heap__add(&spe->heap, queue_nr, ts);
1007 speq->on_heap = false;
1014 static int arm_spe_process_timeless_queues(struct arm_spe *spe, pid_t tid,
1017 struct auxtrace_queues *queues = &spe->queues;
1021 for (i = 0; i < queues->nr_queues; i++) {
1022 struct auxtrace_queue *queue = &spe->queues.queue_array[i];
1023 struct arm_spe_queue *speq = queue->priv;
1025 if (speq && (tid == -1 || speq->tid == tid)) {
1026 speq->time = time_;
1027 arm_spe_set_pid_tid_cpu(spe, queue);
1034 static int arm_spe_context_switch(struct arm_spe *spe, union perf_event *event,
1040 if (!(event->header.misc & PERF_RECORD_MISC_SWITCH_OUT))
1043 pid = event->context_switch.next_prev_pid;
1044 tid = event->context_switch.next_prev_tid;
1045 cpu = sample->cpu;
1047 if (tid == -1)
1050 return machine__set_current_tid(spe->machine, cpu, pid, tid);
1060 struct arm_spe *spe = container_of(session->auxtrace,
1066 if (!tool->ordered_events) {
1067 pr_err("SPE trace requires ordered events\n");
1068 return -EINVAL;
1071 if (sample->time && (sample->time != (u64) -1))
1072 timestamp = perf_time_to_tsc(sample->time, &spe->tc);
1076 if (timestamp || spe->timeless_decoding) {
1077 err = arm_spe__update_queues(spe);
1082 if (spe->timeless_decoding) {
1083 if (event->header.type == PERF_RECORD_EXIT) {
1084 err = arm_spe_process_timeless_queues(spe,
1085 event->fork.tid,
1086 sample->time);
1089 err = arm_spe_process_queues(spe, timestamp);
1093 if (!spe->use_ctx_pkt_for_pid &&
1094 (event->header.type == PERF_RECORD_SWITCH_CPU_WIDE ||
1095 event->header.type == PERF_RECORD_SWITCH))
1096 err = arm_spe_context_switch(spe, event, sample);
1106 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
1109 if (!spe->data_queued) {
1112 int fd = perf_data__fd(session->data);
1115 if (perf_data__is_pipe(session->data)) {
1119 if (data_offset == -1)
1120 return -errno;
1123 err = auxtrace_queues__add_event(&spe->queues, session, event,
1131 arm_spe_dump_event(spe, buffer->data,
1132 buffer->size);
1144 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
1151 if (!tool->ordered_events)
1152 return -EINVAL;
1154 ret = arm_spe__update_queues(spe);
1158 if (spe->timeless_decoding)
1159 return arm_spe_process_timeless_queues(spe, -1,
1160 MAX_TIMESTAMP - 1);
1162 ret = arm_spe_process_queues(spe, MAX_TIMESTAMP);
1166 if (!spe->use_ctx_pkt_for_pid)
1167 ui__warning("Arm SPE CONTEXT packets not found in the traces.\n"
1168 "Matching of TIDs to SPE events could be inaccurate.\n");
1197 u64 *ptr = (u64 *)info->priv;
1202 metadata_size = info->header.size -
1223 per_cpu_sz = (metadata_size - (hdr_sz * sizeof(u64))) / (*nr_cpu);
1246 thread__zput(speq->thread);
1247 arm_spe_decoder_free(speq->decoder);
1248 zfree(&speq->event_buf);
1254 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
1256 struct auxtrace_queues *queues = &spe->queues;
1259 for (i = 0; i < queues->nr_queues; i++) {
1260 arm_spe_free_queue(queues->queue_array[i].priv);
1261 queues->queue_array[i].priv = NULL;
1268 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe,
1271 auxtrace_heap__free(&spe->heap);
1273 session->auxtrace = NULL;
1274 arm_spe__free_metadata(spe->metadata, spe->metadata_nr_cpu);
1275 free(spe);
1281 struct arm_spe *spe = container_of(session->auxtrace, struct arm_spe, auxtrace);
1283 return evsel->core.attr.type == spe->pmu_type;
1287 [ARM_SPE_PMU_TYPE] = " PMU Type :%"PRId64"\n",
1294 [ARM_SPE_PMU_TYPE_V2] = " PMU type v2 :%"PRId64"\n",
1303 [ARM_SPE_CPU_PMU_TYPE] = " PMU Type :%"PRId64"\n",
1307 static void arm_spe_print_info(struct arm_spe *spe, __u64 *arr)
1315 if (spe->metadata_ver == 1) {
1348 if (evsel->core.id && evsel->core.id[0] == id) {
1349 if (evsel->name)
1350 zfree(&evsel->name);
1351 evsel->name = strdup(name);
1358 arm_spe_synth_events(struct arm_spe *spe, struct perf_session *session)
1360 struct evlist *evlist = session->evlist;
1368 if (evsel->core.attr.type == spe->pmu_type) {
1375 pr_debug("No selected events with SPE trace data\n");
1382 attr.sample_type = evsel->core.attr.sample_type &
1387 if (spe->timeless_decoding)
1392 spe->sample_type = attr.sample_type;
1394 attr.exclude_user = evsel->core.attr.exclude_user;
1395 attr.exclude_kernel = evsel->core.attr.exclude_kernel;
1396 attr.exclude_hv = evsel->core.attr.exclude_hv;
1397 attr.exclude_host = evsel->core.attr.exclude_host;
1398 attr.exclude_guest = evsel->core.attr.exclude_guest;
1399 attr.sample_id_all = evsel->core.attr.sample_id_all;
1400 attr.read_format = evsel->core.attr.read_format;
1403 id = evsel->core.id[0] + 1000000000;
1408 if (spe->synth_opts.flc) {
1409 spe->sample_flc = true;
1415 spe->l1d_miss_id = id;
1416 arm_spe_set_event_name(evlist, id, "l1d-miss");
1423 spe->l1d_access_id = id;
1424 arm_spe_set_event_name(evlist, id, "l1d-access");
1428 if (spe->synth_opts.llc) {
1429 spe->sample_llc = true;
1435 spe->llc_miss_id = id;
1436 arm_spe_set_event_name(evlist, id, "llc-miss");
1443 spe->llc_access_id = id;
1444 arm_spe_set_event_name(evlist, id, "llc-access");
1448 if (spe->synth_opts.tlb) {
1449 spe->sample_tlb = true;
1455 spe->tlb_miss_id = id;
1456 arm_spe_set_event_name(evlist, id, "tlb-miss");
1463 spe->tlb_access_id = id;
1464 arm_spe_set_event_name(evlist, id, "tlb-access");
1468 if (spe->synth_opts.branches) {
1469 spe->sample_branch = true;
1475 spe->branch_id = id;
1480 if (spe->synth_opts.remote_access) {
1481 spe->sample_remote_access = true;
1487 spe->remote_access_id = id;
1488 arm_spe_set_event_name(evlist, id, "remote-access");
1492 if (spe->synth_opts.mem) {
1493 spe->sample_memory = true;
1498 spe->memory_id = id;
1503 if (spe->synth_opts.instructions) {
1504 if (spe->synth_opts.period_type != PERF_ITRACE_PERIOD_INSTRUCTIONS) {
1505 pr_warning("Only instruction-based sampling period is currently supported by Arm SPE.\n");
1508 if (spe->synth_opts.period > 1)
1509 pr_warning("Arm SPE has a hardware-based sample period.\n"
1510 "Additional instruction events will be discarded by --itrace\n");
1512 spe->sample_instructions = true;
1514 attr.sample_period = spe->synth_opts.period;
1515 spe->instructions_sample_period = attr.sample_period;
1519 spe->instructions_id = id;
1554 struct perf_record_auxtrace_info *auxtrace_info = &event->auxtrace_info;
1556 struct perf_record_time_conv *tc = &session->time_conv;
1557 struct arm_spe *spe;
1562 if (auxtrace_info->header.size < sizeof(struct perf_record_auxtrace_info) +
1564 return -EINVAL;
1569 pr_err("Failed to parse Arm SPE metadata.\n");
1570 return -EINVAL;
1573 spe = zalloc(sizeof(struct arm_spe));
1574 if (!spe) {
1575 err = -ENOMEM;
1579 err = auxtrace_queues__init(&spe->queues);
1583 spe->session = session;
1584 spe->machine = &session->machines.host; /* No kvm support */
1585 spe->auxtrace_type = auxtrace_info->type;
1587 spe->pmu_type = auxtrace_info->priv[ARM_SPE_PMU_TYPE];
1589 spe->pmu_type = auxtrace_info->priv[ARM_SPE_PMU_TYPE_V2];
1590 spe->metadata = metadata;
1591 spe->metadata_ver = metadata_ver;
1592 spe->metadata_nr_cpu = nr_cpu;
1593 spe->is_homogeneous = arm_spe__is_homogeneous(metadata, nr_cpu);
1595 spe->timeless_decoding = arm_spe__is_timeless_decoding(spe);
1601 * in "spe->tc", which is used for later conversion between clock
1607 spe->tc.time_shift = tc->time_shift;
1608 spe->tc.time_mult = tc->time_mult;
1609 spe->tc.time_zero = tc->time_zero;
1612 spe->tc.time_cycles = tc->time_cycles;
1613 spe->tc.time_mask = tc->time_mask;
1614 spe->tc.cap_user_time_zero = tc->cap_user_time_zero;
1615 spe->tc.cap_user_time_short = tc->cap_user_time_short;
1618 spe->auxtrace.process_event = arm_spe_process_event;
1619 spe->auxtrace.process_auxtrace_event = arm_spe_process_auxtrace_event;
1620 spe->auxtrace.flush_events = arm_spe_flush;
1621 spe->auxtrace.free_events = arm_spe_free_events;
1622 spe->auxtrace.free = arm_spe_free;
1623 spe->auxtrace.evsel_is_auxtrace = arm_spe_evsel_is_auxtrace;
1624 session->auxtrace = &spe->auxtrace;
1626 arm_spe_print_info(spe, &auxtrace_info->priv[0]);
1631 if (session->itrace_synth_opts && session->itrace_synth_opts->set)
1632 spe->synth_opts = *session->itrace_synth_opts;
1634 itrace_synth_opts__set_default(&spe->synth_opts, false);
1636 err = arm_spe_synth_events(spe, session);
1640 err = auxtrace_queues__process_index(&spe->queues, session);
1644 if (spe->queues.populated)
1645 spe->data_queued = true;
1650 auxtrace_queues__free(&spe->queues);
1651 session->auxtrace = NULL;
1653 free(spe);