Lines Matching +full:dynamically +full:- +full:programmable

8 …y executing divide or square root operations. Accounts for integer and floating-point operations.",
130 "BriefDescription": "Mispredicted non-taken conditional branch instructions retired.",
150 …"BriefDescription": "All miss-predicted indirect branch instructions retired (excluding RETs. TSX …
155 …"PublicDescription": "Counts all miss-predicted indirect branch instructions retired (excluding RE…
185 …"PublicDescription": "This is a non-precise version (that is, does not use PEBS) of the event that…
212 …stal clock cycle counts between active hyperthreads, i.e., those in C0 sleep-state. A hyperthread …
220 … event. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
237 … state. It is counted on a dedicated fixed counter, leaving the eight programmable counters availa…
363dynamically changing prefix length of the decoded instruction (by operand size prefix instruction …
377 "BriefDescription": "Number of instructions retired. Fixed Counter - architectural event",
381- an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside…
386 "BriefDescription": "Number of instructions retired. General Counter - architectural event",
391- an Architectural PerfMon event. Counting continues during hardware interrupts, traps, and inside…
413 …"BriefDescription": "Cycles the Backend cluster is recovering after a miss-speculation or a Store …
418 …"PublicDescription": "Counts cycles the Backend cluster is recovering after a miss-speculation or …
456 …icDescription": "Estimated number of Top-down Microarchitecture Analysis slots that got dropped du…
492 …"PublicDescription": "Counts all not software-prefetch load dispatches that hit the fill buffer (F…
502 …iption": "Counts the cycles when at least one uop is delivered by the LSD (Loop-stream detector).",
512 …": "Counts the cycles when optimal number of uops is delivered by the LSD (Loop-stream detector).",
521 …"PublicDescription": "Counts the number of uops delivered to the back-end by the LSD(Loop Stream D…
537 "BriefDescription": "Self-modifying code (SMC) detected.",
541 … "PublicDescription": "Counts self-modifying code (SMC) detected, which causes a machine clear.",
568 …B) being full. This counts cycles that the pipeline back-end blocked uop delivery from the front-e…
585 … This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch misp…
597 …servation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (s…
602 …"BriefDescription": "TMA slots where no uops were being issued due to lack of back-end resources.",
606-down Microarchitecture Analysis (TMA) method's slots where no micro-operations were being issued…
611 …"BriefDescription": "TMA slots available for an unhalted logical processor. Fixed counter - archit…
614-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method (TM…
619 …n": "TMA slots available for an unhalted logical processor. General counter - architectural event",
623-width of the narrowest pipeline as employed by the Top-down Microarchitecture Analysis method. Th…
641 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
650 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
659 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
668 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
677 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
686 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
695 …"PublicDescription": "Counts, on the per-thread basis, cycles during which at least one uop is dis…
700 … "BriefDescription": "Cycles at least 1 micro-op is executed from any thread on physical core.",
705 …"PublicDescription": "Counts cycles when at least 1 micro-op is executed from any thread on physic…
710 … "BriefDescription": "Cycles at least 2 micro-op is executed from any thread on physical core.",
715 …"PublicDescription": "Counts cycles when at least 2 micro-ops are executed from any thread on phys…
720 … "BriefDescription": "Cycles at least 3 micro-op is executed from any thread on physical core.",
725 …"PublicDescription": "Counts cycles when at least 3 micro-ops are executed from any thread on phys…
730 … "BriefDescription": "Cycles at least 4 micro-op is executed from any thread on physical core.",
735 …"PublicDescription": "Counts cycles when at least 4 micro-ops are executed from any thread on phys…
740 "BriefDescription": "Cycles where at least 1 uop was executed per-thread",
745 "PublicDescription": "Cycles where at least 1 uop was executed per-thread.",
750 "BriefDescription": "Cycles where at least 2 uops were executed per-thread",
755 "PublicDescription": "Cycles where at least 2 uops were executed per-thread.",
760 "BriefDescription": "Cycles where at least 3 uops were executed per-thread",
765 "PublicDescription": "Cycles where at least 3 uops were executed per-thread.",
770 "BriefDescription": "Cycles where at least 4 uops were executed per-thread",
775 "PublicDescription": "Cycles where at least 4 uops were executed per-thread.",
791 "BriefDescription": "Counts the number of uops to be executed per-thread each cycle.",
828 …"BriefDescription": "Uops inserted at issue-stage in order to preserve upper bits of vector regist…
832 …tel SSE instruction executed in Dirty Upper State needs to preserve bits 128-255 of the destinatio…