Lines Matching +full:instruction +full:- +full:fetch

5 …ion": "PPC Instructions Finished by this thread when all threads in the core had the run-latch set"
10 …"BriefDescription": "Cycles in which the NTC instruction is not allowed to complete because any of…
15 …"BriefDescription": "Completion stall due to a long latency scalar fixed point instruction (divisi…
20 …"BriefDescription": "Finish stall due to a scalar fixed point or CR instruction in the execution p…
35 …"BriefDescription": "Finish stall because the NTF instruction was a load that missed in the L1 and…
40 …ocessor's Instruction cache was reloaded either shared or modified data from another core's L2/L3 …
45 …"BriefDescription": "Finish stall because the NTF instruction was a load instruction with all its …
50 … "The processor's Instruction cache was reloaded from another chip's L4 on the same Node or Group …
55 …Instruction cache was reloaded with Shared (S) data from another chip's L2 or L3 on the same Node …
90 …"BriefDescription": "Finish stall because the NTF instruction was a load that hit on an older stor…
100 …Instruction cache was reloaded with Modified (M) data from another chip's L2 or L3 on the same Nod…
105 …  "BriefDescription": "Finish stall because the NTF instruction was a larx waiting to be satisfied"