Lines Matching +full:2 +full:- +full:5
1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
21 * C5.2, version:ARM DDI 0487A.f)
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
36 #define Op2_shift 5
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
98 #define PSTATE_DIT pstate_field(3, 2)
112 /* Register-based PAN access, for save/restore purposes */
113 #define SYS_PSTATE_PAN sys_reg(3, 0, 4, 2, 3)
120 #define SYS_DC_ISW sys_insn(1, 0, 7, 6, 2)
123 #define SYS_DC_CSW sys_insn(1, 0, 7, 10, 2)
126 #define SYS_DC_CISW sys_insn(1, 0, 7, 14, 2)
131 #define SYS_IC_IALLU sys_insn(1, 0, 7, 5, 0)
132 #define SYS_IC_IVAU sys_insn(1, 3, 7, 5, 1)
136 #define SYS_DC_IGDVAC sys_insn(1, 0, 7, 6, 5)
140 #define SYS_DC_CGDVAC sys_insn(1, 3, 7, 10, 5)
146 #define SYS_DC_CGDVAP sys_insn(1, 3, 7, 12, 5)
150 #define SYS_DC_CGDVADP sys_insn(1, 3, 7, 13, 5)
154 #define SYS_DC_CIGDVAC sys_insn(1, 3, 7, 14, 5)
167 #include "asm/sysreg-defs.h"
173 #define SYS_SVCR_SMSTOP_SM_EL0 sys_reg(0, 3, 4, 2, 3)
177 #define SYS_DBGBVRn_EL1(n) sys_reg(2, 0, 0, n, 4)
178 #define SYS_DBGBCRn_EL1(n) sys_reg(2, 0, 0, n, 5)
179 #define SYS_DBGWVRn_EL1(n) sys_reg(2, 0, 0, n, 6)
180 #define SYS_DBGWCRn_EL1(n) sys_reg(2, 0, 0, n, 7)
181 #define SYS_MDRAR_EL1 sys_reg(2, 0, 1, 0, 0)
183 #define SYS_OSLSR_EL1 sys_reg(2, 0, 1, 1, 4)
189 #define SYS_OSDLR_EL1 sys_reg(2, 0, 1, 3, 4)
190 #define SYS_DBGPRCR_EL1 sys_reg(2, 0, 1, 4, 4)
191 #define SYS_DBGCLAIMSET_EL1 sys_reg(2, 0, 7, 8, 6)
192 #define SYS_DBGCLAIMCLR_EL1 sys_reg(2, 0, 7, 9, 6)
193 #define SYS_DBGAUTHSTATUS_EL1 sys_reg(2, 0, 7, 14, 6)
194 #define SYS_MDCCSR_EL0 sys_reg(2, 3, 0, 1, 0)
195 #define SYS_DBGDTR_EL0 sys_reg(2, 3, 0, 4, 0)
196 #define SYS_DBGDTRRX_EL0 sys_reg(2, 3, 0, 5, 0)
197 #define SYS_DBGDTRTX_EL0 sys_reg(2, 3, 0, 5, 0)
198 #define SYS_DBGVCR32_EL2 sys_reg(2, 4, 0, 7, 0)
200 #define SYS_BRBINF_EL1(n) sys_reg(2, 1, 8, (n & 15), (((n & 16) >> 2) | 0))
201 #define SYS_BRBINFINJ_EL1 sys_reg(2, 1, 9, 1, 0)
202 #define SYS_BRBSRC_EL1(n) sys_reg(2, 1, 8, (n & 15), (((n & 16) >> 2) | 1))
203 #define SYS_BRBSRCINJ_EL1 sys_reg(2, 1, 9, 1, 1)
204 #define SYS_BRBTGT_EL1(n) sys_reg(2, 1, 8, (n & 15), (((n & 16) >> 2) | 2))
205 #define SYS_BRBTGTINJ_EL1 sys_reg(2, 1, 9, 1, 2)
206 #define SYS_BRBTS_EL1 sys_reg(2, 1, 9, 0, 2)
208 #define SYS_BRBCR_EL1 sys_reg(2, 1, 9, 0, 0)
209 #define SYS_BRBFCR_EL1 sys_reg(2, 1, 9, 0, 1)
210 #define SYS_BRBIDR0_EL1 sys_reg(2, 1, 9, 2, 0)
212 #define SYS_TRCITECR_EL1 sys_reg(3, 0, 1, 2, 3)
213 #define SYS_TRCACATR(m) sys_reg(2, 1, 2, ((m & 7) << 1), (2 | (m >> 3)))
214 #define SYS_TRCACVR(m) sys_reg(2, 1, 2, ((m & 7) << 1), (0 | (m >> 3)))
215 #define SYS_TRCAUTHSTATUS sys_reg(2, 1, 7, 14, 6)
216 #define SYS_TRCAUXCTLR sys_reg(2, 1, 0, 6, 0)
217 #define SYS_TRCBBCTLR sys_reg(2, 1, 0, 15, 0)
218 #define SYS_TRCCCCTLR sys_reg(2, 1, 0, 14, 0)
219 #define SYS_TRCCIDCCTLR0 sys_reg(2, 1, 3, 0, 2)
220 #define SYS_TRCCIDCCTLR1 sys_reg(2, 1, 3, 1, 2)
221 #define SYS_TRCCIDCVR(m) sys_reg(2, 1, 3, ((m & 7) << 1), 0)
222 #define SYS_TRCCLAIMCLR sys_reg(2, 1, 7, 9, 6)
223 #define SYS_TRCCLAIMSET sys_reg(2, 1, 7, 8, 6)
224 #define SYS_TRCCNTCTLR(m) sys_reg(2, 1, 0, (4 | (m & 3)), 5)
225 #define SYS_TRCCNTRLDVR(m) sys_reg(2, 1, 0, (0 | (m & 3)), 5)
226 #define SYS_TRCCNTVR(m) sys_reg(2, 1, 0, (8 | (m & 3)), 5)
227 #define SYS_TRCCONFIGR sys_reg(2, 1, 0, 4, 0)
228 #define SYS_TRCDEVARCH sys_reg(2, 1, 7, 15, 6)
229 #define SYS_TRCDEVID sys_reg(2, 1, 7, 2, 7)
230 #define SYS_TRCEVENTCTL0R sys_reg(2, 1, 0, 8, 0)
231 #define SYS_TRCEVENTCTL1R sys_reg(2, 1, 0, 9, 0)
232 #define SYS_TRCEXTINSELR(m) sys_reg(2, 1, 0, (8 | (m & 3)), 4)
233 #define SYS_TRCIDR0 sys_reg(2, 1, 0, 8, 7)
234 #define SYS_TRCIDR10 sys_reg(2, 1, 0, 2, 6)
235 #define SYS_TRCIDR11 sys_reg(2, 1, 0, 3, 6)
236 #define SYS_TRCIDR12 sys_reg(2, 1, 0, 4, 6)
237 #define SYS_TRCIDR13 sys_reg(2, 1, 0, 5, 6)
238 #define SYS_TRCIDR1 sys_reg(2, 1, 0, 9, 7)
239 #define SYS_TRCIDR2 sys_reg(2, 1, 0, 10, 7)
240 #define SYS_TRCIDR3 sys_reg(2, 1, 0, 11, 7)
241 #define SYS_TRCIDR4 sys_reg(2, 1, 0, 12, 7)
242 #define SYS_TRCIDR5 sys_reg(2, 1, 0, 13, 7)
243 #define SYS_TRCIDR6 sys_reg(2, 1, 0, 14, 7)
244 #define SYS_TRCIDR7 sys_reg(2, 1, 0, 15, 7)
245 #define SYS_TRCIDR8 sys_reg(2, 1, 0, 0, 6)
246 #define SYS_TRCIDR9 sys_reg(2, 1, 0, 1, 6)
247 #define SYS_TRCIMSPEC(m) sys_reg(2, 1, 0, (m & 7), 7)
248 #define SYS_TRCITEEDCR sys_reg(2, 1, 0, 2, 1)
249 #define SYS_TRCOSLSR sys_reg(2, 1, 1, 1, 4)
250 #define SYS_TRCPRGCTLR sys_reg(2, 1, 0, 1, 0)
251 #define SYS_TRCQCTLR sys_reg(2, 1, 0, 1, 1)
252 #define SYS_TRCRSCTLR(m) sys_reg(2, 1, 1, (m & 15), (0 | (m >> 4)))
253 #define SYS_TRCRSR sys_reg(2, 1, 0, 10, 0)
254 #define SYS_TRCSEQEVR(m) sys_reg(2, 1, 0, (m & 3), 4)
255 #define SYS_TRCSEQRSTEVR sys_reg(2, 1, 0, 6, 4)
256 #define SYS_TRCSEQSTR sys_reg(2, 1, 0, 7, 4)
257 #define SYS_TRCSSCCR(m) sys_reg(2, 1, 1, (m & 7), 2)
258 #define SYS_TRCSSCSR(m) sys_reg(2, 1, 1, (8 | (m & 7)), 2)
259 #define SYS_TRCSSPCICR(m) sys_reg(2, 1, 1, (m & 7), 3)
260 #define SYS_TRCSTALLCTLR sys_reg(2, 1, 0, 11, 0)
261 #define SYS_TRCSTATR sys_reg(2, 1, 0, 3, 0)
262 #define SYS_TRCSYNCPR sys_reg(2, 1, 0, 13, 0)
263 #define SYS_TRCTRACEIDR sys_reg(2, 1, 0, 0, 1)
264 #define SYS_TRCTSCTLR sys_reg(2, 1, 0, 12, 0)
265 #define SYS_TRCVICTLR sys_reg(2, 1, 0, 0, 2)
266 #define SYS_TRCVIIECTLR sys_reg(2, 1, 0, 1, 2)
267 #define SYS_TRCVIPCSSCTLR sys_reg(2, 1, 0, 3, 2)
268 #define SYS_TRCVISSCTLR sys_reg(2, 1, 0, 2, 2)
269 #define SYS_TRCVMIDCCTLR0 sys_reg(2, 1, 3, 2, 2)
270 #define SYS_TRCVMIDCCTLR1 sys_reg(2, 1, 3, 3, 2)
271 #define SYS_TRCVMIDCVR(m) sys_reg(2, 1, 3, ((m & 7) << 1), 1)
274 #define SYS_TRCOSLAR sys_reg(2, 1, 1, 0, 4)
276 #define SYS_BRBCR_EL2 sys_reg(2, 4, 9, 0, 0)
279 #define SYS_MPIDR_EL1 sys_reg(3, 0, 0, 0, 5)
283 #define SYS_RGSR_EL1 sys_reg(3, 0, 1, 0, 5)
286 #define SYS_TCR_EL1 sys_reg(3, 0, 2, 0, 2)
288 #define SYS_APIAKEYLO_EL1 sys_reg(3, 0, 2, 1, 0)
289 #define SYS_APIAKEYHI_EL1 sys_reg(3, 0, 2, 1, 1)
290 #define SYS_APIBKEYLO_EL1 sys_reg(3, 0, 2, 1, 2)
291 #define SYS_APIBKEYHI_EL1 sys_reg(3, 0, 2, 1, 3)
293 #define SYS_APDAKEYLO_EL1 sys_reg(3, 0, 2, 2, 0)
294 #define SYS_APDAKEYHI_EL1 sys_reg(3, 0, 2, 2, 1)
295 #define SYS_APDBKEYLO_EL1 sys_reg(3, 0, 2, 2, 2)
296 #define SYS_APDBKEYHI_EL1 sys_reg(3, 0, 2, 2, 3)
298 #define SYS_APGAKEYLO_EL1 sys_reg(3, 0, 2, 3, 0)
299 #define SYS_APGAKEYHI_EL1 sys_reg(3, 0, 2, 3, 1)
306 #define SYS_AFSR0_EL1 sys_reg(3, 0, 5, 1, 0)
307 #define SYS_AFSR1_EL1 sys_reg(3, 0, 5, 1, 1)
308 #define SYS_ESR_EL1 sys_reg(3, 0, 5, 2, 0)
310 #define SYS_ERRIDR_EL1 sys_reg(3, 0, 5, 3, 0)
311 #define SYS_ERRSELR_EL1 sys_reg(3, 0, 5, 3, 1)
312 #define SYS_ERXFR_EL1 sys_reg(3, 0, 5, 4, 0)
313 #define SYS_ERXCTLR_EL1 sys_reg(3, 0, 5, 4, 1)
314 #define SYS_ERXSTATUS_EL1 sys_reg(3, 0, 5, 4, 2)
315 #define SYS_ERXADDR_EL1 sys_reg(3, 0, 5, 4, 3)
316 #define SYS_ERXPFGF_EL1 sys_reg(3, 0, 5, 4, 4)
317 #define SYS_ERXPFGCTL_EL1 sys_reg(3, 0, 5, 4, 5)
318 #define SYS_ERXPFGCDN_EL1 sys_reg(3, 0, 5, 4, 6)
319 #define SYS_ERXMISC0_EL1 sys_reg(3, 0, 5, 5, 0)
320 #define SYS_ERXMISC1_EL1 sys_reg(3, 0, 5, 5, 1)
321 #define SYS_ERXMISC2_EL1 sys_reg(3, 0, 5, 5, 2)
322 #define SYS_ERXMISC3_EL1 sys_reg(3, 0, 5, 5, 3)
323 #define SYS_TFSR_EL1 sys_reg(3, 0, 5, 6, 0)
324 #define SYS_TFSRE0_EL1 sys_reg(3, 0, 5, 6, 1)
352 BIT_ULL(6) | BIT_ULL(4) | BIT_ULL(2) | BIT_ULL(0))
369 #define TRBSR_EL1_BSC_MASK GENMASK(5, 0)
373 #define SYS_PMINTENCLR_EL1 sys_reg(3, 0, 9, 14, 2)
377 #define SYS_MAIR_EL1 sys_reg(3, 0, 10, 2, 0)
385 #define SYS_ICC_HPPIR0_EL1 sys_reg(3, 0, 12, 8, 2)
390 #define SYS_ICC_AP0R2_EL1 SYS_ICC_AP0Rn_EL1(2)
395 #define SYS_ICC_AP1R2_EL1 SYS_ICC_AP1Rn_EL1(2)
399 #define SYS_ICC_SGI1R_EL1 sys_reg(3, 0, 12, 11, 5)
404 #define SYS_ICC_HPPIR1_EL1 sys_reg(3, 0, 12, 12, 2)
407 #define SYS_ICC_SRE_EL1 sys_reg(3, 0, 12, 12, 5)
411 #define SYS_ACCDATA_EL1 sys_reg(3, 0, 13, 0, 5)
417 #define SYS_RNDR_EL0 sys_reg(3, 3, 2, 4, 0)
418 #define SYS_RNDRRS_EL0 sys_reg(3, 3, 2, 4, 1)
422 #define SYS_PMCNTENCLR_EL0 sys_reg(3, 3, 9, 12, 2)
429 #define SYS_PMXEVCNTR_EL0 sys_reg(3, 3, 9, 13, 2)
433 #define SYS_TPIDR_EL0 sys_reg(3, 3, 13, 0, 2)
435 #define SYS_TPIDR2_EL0 sys_reg(3, 3, 13, 0, 5)
441 #define SYS_AMCR_EL0 SYS_AM_EL0(2, 0)
442 #define SYS_AMCFGR_EL0 SYS_AM_EL0(2, 1)
443 #define SYS_AMCGCR_EL0 SYS_AM_EL0(2, 2)
444 #define SYS_AMUSERENR_EL0 SYS_AM_EL0(2, 3)
445 #define SYS_AMCNTENCLR0_EL0 SYS_AM_EL0(2, 4)
446 #define SYS_AMCNTENSET0_EL0 SYS_AM_EL0(2, 5)
453 * Counter: 11 011 1101 010:n<3> n<2:0>
454 * Type: 11 011 1101 011:n<3> n<2:0>
455 * n: 0-15
459 * Counter: 11 011 1101 110:n<3> n<2:0>
460 * Type: 11 011 1101 111:n<3> n<2:0>
461 * n: 0-15
472 #define SYS_AMEVCNTR0_INST_RET_EL0 SYS_AMEVCNTR0_EL0(2)
478 #define SYS_CNTPCTSS_EL0 sys_reg(3, 3, 14, 0, 5)
481 #define SYS_CNTP_TVAL_EL0 sys_reg(3, 3, 14, 2, 0)
482 #define SYS_CNTP_CTL_EL0 sys_reg(3, 3, 14, 2, 1)
483 #define SYS_CNTP_CVAL_EL0 sys_reg(3, 3, 14, 2, 2)
486 #define SYS_CNTV_CVAL_EL0 sys_reg(3, 3, 14, 3, 2)
488 #define SYS_AARCH32_CNTP_TVAL sys_reg(0, 0, 14, 2, 0)
489 #define SYS_AARCH32_CNTP_CTL sys_reg(0, 0, 14, 2, 1)
491 #define SYS_AARCH32_CNTP_CVAL sys_reg(0, 2, 0, 14, 0)
503 #define SYS_VMPIDR_EL2 sys_reg(3, 4, 0, 0, 5)
510 #define SYS_CPTR_EL2 sys_reg(3, 4, 1, 1, 2)
514 #define SYS_TTBR0_EL2 sys_reg(3, 4, 2, 0, 0)
515 #define SYS_TTBR1_EL2 sys_reg(3, 4, 2, 0, 1)
516 #define SYS_TCR_EL2 sys_reg(3, 4, 2, 0, 2)
517 #define SYS_VTTBR_EL2 sys_reg(3, 4, 2, 1, 0)
518 #define SYS_VTCR_EL2 sys_reg(3, 4, 2, 1, 2)
520 #define SYS_VNCR_EL2 sys_reg(3, 4, 2, 2, 0)
527 #define SYS_SPSR_und sys_reg(3, 4, 4, 3, 2)
529 #define SYS_IFSR32_EL2 sys_reg(3, 4, 5, 0, 1)
530 #define SYS_AFSR0_EL2 sys_reg(3, 4, 5, 1, 0)
531 #define SYS_AFSR1_EL2 sys_reg(3, 4, 5, 1, 1)
532 #define SYS_ESR_EL2 sys_reg(3, 4, 5, 2, 0)
533 #define SYS_VSESR_EL2 sys_reg(3, 4, 5, 2, 3)
534 #define SYS_FPEXC32_EL2 sys_reg(3, 4, 5, 3, 0)
535 #define SYS_TFSR_EL2 sys_reg(3, 4, 5, 6, 0)
540 #define SYS_MAIR_EL2 sys_reg(3, 4, 10, 2, 0)
545 #define SYS_RMR_EL2 sys_reg(3, 4, 12, 0, 2)
550 #define SYS_ICH_AP0R2_EL2 __SYS__AP0Rx_EL2(2)
556 #define SYS_ICH_AP1R2_EL2 __SYS__AP1Rx_EL2(2)
560 #define SYS_ICC_SRE_EL2 sys_reg(3, 4, 12, 9, 5)
563 #define SYS_ICH_MISR_EL2 sys_reg(3, 4, 12, 11, 2)
565 #define SYS_ICH_ELRSR_EL2 sys_reg(3, 4, 12, 11, 5)
571 #define SYS_ICH_LR2_EL2 __SYS__LR0_EL2(2)
574 #define SYS_ICH_LR5_EL2 __SYS__LR0_EL2(5)
581 #define SYS_ICH_LR10_EL2 __SYS__LR8_EL2(2)
584 #define SYS_ICH_LR13_EL2 __SYS__LR8_EL2(5)
589 #define SYS_TPIDR_EL2 sys_reg(3, 4, 13, 0, 2)
601 #define SYS_CNTHP_TVAL_EL2 sys_reg(3, 4, 14, 2, 0)
602 #define SYS_CNTHP_CTL_EL2 sys_reg(3, 4, 14, 2, 1)
603 #define SYS_CNTHP_CVAL_EL2 sys_reg(3, 4, 14, 2, 2)
606 #define SYS_CNTHV_CVAL_EL2 sys_reg(3, 4, 14, 3, 2)
609 #define SYS_BRBCR_EL12 sys_reg(2, 5, 9, 0, 0)
610 #define SYS_SCTLR_EL12 sys_reg(3, 5, 1, 0, 0)
611 #define SYS_CPACR_EL12 sys_reg(3, 5, 1, 0, 2)
612 #define SYS_SCTLR2_EL12 sys_reg(3, 5, 1, 0, 3)
613 #define SYS_ZCR_EL12 sys_reg(3, 5, 1, 2, 0)
614 #define SYS_TRFCR_EL12 sys_reg(3, 5, 1, 2, 1)
615 #define SYS_SMCR_EL12 sys_reg(3, 5, 1, 2, 6)
616 #define SYS_TTBR0_EL12 sys_reg(3, 5, 2, 0, 0)
617 #define SYS_TTBR1_EL12 sys_reg(3, 5, 2, 0, 1)
618 #define SYS_TCR_EL12 sys_reg(3, 5, 2, 0, 2)
619 #define SYS_TCR2_EL12 sys_reg(3, 5, 2, 0, 3)
620 #define SYS_SPSR_EL12 sys_reg(3, 5, 4, 0, 0)
621 #define SYS_ELR_EL12 sys_reg(3, 5, 4, 0, 1)
622 #define SYS_AFSR0_EL12 sys_reg(3, 5, 5, 1, 0)
623 #define SYS_AFSR1_EL12 sys_reg(3, 5, 5, 1, 1)
624 #define SYS_ESR_EL12 sys_reg(3, 5, 5, 2, 0)
625 #define SYS_TFSR_EL12 sys_reg(3, 5, 5, 6, 0)
626 #define SYS_FAR_EL12 sys_reg(3, 5, 6, 0, 0)
627 #define SYS_PMSCR_EL12 sys_reg(3, 5, 9, 9, 0)
628 #define SYS_MAIR_EL12 sys_reg(3, 5, 10, 2, 0)
629 #define SYS_AMAIR_EL12 sys_reg(3, 5, 10, 3, 0)
630 #define SYS_VBAR_EL12 sys_reg(3, 5, 12, 0, 0)
631 #define SYS_CONTEXTIDR_EL12 sys_reg(3, 5, 13, 0, 1)
632 #define SYS_SCXTNUM_EL12 sys_reg(3, 5, 13, 0, 7)
633 #define SYS_CNTKCTL_EL12 sys_reg(3, 5, 14, 1, 0)
634 #define SYS_CNTP_TVAL_EL02 sys_reg(3, 5, 14, 2, 0)
635 #define SYS_CNTP_CTL_EL02 sys_reg(3, 5, 14, 2, 1)
636 #define SYS_CNTP_CVAL_EL02 sys_reg(3, 5, 14, 2, 2)
637 #define SYS_CNTV_TVAL_EL02 sys_reg(3, 5, 14, 3, 0)
638 #define SYS_CNTV_CTL_EL02 sys_reg(3, 5, 14, 3, 1)
639 #define SYS_CNTV_CVAL_EL02 sys_reg(3, 5, 14, 3, 2)
649 #define OP_AT_S1E0R sys_insn(AT_Op0, 0, AT_CRn, 8, 2)
653 #define OP_AT_S1E1A sys_insn(AT_Op0, 0, AT_CRn, 9, 2)
657 #define OP_AT_S12E1W sys_insn(AT_Op0, 4, AT_CRn, 8, 5)
660 #define OP_AT_S1E2A sys_insn(AT_Op0, 4, AT_CRn, 9, 2)
671 #define TLBI_CRm_IPAIS 0 /* S2 Inner-Shareable */
672 #define TLBI_CRm_nROS 1 /* non-Range, Outer-Sharable */
673 #define TLBI_CRm_RIS 2 /* Range, Inner-Sharable */
674 #define TLBI_CRm_nRIS 3 /* non-Range, Inner-Sharable */
675 #define TLBI_CRm_IPAONS 4 /* S2 Outer and Non-Shareable */
676 #define TLBI_CRm_ROS 5 /* Range, Outer-Sharable */
677 #define TLBI_CRm_RNS 6 /* Range, Non-Sharable */
678 #define TLBI_CRm_nRNS 7 /* non-Range, Non-Sharable */
682 #define OP_TLBI_ASIDE1OS sys_insn(1, 0, 8, 1, 2)
684 #define OP_TLBI_VALE1OS sys_insn(1, 0, 8, 1, 5)
686 #define OP_TLBI_RVAE1IS sys_insn(1, 0, 8, 2, 1)
687 #define OP_TLBI_RVAAE1IS sys_insn(1, 0, 8, 2, 3)
688 #define OP_TLBI_RVALE1IS sys_insn(1, 0, 8, 2, 5)
689 #define OP_TLBI_RVAALE1IS sys_insn(1, 0, 8, 2, 7)
692 #define OP_TLBI_ASIDE1IS sys_insn(1, 0, 8, 3, 2)
694 #define OP_TLBI_VALE1IS sys_insn(1, 0, 8, 3, 5)
696 #define OP_TLBI_RVAE1OS sys_insn(1, 0, 8, 5, 1)
697 #define OP_TLBI_RVAAE1OS sys_insn(1, 0, 8, 5, 3)
698 #define OP_TLBI_RVALE1OS sys_insn(1, 0, 8, 5, 5)
699 #define OP_TLBI_RVAALE1OS sys_insn(1, 0, 8, 5, 7)
702 #define OP_TLBI_RVALE1 sys_insn(1, 0, 8, 6, 5)
706 #define OP_TLBI_ASIDE1 sys_insn(1, 0, 8, 7, 2)
708 #define OP_TLBI_VALE1 sys_insn(1, 0, 8, 7, 5)
712 #define OP_TLBI_ASIDE1OSNXS sys_insn(1, 0, 9, 1, 2)
714 #define OP_TLBI_VALE1OSNXS sys_insn(1, 0, 9, 1, 5)
716 #define OP_TLBI_RVAE1ISNXS sys_insn(1, 0, 9, 2, 1)
717 #define OP_TLBI_RVAAE1ISNXS sys_insn(1, 0, 9, 2, 3)
718 #define OP_TLBI_RVALE1ISNXS sys_insn(1, 0, 9, 2, 5)
719 #define OP_TLBI_RVAALE1ISNXS sys_insn(1, 0, 9, 2, 7)
722 #define OP_TLBI_ASIDE1ISNXS sys_insn(1, 0, 9, 3, 2)
724 #define OP_TLBI_VALE1ISNXS sys_insn(1, 0, 9, 3, 5)
726 #define OP_TLBI_RVAE1OSNXS sys_insn(1, 0, 9, 5, 1)
727 #define OP_TLBI_RVAAE1OSNXS sys_insn(1, 0, 9, 5, 3)
728 #define OP_TLBI_RVALE1OSNXS sys_insn(1, 0, 9, 5, 5)
729 #define OP_TLBI_RVAALE1OSNXS sys_insn(1, 0, 9, 5, 7)
732 #define OP_TLBI_RVALE1NXS sys_insn(1, 0, 9, 6, 5)
736 #define OP_TLBI_ASIDE1NXS sys_insn(1, 0, 9, 7, 2)
738 #define OP_TLBI_VALE1NXS sys_insn(1, 0, 9, 7, 5)
741 #define OP_TLBI_RIPAS2E1IS sys_insn(1, 4, 8, 0, 2)
742 #define OP_TLBI_IPAS2LE1IS sys_insn(1, 4, 8, 0, 5)
747 #define OP_TLBI_VALE2OS sys_insn(1, 4, 8, 1, 5)
749 #define OP_TLBI_RVAE2IS sys_insn(1, 4, 8, 2, 1)
750 #define OP_TLBI_RVALE2IS sys_insn(1, 4, 8, 2, 5)
754 #define OP_TLBI_VALE2IS sys_insn(1, 4, 8, 3, 5)
758 #define OP_TLBI_RIPAS2E1 sys_insn(1, 4, 8, 4, 2)
761 #define OP_TLBI_IPAS2LE1 sys_insn(1, 4, 8, 4, 5)
764 #define OP_TLBI_RVAE2OS sys_insn(1, 4, 8, 5, 1)
765 #define OP_TLBI_RVALE2OS sys_insn(1, 4, 8, 5, 5)
767 #define OP_TLBI_RVALE2 sys_insn(1, 4, 8, 6, 5)
771 #define OP_TLBI_VALE2 sys_insn(1, 4, 8, 7, 5)
774 #define OP_TLBI_RIPAS2E1ISNXS sys_insn(1, 4, 9, 0, 2)
775 #define OP_TLBI_IPAS2LE1ISNXS sys_insn(1, 4, 9, 0, 5)
780 #define OP_TLBI_VALE2OSNXS sys_insn(1, 4, 9, 1, 5)
782 #define OP_TLBI_RVAE2ISNXS sys_insn(1, 4, 9, 2, 1)
783 #define OP_TLBI_RVALE2ISNXS sys_insn(1, 4, 9, 2, 5)
787 #define OP_TLBI_VALE2ISNXS sys_insn(1, 4, 9, 3, 5)
791 #define OP_TLBI_RIPAS2E1NXS sys_insn(1, 4, 9, 4, 2)
794 #define OP_TLBI_IPAS2LE1NXS sys_insn(1, 4, 9, 4, 5)
797 #define OP_TLBI_RVAE2OSNXS sys_insn(1, 4, 9, 5, 1)
798 #define OP_TLBI_RVALE2OSNXS sys_insn(1, 4, 9, 5, 5)
800 #define OP_TLBI_RVALE2NXS sys_insn(1, 4, 9, 6, 5)
804 #define OP_TLBI_VALE2NXS sys_insn(1, 4, 9, 7, 5)
809 #define OP_GCSPOPCX sys_insn(1, 0, 7, 7, 5)
813 #define OP_BRB_IALL sys_insn(1, 1, 7, 2, 4)
814 #define OP_BRB_INJ sys_insn(1, 1, 7, 2, 5)
816 #define OP_DVP_RCTX sys_insn(1, 3, 7, 3, 5)
843 #define SCTLR_ELx_C (BIT(2))
848 #define SCTLR_EL2_RES1 ((BIT(4)) | (BIT(5)) | (BIT(11)) | (BIT(16)) | \
957 * only uses tags in the range 0xF0-0xFF, which we map to MTE tags 0x0-0xF.
989 #define ICH_LR_VIRTUAL_ID_MASK ((1ULL << 32) - 1)
1014 #define ICH_VMCR_ACK_CTL_SHIFT 2
1173 * set mask are set. Other bits are left as-is.