138 static inline void mcasp_clr_bits(struct davinci_mcasp *mcasp, u32 offset,  in mcasp_clr_bits()  function
196 			mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(bit));  in mcasp_set_clk_pdir()
208 			mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(bit));  in mcasp_set_axr_pdir()
217 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_start_rx()
257 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_start_tx()
301 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_EVTCTLR_REG,  in mcasp_stop_rx()
319 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_stop_rx()
328 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_EVTCTLX_REG,  in mcasp_stop_tx()
347 		mcasp_clr_bits(mcasp, reg, FIFO_ENABLE);  in mcasp_stop_tx()
454 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);  in davinci_mcasp_set_dai_fmt()
455 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);  in davinci_mcasp_set_dai_fmt()
461 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXDUR);  in davinci_mcasp_set_dai_fmt()
462 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRDUR);  in davinci_mcasp_set_dai_fmt()
514 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);  in davinci_mcasp_set_dai_fmt()
517 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);  in davinci_mcasp_set_dai_fmt()
530 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);  in davinci_mcasp_set_dai_fmt()
533 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);  in davinci_mcasp_set_dai_fmt()
547 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);  in davinci_mcasp_set_dai_fmt()
548 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, AFSXE);  in davinci_mcasp_set_dai_fmt()
550 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);  in davinci_mcasp_set_dai_fmt()
551 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, AFSRE);  in davinci_mcasp_set_dai_fmt()
569 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);  in davinci_mcasp_set_dai_fmt()
570 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);  in davinci_mcasp_set_dai_fmt()
579 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);  in davinci_mcasp_set_dai_fmt()
580 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);  in davinci_mcasp_set_dai_fmt()
597 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);  in davinci_mcasp_set_dai_fmt()
598 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);  in davinci_mcasp_set_dai_fmt()
675 			mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKXCTL_REG,  in davinci_mcasp_set_sysclk()
677 			mcasp_clr_bits(mcasp, DAVINCI_MCASP_AHCLKRCTL_REG,  in davinci_mcasp_set_sysclk()
878 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS);  in mcasp_common_hw_param()
884 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_REVTCTL_REG, RXDATADMADIS);  in mcasp_common_hw_param()
1024 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC);  in mcasp_i2s_hw_param()
1061 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_TXFMT_REG, TXSEL);  in mcasp_dit_hw_param()
1074 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_XEVTCTL_REG, TXDATADMADIS);  in mcasp_dit_hw_param()
2129 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(offset));  in davinci_mcasp_gpio_free()
2132 	mcasp_clr_bits(mcasp, DAVINCI_MCASP_PFUNC_REG, BIT(offset));  in davinci_mcasp_gpio_free()
2146 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDOUT_REG, BIT(offset));  in davinci_mcasp_gpio_direction_out()
2168 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDOUT_REG, BIT(offset));  in davinci_mcasp_gpio_set()
2180 		mcasp_clr_bits(mcasp, DAVINCI_MCASP_PDIR_REG, BIT(offset));  in davinci_mcasp_gpio_direction_in()