28 #define TRCM_TXRX 0
104  * Returns success (0) or negative errno.
108 	int ret = 0;  in i2s_tdm_prepare_enable_mclk()
117 	return 0;  in i2s_tdm_prepare_enable_mclk()
134 	return 0;  in i2s_tdm_runtime_suspend()
157 	return 0;  in i2s_tdm_runtime_resume()
174  * when clk_trcm > 0.
215 	unsigned int xfer_mask = 0;  in rockchip_snd_xfer_clear()
216 	unsigned int xfer_val = 0;  in rockchip_snd_xfer_clear()
282 /* only used when clk_trcm > 0 */
310 		if (--i2s_tdm->refcount == 0) {  in rockchip_snd_txrxctrl()
357 	if (ret < 0 && ret != -EACCES)  in rockchip_i2s_tdm_set_fmt()
450 			tdm_val = TDM_SHIFT_CTRL(0);  in rockchip_i2s_tdm_set_fmt()
523 	unsigned int val = 0;  in rockchip_i2s_io_multiplex()
526 		return 0;  in rockchip_i2s_io_multiplex()
579 	return 0;  in rockchip_i2s_io_multiplex()
592 		return 0;  in rockchip_i2s_trcm_mode()
618 	return 0;  in rockchip_i2s_trcm_mode()
639 	return 0;  in rockchip_i2s_tdm_set_sysclk()
647 	unsigned int val = 0;  in rockchip_i2s_tdm_hw_params()
765 			rockchip_snd_txrxctrl(substream, dai, 0);  in rockchip_i2s_tdm_trigger()
767 			rockchip_snd_rxctrl(i2s_tdm, 0);  in rockchip_i2s_tdm_trigger()
769 			rockchip_snd_txctrl(i2s_tdm, 0);  in rockchip_i2s_tdm_trigger()
775 	return 0;  in rockchip_i2s_tdm_trigger()
787 	return 0;  in rockchip_i2s_tdm_dai_probe()
807 	return 0;  in rockchip_dai_tdm_slot()
820 	return 0;  in rockchip_i2s_tdm_set_bclk_ratio()
905 	{0x00, 0x7200000f},
906 	{0x04, 0x01c8000f},
907 	{0x08, 0x00001f1f},
908 	{0x10, 0x001f0000},
909 	{0x14, 0x01f00000},
910 	{0x30, 0x00003eff},
911 	{0x34, 0x00003eff},
912 	{0x38, 0x00000707},
933 	u32 reg = 0, val = 0, trcm = i2s_tdm->clk_trcm;  in common_soc_init()
937 		return 0;  in common_soc_init()
945 	for (i = 0; i < i2s_tdm->soc_data->config_count; i++) {  in common_soc_init()
958 	return 0;  in common_soc_init()
962 	{ 0xff060000, 0x184, PX30_I2S0_CLK_TXONLY, PX30_I2S0_CLK_RXONLY },
966 	{ 0xff7e0000, 0x190, RK1808_I2S0_CLK_TXONLY, RK1808_I2S0_CLK_RXONLY },
970 	{ 0xff300000, 0x308, RK3308_I2S0_CLK_TXONLY, RK3308_I2S0_CLK_RXONLY },
971 	{ 0xff310000, 0x308, RK3308_I2S1_CLK_TXONLY, RK3308_I2S1_CLK_RXONLY },
975 	{ 0xfe410000, 0x504, RK3568_I2S1_CLK_TXONLY, RK3568_I2S1_CLK_RXONLY },
976 	{ 0xfe410000, 0x508, RK3568_I2S1_MCLK_TX_OE, RK3568_I2S1_MCLK_RX_OE },
977 	{ 0xfe420000, 0x508, RK3568_I2S2_MCLK_OE, RK3568_I2S2_MCLK_OE },
978 	{ 0xfe430000, 0x504, RK3568_I2S3_CLK_TXONLY, RK3568_I2S3_CLK_RXONLY },
979 	{ 0xfe430000, 0x508, RK3568_I2S3_MCLK_TXONLY, RK3568_I2S3_MCLK_RXONLY },
980 	{ 0xfe430000, 0x508, RK3568_I2S3_MCLK_OE, RK3568_I2S3_MCLK_OE },
984 	{ 0xff800000, 0x10260, RV1126_I2S0_CLK_TXONLY, RV1126_I2S0_CLK_RXONLY },
988 	.softrst_offset = 0x0300,
995 	.softrst_offset = 0x0300,
1002 	.softrst_offset = 0x0400,
1003 	.grf_reg_offset = 0x0308,
1011 	.softrst_offset = 0x0400,
1018 	.softrst_offset = 0x0300,
1081 	return 0;  in rockchip_i2s_tdm_init_dai()
1096 	for (i = 0; i < num; i++) {  in rockchip_i2s_tdm_path_check()
1105 		for (j = 0; j < num; j++) {  in rockchip_i2s_tdm_path_check()
1120 	return 0;  in rockchip_i2s_tdm_path_check()
1128 	for (idx = 0; idx < num; idx++) {  in rockchip_i2s_tdm_tx_path_config()
1140 	for (idx = 0; idx < num; idx++) {  in rockchip_i2s_tdm_rx_path_config()
1164 	int num, ret = 0;  in rockchip_i2s_tdm_path_prepare()
1175 	if (num < 0) {  in rockchip_i2s_tdm_path_prepare()
1191 	if (ret < 0) {  in rockchip_i2s_tdm_path_prepare()
1199 	if (ret < 0) {  in rockchip_i2s_tdm_path_prepare()
1207 	return 0;  in rockchip_i2s_tdm_path_prepare()
1213 	return rockchip_i2s_tdm_path_prepare(i2s_tdm, np, 0);  in rockchip_i2s_tdm_tx_path_prepare()
1293 	regs = devm_platform_get_and_ioremap_resource(pdev, 0, &res);  in rockchip_i2s_tdm_probe()
1319 	if (ret < 0) {  in rockchip_i2s_tdm_probe()
1325 	if (ret < 0) {  in rockchip_i2s_tdm_probe()
1366 	ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);  in rockchip_i2s_tdm_probe()
1372 	return 0;  in rockchip_i2s_tdm_probe()
1399 	return 0;  in rockchip_i2s_tdm_suspend()
1408 	if (ret < 0)  in rockchip_i2s_tdm_resume()