260 	u32 *pos, size, val, reg;  in spdif_irq_uqrx_full()  local
315 	u32 val;  in spdif_irq_uq_err()  local
333 	u32 val, val2;  in spdif_intr_status_clear()  local
413 	u32 val, cycle = 1000;  in spdif_softreset()  local
824 	u32 cstatus, val;  in fsl_spdif_capture_get()  local
910 	u32 val;  in fsl_spdif_rx_vbit_get()  local
925 	u32 val;  in fsl_spdif_tx_vbit_get()  local
941 	u32 val = (1 - ucontrol->value.integer.value[0]) << SCR_VAL_OFFSET;  in fsl_spdif_tx_vbit_put()  local
954 	u32 val;  in fsl_spdif_rx_rcm_get()  local
969 	u32 val = (ucontrol->value.integer.value[0] ? SCR_RAW_CAPTURE_MODE : 0);  in fsl_spdif_rx_rcm_put()  local
1122 	u32 val;  in fsl_spdif_usync_get()  local
1141 	u32 val = ucontrol->value.integer.value[0] << SRCD_CD_USER_OFFSET;  in fsl_spdif_usync_put()  local