Lines Matching +full:imx95 +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2014-2015 Freescale Semiconductor, Inc.
13 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
39 * struct fsl_mqs_soc_data - soc specific data
49 * @div_mask: clock divider mask
50 * @div_shift: clock divider bit shift
84 mqs_priv->soc->ctrl_off == reg) in fsl_mqs_sm_read()
87 return -EINVAL; in fsl_mqs_sm_read()
95 mqs_priv->soc->ctrl_off == reg) in fsl_mqs_sm_write()
98 return -EINVAL; in fsl_mqs_sm_write()
105 struct snd_soc_component *component = dai->component; in fsl_mqs_hw_params()
111 mclk_rate = clk_get_rate(mqs_priv->mclk); in fsl_mqs_hw_params()
123 regmap_update_bits(mqs_priv->regmap, mqs_priv->soc->ctrl_off, in fsl_mqs_hw_params()
124 mqs_priv->soc->div_mask, in fsl_mqs_hw_params()
125 (div - 1) << mqs_priv->soc->div_shift); in fsl_mqs_hw_params()
126 regmap_update_bits(mqs_priv->regmap, mqs_priv->soc->ctrl_off, in fsl_mqs_hw_params()
127 mqs_priv->soc->osr_mask, 0); in fsl_mqs_hw_params()
129 dev_err(component->dev, "can't get proper divider\n"); in fsl_mqs_hw_params()
142 return -EINVAL; in fsl_mqs_set_dai_fmt()
149 return -EINVAL; in fsl_mqs_set_dai_fmt()
156 return -EINVAL; in fsl_mqs_set_dai_fmt()
165 struct snd_soc_component *component = dai->component; in fsl_mqs_startup()
168 regmap_update_bits(mqs_priv->regmap, mqs_priv->soc->ctrl_off, in fsl_mqs_startup()
169 mqs_priv->soc->en_mask, in fsl_mqs_startup()
170 1 << mqs_priv->soc->en_shift); in fsl_mqs_startup()
177 struct snd_soc_component *component = dai->component; in fsl_mqs_shutdown()
180 regmap_update_bits(mqs_priv->regmap, mqs_priv->soc->ctrl_off, in fsl_mqs_shutdown()
181 mqs_priv->soc->en_mask, 0); in fsl_mqs_shutdown()
196 .name = "fsl-mqs-dai",
224 struct device_node *np = pdev->dev.of_node; in fsl_mqs_probe()
230 mqs_priv = devm_kzalloc(&pdev->dev, sizeof(*mqs_priv), GFP_KERNEL); in fsl_mqs_probe()
232 return -ENOMEM; in fsl_mqs_probe()
238 mqs_priv->soc = of_device_get_match_data(&pdev->dev); in fsl_mqs_probe()
240 if (mqs_priv->soc->type == TYPE_REG_GPR) { in fsl_mqs_probe()
243 dev_err(&pdev->dev, "failed to get gpr node by phandle\n"); in fsl_mqs_probe()
244 return -EINVAL; in fsl_mqs_probe()
247 mqs_priv->regmap = syscon_node_to_regmap(gpr_np); in fsl_mqs_probe()
249 if (IS_ERR(mqs_priv->regmap)) { in fsl_mqs_probe()
250 dev_err(&pdev->dev, "failed to get gpr regmap\n"); in fsl_mqs_probe()
251 return PTR_ERR(mqs_priv->regmap); in fsl_mqs_probe()
253 } else if (mqs_priv->soc->type == TYPE_REG_SM) { in fsl_mqs_probe()
254 mqs_priv->regmap = devm_regmap_init(&pdev->dev, in fsl_mqs_probe()
258 if (IS_ERR(mqs_priv->regmap)) { in fsl_mqs_probe()
259 dev_err(&pdev->dev, "failed to init regmap: %ld\n", in fsl_mqs_probe()
260 PTR_ERR(mqs_priv->regmap)); in fsl_mqs_probe()
261 return PTR_ERR(mqs_priv->regmap); in fsl_mqs_probe()
268 mqs_priv->regmap = devm_regmap_init_mmio_clk(&pdev->dev, in fsl_mqs_probe()
272 if (IS_ERR(mqs_priv->regmap)) { in fsl_mqs_probe()
273 dev_err(&pdev->dev, "failed to init regmap: %ld\n", in fsl_mqs_probe()
274 PTR_ERR(mqs_priv->regmap)); in fsl_mqs_probe()
275 return PTR_ERR(mqs_priv->regmap); in fsl_mqs_probe()
278 mqs_priv->ipg = devm_clk_get(&pdev->dev, "core"); in fsl_mqs_probe()
279 if (IS_ERR(mqs_priv->ipg)) { in fsl_mqs_probe()
280 dev_err(&pdev->dev, "failed to get the clock: %ld\n", in fsl_mqs_probe()
281 PTR_ERR(mqs_priv->ipg)); in fsl_mqs_probe()
282 return PTR_ERR(mqs_priv->ipg); in fsl_mqs_probe()
286 mqs_priv->mclk = devm_clk_get(&pdev->dev, "mclk"); in fsl_mqs_probe()
287 if (IS_ERR(mqs_priv->mclk)) { in fsl_mqs_probe()
288 dev_err(&pdev->dev, "failed to get the clock: %ld\n", in fsl_mqs_probe()
289 PTR_ERR(mqs_priv->mclk)); in fsl_mqs_probe()
290 return PTR_ERR(mqs_priv->mclk); in fsl_mqs_probe()
293 dev_set_drvdata(&pdev->dev, mqs_priv); in fsl_mqs_probe()
294 pm_runtime_enable(&pdev->dev); in fsl_mqs_probe()
296 ret = devm_snd_soc_register_component(&pdev->dev, &soc_codec_fsl_mqs, in fsl_mqs_probe()
306 pm_runtime_disable(&pdev->dev); in fsl_mqs_remove()
314 ret = clk_prepare_enable(mqs_priv->ipg); in fsl_mqs_runtime_resume()
316 dev_err(dev, "failed to enable ipg clock\n"); in fsl_mqs_runtime_resume()
320 ret = clk_prepare_enable(mqs_priv->mclk); in fsl_mqs_runtime_resume()
322 dev_err(dev, "failed to enable mclk clock\n"); in fsl_mqs_runtime_resume()
323 clk_disable_unprepare(mqs_priv->ipg); in fsl_mqs_runtime_resume()
327 regmap_write(mqs_priv->regmap, mqs_priv->soc->ctrl_off, mqs_priv->reg_mqs_ctrl); in fsl_mqs_runtime_resume()
335 regmap_read(mqs_priv->regmap, mqs_priv->soc->ctrl_off, &mqs_priv->reg_mqs_ctrl); in fsl_mqs_runtime_suspend()
337 clk_disable_unprepare(mqs_priv->mclk); in fsl_mqs_runtime_suspend()
338 clk_disable_unprepare(mqs_priv->ipg); in fsl_mqs_runtime_suspend()
440 { .compatible = "fsl,imx8qm-mqs", .data = &fsl_mqs_imx8qm_data },
441 { .compatible = "fsl,imx6sx-mqs", .data = &fsl_mqs_imx6sx_data },
442 { .compatible = "fsl,imx93-mqs", .data = &fsl_mqs_imx93_data },
443 { .compatible = "fsl,imx95-aonmix-mqs", .data = &fsl_mqs_imx95_aon_data },
444 { .compatible = "fsl,imx95-netcmix-mqs", .data = &fsl_mqs_imx95_netc_data },
445 { .compatible = "fsl,imx943-aonmix-mqs", .data = &fsl_mqs_imx943_aon_data },
446 { .compatible = "fsl,imx943-wakeupmix-mqs", .data = &fsl_mqs_imx943_wakeup_data },
455 .name = "fsl-mqs",
466 MODULE_ALIAS("platform:fsl-mqs");