Lines Matching +full:envelope +full:- +full:detector
1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
19 #include <linux/dma/imx-dma.h>
136 .fifo_offset = -4,
140 { .compatible = "fsl,imx8mm-micfil", .data = &fsl_micfil_imx8mm },
141 { .compatible = "fsl,imx8mp-micfil", .data = &fsl_micfil_imx8mp },
142 { .compatible = "fsl,imx93-micfil", .data = &fsl_micfil_imx93 },
143 { .compatible = "fsl,imx943-micfil", .data = &fsl_micfil_imx943 },
167 switch (micfil->quality) { in micfil_set_quality()
187 return -EINVAL; in micfil_set_quality()
190 return regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in micfil_set_quality()
201 ucontrol->value.integer.value[0] = micfil->quality; in micfil_quality_get()
212 micfil->quality = ucontrol->value.integer.value[0]; in micfil_quality_set()
223 "Envelope mode", "Energy mode",
228 "Cut-off @1750Hz",
229 "Cut-off @215Hz",
230 "Cut-off @102Hz",
236 * Cut-off @21Hz 0 0
237 * Cut-off @83Hz 0 1
238 * Cut-off @152HZ 1 0
241 "Cut-off @21Hz", "Cut-off @83Hz",
242 "Cut-off @152Hz", "Bypass",
262 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in micfil_put_dc_remover_state()
265 unsigned int *item = ucontrol->value.enumerated.item; in micfil_put_dc_remover_state()
271 return -EINVAL; in micfil_put_dc_remover_state()
273 micfil->dc_remover = val; in micfil_put_dc_remover_state()
294 ucontrol->value.enumerated.item[0] = micfil->dc_remover; in micfil_get_dc_remover_state()
303 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_enable()
304 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_enable()
308 micfil->vad_enabled = val; in hwvad_put_enable()
319 ucontrol->value.enumerated.item[0] = micfil->vad_enabled; in hwvad_get_enable()
328 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in hwvad_put_init_mode()
329 unsigned int *item = ucontrol->value.enumerated.item; in hwvad_put_init_mode()
333 /* 0 - Envelope-based Mode in hwvad_put_init_mode()
334 * 1 - Energy-based Mode in hwvad_put_init_mode()
336 micfil->vad_init_mode = val; in hwvad_put_init_mode()
347 ucontrol->value.enumerated.item[0] = micfil->vad_init_mode; in hwvad_get_init_mode()
358 ucontrol->value.enumerated.item[0] = micfil->vad_detected; in hwvad_detected()
409 SOC_ENUM("HWVAD High-Pass Filter", hwvad_hpf_enum),
418 SOC_SINGLE_RANGE("HWVAD Detector Frame Time", REG_MICFIL_VAD0_CTRL2, 16, 0, 63, 0),
419 SOC_SINGLE("HWVAD Detector Initialization Time", REG_MICFIL_VAD0_CTRL1, 8, 31, 0),
434 if (!micfil->soc->use_verid) in fsl_micfil_use_verid()
437 ret = regmap_read(micfil->regmap, REG_MICFIL_VERID, &val); in fsl_micfil_use_verid()
443 micfil->verid.version = val & in fsl_micfil_use_verid()
445 micfil->verid.version >>= MICFIL_VERID_MINOR_SHIFT; in fsl_micfil_use_verid()
446 micfil->verid.feature = val & MICFIL_VERID_FEATURE_MASK; in fsl_micfil_use_verid()
448 ret = regmap_read(micfil->regmap, REG_MICFIL_PARAM, &val); in fsl_micfil_use_verid()
454 micfil->param.hwvad_num = (val & MICFIL_PARAM_NUM_HWVAD_MASK) >> in fsl_micfil_use_verid()
456 micfil->param.hwvad_zcd = val & MICFIL_PARAM_HWVAD_ZCD; in fsl_micfil_use_verid()
457 micfil->param.hwvad_energy_mode = val & MICFIL_PARAM_HWVAD_ENERGY_MODE; in fsl_micfil_use_verid()
458 micfil->param.hwvad = val & MICFIL_PARAM_HWVAD; in fsl_micfil_use_verid()
459 micfil->param.dc_out_bypass = val & MICFIL_PARAM_DC_OUT_BYPASS; in fsl_micfil_use_verid()
460 micfil->param.dc_in_bypass = val & MICFIL_PARAM_DC_IN_BYPASS; in fsl_micfil_use_verid()
461 micfil->param.low_power = val & MICFIL_PARAM_LOW_POWER; in fsl_micfil_use_verid()
462 micfil->param.fil_out_width = val & MICFIL_PARAM_FIL_OUT_WIDTH; in fsl_micfil_use_verid()
463 micfil->param.fifo_ptrwid = (val & MICFIL_PARAM_FIFO_PTRWID_MASK) >> in fsl_micfil_use_verid()
465 micfil->param.npair = (val & MICFIL_PARAM_NPAIR_MASK) >> in fsl_micfil_use_verid()
471 /* The SRES is a self-negated bit which provides the CPU with the
473 * slave-bus interface. This bit always reads as zero, and this
481 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
486 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
492 * SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined in fsl_micfil_reset()
493 * as non-volatile register, so SRES still remain in regmap in fsl_micfil_reset()
497 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_reset()
506 ret = regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, 0xFF, 0xFF); in fsl_micfil_reset()
519 dev_err(dai->dev, "micfil dai priv_data not set\n"); in fsl_micfil_startup()
520 return -EINVAL; in fsl_micfil_startup()
523 if (micfil->constraint_rates.count > 0) in fsl_micfil_startup()
524 snd_pcm_hw_constraint_list(substream->runtime, 0, in fsl_micfil_startup()
526 &micfil->constraint_rates); in fsl_micfil_startup()
537 /* Voice Activity Detector Error Interruption */ in fsl_micfil_configure_hwvad_interrupts()
538 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
541 /* Voice Activity Detector Interruption */ in fsl_micfil_configure_hwvad_interrupts()
542 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_configure_hwvad_interrupts()
548 /* Configuration done only in energy-based initialization mode */
552 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
556 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_energy_mode()
560 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
564 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_energy_mode()
568 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
572 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
576 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
580 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_energy_mode()
586 /* Configuration done only in envelope-based initialization mode */
590 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
594 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL2, in fsl_micfil_init_hwvad_envelope_mode()
598 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
602 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_SCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
606 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
610 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
614 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
618 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_NCONFIG, in fsl_micfil_init_hwvad_envelope_mode()
630 * -> Eneveope-based mode (section 8.4.1)
631 * -> Energy-based mode (section 8.4.2)
633 * It is important to remark that the HWVAD detector could be enabled
641 micfil->vad_detected = 0; in fsl_micfil_hwvad_enable()
643 /* envelope-based specific initialization */ in fsl_micfil_hwvad_enable()
644 if (micfil->vad_init_mode == MICFIL_HWVAD_ENVELOPE_MODE) in fsl_micfil_hwvad_enable()
651 /* Voice Activity Detector Internal Filters Initialization*/ in fsl_micfil_hwvad_enable()
652 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
655 /* Voice Activity Detector Internal Filter */ in fsl_micfil_hwvad_enable()
656 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
664 /* Voice Activity Detector Reset */ in fsl_micfil_hwvad_enable()
665 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
668 /* Voice Activity Detector Enabled */ in fsl_micfil_hwvad_enable()
669 regmap_set_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_enable()
677 struct device *dev = &micfil->pdev->dev; in fsl_micfil_hwvad_disable()
681 regmap_clear_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hwvad_disable()
696 struct device *dev = &micfil->pdev->dev; in fsl_micfil_trigger()
709 /* DMA Interrupt Selection - DISEL bits in fsl_micfil_trigger()
710 * 00 - DMA and IRQ disabled in fsl_micfil_trigger()
711 * 01 - DMA req enabled in fsl_micfil_trigger()
712 * 10 - IRQ enabled in fsl_micfil_trigger()
713 * 11 - reserved in fsl_micfil_trigger()
715 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
722 ret = regmap_set_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
727 if (micfil->vad_enabled) in fsl_micfil_trigger()
734 if (micfil->vad_enabled) in fsl_micfil_trigger()
738 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
743 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_trigger()
750 return -EINVAL; in fsl_micfil_trigger()
757 struct device *dev = &micfil->pdev->dev; in fsl_micfil_reparent_rootclk()
763 clk = micfil->mclk; in fsl_micfil_reparent_rootclk()
766 fsl_asoc_reparent_pll_clocks(dev, clk, micfil->pll8k_clk, in fsl_micfil_reparent_rootclk()
767 micfil->pll11k_clk, ratio); in fsl_micfil_reparent_rootclk()
787 ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
793 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL1, in fsl_micfil_hw_params()
794 0xFF, ((1 << channels) - 1)); in fsl_micfil_hw_params()
802 micfil->mclk_flag = true; in fsl_micfil_hw_params()
804 ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8); in fsl_micfil_hw_params()
812 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2, in fsl_micfil_hw_params()
815 FIELD_PREP(MICFIL_CTRL2_CICOSR, 32 - osr)); in fsl_micfil_hw_params()
818 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
820 FIELD_PREP(MICFIL_VAD0_CTRL1_CICOSR, 16 - osr)); in fsl_micfil_hw_params()
823 regmap_update_bits(micfil->regmap, REG_MICFIL_VAD0_CTRL1, in fsl_micfil_hw_params()
825 FIELD_PREP(MICFIL_VAD0_CTRL1_CHSEL, (channels - 1))); in fsl_micfil_hw_params()
827 micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg; in fsl_micfil_hw_params()
828 micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg); in fsl_micfil_hw_params()
829 micfil->sdmacfg.n_fifos_src = channels; in fsl_micfil_hw_params()
830 micfil->sdmacfg.sw_done = true; in fsl_micfil_hw_params()
831 micfil->dma_params_rx.maxburst = channels * MICFIL_DMA_MAXBURST_RX; in fsl_micfil_hw_params()
832 if (micfil->soc->use_edma) in fsl_micfil_hw_params()
833 micfil->dma_params_rx.maxburst = channels; in fsl_micfil_hw_params()
843 clk_disable_unprepare(micfil->mclk); in fsl_micfil_hw_free()
844 micfil->mclk_flag = false; in fsl_micfil_hw_free()
851 struct fsl_micfil *micfil = dev_get_drvdata(cpu_dai->dev); in fsl_micfil_dai_probe()
852 struct device *dev = cpu_dai->dev; in fsl_micfil_dai_probe()
856 micfil->quality = QUALITY_VLOW0; in fsl_micfil_dai_probe()
857 micfil->card = cpu_dai->component->card; in fsl_micfil_dai_probe()
860 regmap_write(micfil->regmap, REG_MICFIL_OUT_CTRL, 0x22222222); in fsl_micfil_dai_probe()
865 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_DC_CTRL, in fsl_micfil_dai_probe()
871 micfil->dc_remover = MICFIL_DC_BYPASS; in fsl_micfil_dai_probe()
874 &micfil->dma_params_rx); in fsl_micfil_dai_probe()
876 /* FIFO Watermark Control - FIFOWMK*/ in fsl_micfil_dai_probe()
877 ret = regmap_update_bits(micfil->regmap, REG_MICFIL_FIFO_CTRL, in fsl_micfil_dai_probe()
879 FIELD_PREP(MICFIL_FIFO_CTRL_FIFOWMK, micfil->soc->fifo_depth - 1)); in fsl_micfil_dai_probe()
890 if (micfil->soc->volume_sx) in fsl_micfil_component_probe()
910 .stream_name = "CPU-Capture",
920 .name = "fsl-micfil-dai",
960 {REG_MICFIL_DATACH0 - 0x4, 0x00000000},
961 {REG_MICFIL_DATACH1 - 0x4, 0x00000000},
962 {REG_MICFIL_DATACH2 - 0x4, 0x00000000},
963 {REG_MICFIL_DATACH3 - 0x4, 0x00000000},
964 {REG_MICFIL_DATACH4 - 0x4, 0x00000000},
965 {REG_MICFIL_DATACH5 - 0x4, 0x00000000},
966 {REG_MICFIL_DATACH6 - 0x4, 0x00000000},
967 {REG_MICFIL_DATACH7 - 0x4, 0x00000000},
983 int ofs = micfil->soc->fifo_offset; in fsl_micfil_readable_reg()
1008 if (micfil->soc->use_verid) in fsl_micfil_readable_reg()
1037 if (micfil->soc->use_verid) in fsl_micfil_writeable_reg()
1048 int ofs = micfil->soc->fifo_offset; in fsl_micfil_volatile_reg()
1100 struct platform_device *pdev = micfil->pdev; in micfil_isr()
1107 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_isr()
1108 regmap_read(micfil->regmap, REG_MICFIL_CTRL1, &ctrl1_reg); in micfil_isr()
1109 regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg); in micfil_isr()
1113 /* Channel 0-7 Output Data Flags */ in micfil_isr()
1116 dev_dbg(&pdev->dev, in micfil_isr()
1122 regmap_write_bits(micfil->regmap, in micfil_isr()
1130 dev_dbg(&pdev->dev, in micfil_isr()
1135 dev_dbg(&pdev->dev, in micfil_isr()
1146 struct platform_device *pdev = micfil->pdev; in micfil_err_isr()
1151 regmap_read(micfil->regmap, REG_MICFIL_STAT, &stat_reg); in micfil_err_isr()
1154 dev_dbg(&pdev->dev, "isr: Decimation Filter is running\n"); in micfil_err_isr()
1157 dev_dbg(&pdev->dev, "isr: FIR Filter Data ready\n"); in micfil_err_isr()
1160 dev_dbg(&pdev->dev, "isr: ipg_clk_app is too low\n"); in micfil_err_isr()
1161 regmap_write_bits(micfil->regmap, REG_MICFIL_STAT, in micfil_err_isr()
1165 regmap_read(micfil->regmap, REG_MICFIL_FIFO_STAT, &fifo_stat_reg); in micfil_err_isr()
1166 regmap_write_bits(micfil->regmap, REG_MICFIL_FIFO_STAT, in micfil_err_isr()
1169 regmap_read(micfil->regmap, REG_MICFIL_OUT_STAT, &out_stat_reg); in micfil_err_isr()
1170 regmap_write_bits(micfil->regmap, REG_MICFIL_OUT_STAT, in micfil_err_isr()
1181 if (!micfil->card) in voice_detected_fn()
1184 kctl = snd_soc_card_get_kcontrol(micfil->card, "VAD Detected"); in voice_detected_fn()
1188 if (micfil->vad_detected) in voice_detected_fn()
1189 snd_ctl_notify(micfil->card->snd_card, in voice_detected_fn()
1191 &kctl->id); in voice_detected_fn()
1199 struct device *dev = &micfil->pdev->dev; in hwvad_isr()
1203 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_isr()
1213 regmap_write_bits(micfil->regmap, REG_MICFIL_VAD0_STAT, in hwvad_isr()
1217 micfil->vad_detected = 1; in hwvad_isr()
1230 struct device *dev = &micfil->pdev->dev; in hwvad_err_isr()
1233 regmap_read(micfil->regmap, REG_MICFIL_VAD0_STAT, &vad0_reg); in hwvad_err_isr()
1246 struct device_node *np = pdev->dev.of_node; in fsl_micfil_probe()
1252 micfil = devm_kzalloc(&pdev->dev, sizeof(*micfil), GFP_KERNEL); in fsl_micfil_probe()
1254 return -ENOMEM; in fsl_micfil_probe()
1256 micfil->pdev = pdev; in fsl_micfil_probe()
1257 strscpy(micfil->name, np->name, sizeof(micfil->name)); in fsl_micfil_probe()
1259 micfil->soc = of_device_get_match_data(&pdev->dev); in fsl_micfil_probe()
1264 micfil->mclk = devm_clk_get(&pdev->dev, "ipg_clk_app"); in fsl_micfil_probe()
1265 if (IS_ERR(micfil->mclk)) { in fsl_micfil_probe()
1266 dev_err(&pdev->dev, "failed to get core clock: %ld\n", in fsl_micfil_probe()
1267 PTR_ERR(micfil->mclk)); in fsl_micfil_probe()
1268 return PTR_ERR(micfil->mclk); in fsl_micfil_probe()
1271 micfil->busclk = devm_clk_get(&pdev->dev, "ipg_clk"); in fsl_micfil_probe()
1272 if (IS_ERR(micfil->busclk)) { in fsl_micfil_probe()
1273 dev_err(&pdev->dev, "failed to get ipg clock: %ld\n", in fsl_micfil_probe()
1274 PTR_ERR(micfil->busclk)); in fsl_micfil_probe()
1275 return PTR_ERR(micfil->busclk); in fsl_micfil_probe()
1278 fsl_asoc_get_pll_clocks(&pdev->dev, &micfil->pll8k_clk, in fsl_micfil_probe()
1279 &micfil->pll11k_clk); in fsl_micfil_probe()
1281 micfil->clk_src[MICFIL_AUDIO_PLL1] = micfil->pll8k_clk; in fsl_micfil_probe()
1282 micfil->clk_src[MICFIL_AUDIO_PLL2] = micfil->pll11k_clk; in fsl_micfil_probe()
1283 micfil->clk_src[MICFIL_CLK_EXT3] = devm_clk_get(&pdev->dev, "clkext3"); in fsl_micfil_probe()
1284 if (IS_ERR(micfil->clk_src[MICFIL_CLK_EXT3])) in fsl_micfil_probe()
1285 micfil->clk_src[MICFIL_CLK_EXT3] = NULL; in fsl_micfil_probe()
1287 fsl_asoc_constrain_rates(&micfil->constraint_rates, in fsl_micfil_probe()
1289 micfil->clk_src[MICFIL_AUDIO_PLL1], in fsl_micfil_probe()
1290 micfil->clk_src[MICFIL_AUDIO_PLL2], in fsl_micfil_probe()
1291 micfil->clk_src[MICFIL_CLK_EXT3], in fsl_micfil_probe()
1292 micfil->constraint_rates_list); in fsl_micfil_probe()
1299 if (of_device_is_compatible(np, "fsl,imx943-micfil")) in fsl_micfil_probe()
1300 micfil->regmap = devm_regmap_init_mmio(&pdev->dev, in fsl_micfil_probe()
1304 micfil->regmap = devm_regmap_init_mmio(&pdev->dev, in fsl_micfil_probe()
1307 if (IS_ERR(micfil->regmap)) { in fsl_micfil_probe()
1308 dev_err(&pdev->dev, "failed to init MICFIL regmap: %ld\n", in fsl_micfil_probe()
1309 PTR_ERR(micfil->regmap)); in fsl_micfil_probe()
1310 return PTR_ERR(micfil->regmap); in fsl_micfil_probe()
1317 &micfil->dataline); in fsl_micfil_probe()
1319 micfil->dataline = 1; in fsl_micfil_probe()
1321 if (micfil->dataline & ~micfil->soc->dataline) { in fsl_micfil_probe()
1322 dev_err(&pdev->dev, "dataline setting error, Mask is 0x%X\n", in fsl_micfil_probe()
1323 micfil->soc->dataline); in fsl_micfil_probe()
1324 return -EINVAL; in fsl_micfil_probe()
1329 micfil->irq[i] = platform_get_irq(pdev, i); in fsl_micfil_probe()
1330 if (micfil->irq[i] < 0) in fsl_micfil_probe()
1331 return micfil->irq[i]; in fsl_micfil_probe()
1335 ret = devm_request_irq(&pdev->dev, micfil->irq[0], in fsl_micfil_probe()
1337 micfil->name, micfil); in fsl_micfil_probe()
1339 dev_err(&pdev->dev, "failed to claim mic interface irq %u\n", in fsl_micfil_probe()
1340 micfil->irq[0]); in fsl_micfil_probe()
1345 ret = devm_request_irq(&pdev->dev, micfil->irq[1], in fsl_micfil_probe()
1347 micfil->name, micfil); in fsl_micfil_probe()
1349 dev_err(&pdev->dev, "failed to claim mic interface error irq %u\n", in fsl_micfil_probe()
1350 micfil->irq[1]); in fsl_micfil_probe()
1354 /* Digital Microphone interface voice activity detector event */ in fsl_micfil_probe()
1355 ret = devm_request_threaded_irq(&pdev->dev, micfil->irq[2], in fsl_micfil_probe()
1357 IRQF_SHARED, micfil->name, micfil); in fsl_micfil_probe()
1359 dev_err(&pdev->dev, "failed to claim hwvad event irq %u\n", in fsl_micfil_probe()
1360 micfil->irq[0]); in fsl_micfil_probe()
1364 /* Digital Microphone interface voice activity detector error */ in fsl_micfil_probe()
1365 ret = devm_request_irq(&pdev->dev, micfil->irq[3], in fsl_micfil_probe()
1367 micfil->name, micfil); in fsl_micfil_probe()
1369 dev_err(&pdev->dev, "failed to claim hwvad error irq %u\n", in fsl_micfil_probe()
1370 micfil->irq[1]); in fsl_micfil_probe()
1374 micfil->dma_params_rx.chan_name = "rx"; in fsl_micfil_probe()
1375 micfil->dma_params_rx.addr = res->start + REG_MICFIL_DATACH0 + micfil->soc->fifo_offset; in fsl_micfil_probe()
1376 micfil->dma_params_rx.maxburst = MICFIL_DMA_MAXBURST_RX; in fsl_micfil_probe()
1380 pm_runtime_enable(&pdev->dev); in fsl_micfil_probe()
1381 if (!pm_runtime_enabled(&pdev->dev)) { in fsl_micfil_probe()
1382 ret = fsl_micfil_runtime_resume(&pdev->dev); in fsl_micfil_probe()
1387 ret = pm_runtime_resume_and_get(&pdev->dev); in fsl_micfil_probe()
1392 ret = fsl_micfil_use_verid(&pdev->dev); in fsl_micfil_probe()
1394 dev_warn(&pdev->dev, "Error reading MICFIL version: %d\n", ret); in fsl_micfil_probe()
1396 ret = pm_runtime_put_sync(&pdev->dev); in fsl_micfil_probe()
1397 if (ret < 0 && ret != -ENOSYS) in fsl_micfil_probe()
1400 regcache_cache_only(micfil->regmap, true); in fsl_micfil_probe()
1406 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); in fsl_micfil_probe()
1408 dev_err(&pdev->dev, "failed to pcm register\n"); in fsl_micfil_probe()
1412 fsl_micfil_dai.capture.formats = micfil->soc->formats; in fsl_micfil_probe()
1414 ret = devm_snd_soc_register_component(&pdev->dev, &fsl_micfil_component, in fsl_micfil_probe()
1417 dev_err(&pdev->dev, "failed to register component %s\n", in fsl_micfil_probe()
1425 if (!pm_runtime_status_suspended(&pdev->dev)) in fsl_micfil_probe()
1426 fsl_micfil_runtime_suspend(&pdev->dev); in fsl_micfil_probe()
1428 pm_runtime_disable(&pdev->dev); in fsl_micfil_probe()
1435 pm_runtime_disable(&pdev->dev); in fsl_micfil_remove()
1442 regcache_cache_only(micfil->regmap, true); in fsl_micfil_runtime_suspend()
1444 if (micfil->mclk_flag) in fsl_micfil_runtime_suspend()
1445 clk_disable_unprepare(micfil->mclk); in fsl_micfil_runtime_suspend()
1446 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_suspend()
1456 ret = clk_prepare_enable(micfil->busclk); in fsl_micfil_runtime_resume()
1460 if (micfil->mclk_flag) { in fsl_micfil_runtime_resume()
1461 ret = clk_prepare_enable(micfil->mclk); in fsl_micfil_runtime_resume()
1463 clk_disable_unprepare(micfil->busclk); in fsl_micfil_runtime_resume()
1468 regcache_cache_only(micfil->regmap, false); in fsl_micfil_runtime_resume()
1469 regcache_mark_dirty(micfil->regmap); in fsl_micfil_runtime_resume()
1470 regcache_sync(micfil->regmap); in fsl_micfil_runtime_resume()
1487 .name = "fsl-micfil-dai",
1494 MODULE_AUTHOR("Cosmin-Gabriel Samoila <[email protected]>");