Lines Matching +full:0 +full:x1801
30 #define WM8961_MAX_REGISTER 0xFC
33 { 0, 0x009F }, /* R0 - Left Input volume */
34 { 1, 0x009F }, /* R1 - Right Input volume */
35 { 2, 0x0000 }, /* R2 - LOUT1 volume */
36 { 3, 0x0000 }, /* R3 - ROUT1 volume */
37 { 4, 0x0020 }, /* R4 - Clocking1 */
38 { 5, 0x0008 }, /* R5 - ADC & DAC Control 1 */
39 { 6, 0x0000 }, /* R6 - ADC & DAC Control 2 */
40 { 7, 0x000A }, /* R7 - Audio Interface 0 */
41 { 8, 0x01F4 }, /* R8 - Clocking2 */
42 { 9, 0x0000 }, /* R9 - Audio Interface 1 */
43 { 10, 0x00FF }, /* R10 - Left DAC volume */
44 { 11, 0x00FF }, /* R11 - Right DAC volume */
46 { 14, 0x0040 }, /* R14 - Audio Interface 2 */
48 { 17, 0x007B }, /* R17 - ALC1 */
49 { 18, 0x0000 }, /* R18 - ALC2 */
50 { 19, 0x0032 }, /* R19 - ALC3 */
51 { 20, 0x0000 }, /* R20 - Noise Gate */
52 { 21, 0x00C0 }, /* R21 - Left ADC volume */
53 { 22, 0x00C0 }, /* R22 - Right ADC volume */
54 { 23, 0x0120 }, /* R23 - Additional control(1) */
55 { 24, 0x0000 }, /* R24 - Additional control(2) */
56 { 25, 0x0000 }, /* R25 - Pwr Mgmt (1) */
57 { 26, 0x0000 }, /* R26 - Pwr Mgmt (2) */
58 { 27, 0x0000 }, /* R27 - Additional Control (3) */
59 { 28, 0x0000 }, /* R28 - Anti-pop */
61 { 30, 0x005F }, /* R30 - Clocking 3 */
63 { 32, 0x0000 }, /* R32 - ADCL signal path */
64 { 33, 0x0000 }, /* R33 - ADCR signal path */
66 { 40, 0x0000 }, /* R40 - LOUT2 volume */
67 { 41, 0x0000 }, /* R41 - ROUT2 volume */
69 { 47, 0x0000 }, /* R47 - Pwr Mgmt (3) */
70 { 48, 0x0023 }, /* R48 - Additional Control (4) */
71 { 49, 0x0000 }, /* R49 - Class D Control 1 */
73 { 51, 0x0003 }, /* R51 - Class D Control 2 */
75 { 56, 0x0106 }, /* R56 - Clocking 4 */
76 { 57, 0x0000 }, /* R57 - DSP Sidetone 0 */
77 { 58, 0x0000 }, /* R58 - DSP Sidetone 1 */
79 { 60, 0x0000 }, /* R60 - DC Servo 0 */
80 { 61, 0x0000 }, /* R61 - DC Servo 1 */
82 { 63, 0x015E }, /* R63 - DC Servo 3 */
84 { 65, 0x0010 }, /* R65 - DC Servo 5 */
86 { 68, 0x0003 }, /* R68 - Analogue PGA Bias */
87 { 69, 0x0000 }, /* R69 - Analogue HP 0 */
89 { 71, 0x01FB }, /* R71 - Analogue HP 2 */
90 { 72, 0x0000 }, /* R72 - Charge Pump 1 */
92 { 82, 0x0000 }, /* R82 - Charge Pump B */
94 { 87, 0x0000 }, /* R87 - Write Sequencer 1 */
95 { 88, 0x0000 }, /* R88 - Write Sequencer 2 */
96 { 89, 0x0000 }, /* R89 - Write Sequencer 3 */
97 { 90, 0x0000 }, /* R90 - Write Sequencer 4 */
98 { 91, 0x0000 }, /* R91 - Write Sequencer 5 */
99 { 92, 0x0000 }, /* R92 - Write Sequencer 6 */
100 { 93, 0x0000 }, /* R93 - Write Sequencer 7 */
102 { 252, 0x0001 }, /* R252 - General test 1 */
280 return 0; in wm8961_hp_event()
310 return 0; in wm8961_spk_event()
328 static const DECLARE_TLV_DB_SCALE(hp_sec_tlv, -700, 100, 0);
330 static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 300, 0);
332 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
333 1, 1, TLV_DB_SCALE_ITEM(13, 0, 0),
334 2, 2, TLV_DB_SCALE_ITEM(20, 0, 0),
335 3, 3, TLV_DB_SCALE_ITEM(29, 0, 0)
337 static const DECLARE_TLV_DB_SCALE(pga_tlv, -2325, 75, 0);
341 0, 127, 0, out_tlv),
343 6, 3, 7, 0, hp_sec_tlv),
345 7, 1, 0),
348 0, 127, 0, out_tlv),
350 7, 1, 0),
351 SOC_SINGLE("Speaker AC Gain", WM8961_CLASS_D_CONTROL_2, 0, 7, 0),
353 SOC_SINGLE("DAC x128 OSR Switch", WM8961_ADC_DAC_CONTROL_2, 0, 1, 0),
355 SOC_SINGLE("DAC Soft Mute Switch", WM8961_ADC_DAC_CONTROL_2, 3, 1, 0),
358 WM8961_DSP_SIDETONE_1, 4, 12, 0, sidetone_tlv),
360 SOC_SINGLE("ADC High Pass Filter Switch", WM8961_ADC_DAC_CONTROL_1, 0, 1, 0),
365 1, 119, 0, adc_tlv),
368 4, 3, 0, boost_tlv),
371 0, 62, 0, pga_tlv),
400 SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8961_CLOCKING2, 4, 0, NULL, 0),
402 SND_SOC_DAPM_PGA("Left Input", WM8961_PWR_MGMT_1, 5, 0, NULL, 0),
403 SND_SOC_DAPM_PGA("Right Input", WM8961_PWR_MGMT_1, 4, 0, NULL, 0),
405 SND_SOC_DAPM_ADC("ADCL", "HiFi Capture", WM8961_PWR_MGMT_1, 3, 0),
406 SND_SOC_DAPM_ADC("ADCR", "HiFi Capture", WM8961_PWR_MGMT_1, 2, 0),
408 SND_SOC_DAPM_SUPPLY("MICBIAS", WM8961_PWR_MGMT_1, 1, 0, NULL, 0),
410 SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM, 0, 0, &dacl_mux),
411 SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM, 0, 0, &dacr_mux),
413 SND_SOC_DAPM_DAC("DACL", "HiFi Playback", WM8961_PWR_MGMT_2, 8, 0),
414 SND_SOC_DAPM_DAC("DACR", "HiFi Playback", WM8961_PWR_MGMT_2, 7, 0),
418 4, 0, NULL, 0, wm8961_hp_event,
421 4, 0, NULL, 0, wm8961_spk_event,
473 { 64, 0 },
490 { 48000, 0 },
491 { 44100, 0 },
518 best = 0; in wm8961_hw_params()
519 for (i = 0; i < ARRAY_SIZE(wm8961_srate); i++) { in wm8961_hw_params()
545 for (i = 0; i < ARRAY_SIZE(wm8961_clk_sys_ratio); i++) { in wm8961_hw_params()
589 return 0; in wm8961_hw_params()
618 return 0; in wm8961_set_sysclk()
740 return 0; in wm8961_set_clkdiv()
795 return 0; in wm8961_set_bias_level()
869 return 0; in wm8961_probe()
878 return 0; in wm8961_resume()
929 if (ret != 0) { in wm8961_i2c_probe()
934 if (val != 0x1801) { in wm8961_i2c_probe()
935 dev_err(&i2c->dev, "Device is not a WM8961: ID=0x%x\n", val); in wm8961_i2c_probe()
944 if (ret != 0) { in wm8961_i2c_probe()
954 ret = regmap_write(wm8961->regmap, WM8961_SOFTWARE_RESET, 0x1801); in wm8961_i2c_probe()
955 if (ret != 0) { in wm8961_i2c_probe()