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1 /* SPDX-License-Identifier: GPL-2.0-or-later
2 * sma1307.h -- sma1307 ALSA SoC Audio driver
7 * it under the terms of the GNU General Public License version 2 as
232 /* SMA1307 Registers Bit Fields */
234 #define SMA1307_POWER_MASK BIT(0)
236 #define SMA1307_POWER_ON BIT(0)
239 #define SMA1307_RESET_MASK BIT(1)
240 #define SMA1307_RESET_ON BIT(1)
243 #define SMA1307_LEFTPOL_MASK BIT(3)
245 #define SMA1307_HIGH_FIRST_CH BIT(3)
248 #define SMA1307_SCK_RISING_MASK BIT(2)
250 #define SMA1307_SCK_RISING_EDGE BIT(2)
253 #define SMA1307_SPK_MUTE_MASK BIT(0)
255 #define SMA1307_SPK_MUTE BIT(0)
258 #define SMA1307_SPK_MODE_MASK (BIT(2)|BIT(3)|BIT(4))
260 #define SMA1307_SPK_MONO BIT(2)
261 #define SMA1307_SPK_STEREO BIT(4)
264 #define SMA1307_MONOMIX_MASK BIT(0)
266 #define SMA1307_MONOMIX_ON BIT(0)
269 #define SMA1307_LR_DATA_SW_MASK BIT(4)
271 #define SMA1307_LR_DATA_SW_SWAP BIT(4)
274 #define SMA1307_PLL_MASK BIT(6)
276 #define SMA1307_PLL_OFF BIT(6)
279 #define SMA1307_I2S_MODE_MASK (BIT(4)|BIT(5)|BIT(6))
281 #define SMA1307_LJ BIT(4)
282 #define SMA1307_RJ_16BIT BIT(6)
283 #define SMA1307_RJ_18BIT (BIT(4)|BIT(6))
284 #define SMA1307_RJ_20BIT (BIT(5)|BIT(6))
285 #define SMA1307_RJ_24BIT (BIT(4)|BIT(5)|BIT(6))
288 #define SMA1307_CONTROLLER_DEVICE_MASK BIT(7)
290 #define SMA1307_CONTROLLER_MODE BIT(7)
293 #define SMA1307_PORT_CONFIG_MASK (BIT(6)|BIT(7))
295 #define SMA1307_OUTPUT_PORT_ENABLE BIT(7)
298 #define SMA1307_SDO_OUTPUT_MASK BIT(3)
300 #define SMA1307_HIGH_Z_OUTPUT BIT(3)
302 #define SMA1307_DATA_CLK_SEL_MASK (BIT(6)|BIT(7))
304 #define SMA1307_SDO_CLK_PLL BIT(6)
305 #define SMA1307_SDO_CLK_OSC (BIT(6)|BIT(7))
308 #define SMA1307_SDO_OUTPUT2_MASK BIT(0)
310 #define SMA1307_TWO_SDO_PER_CH BIT(0)
313 #define SMA1307_SDO_OUTPUT3_MASK BIT(2)
315 #define SMA1307_TWO_SDO_PER_CH_24K BIT(2)
318 #define SMA1307_SDO_OUT1_SEL_MASK (BIT(3)|BIT(4)|BIT(5))
320 #define SMA1307_SDO1_FORMAT_C BIT(3)
321 #define SMA1307_SDO1_MONO_MIX BIT(4)
322 #define SMA1307_SDO1_AFTER_DSP (BIT(3)|BIT(4))
323 #define SMA1307_SDO1_VRMS2_AVG BIT(5)
324 #define SMA1307_SDO1_VBAT_MON (BIT(3)|BIT(5))
325 #define SMA1307_SDO1_TEMP_MON (BIT(4)|BIT(5))
326 #define SMA1307_SDO1_AFTER_DELAY (BIT(3)|BIT(4)|BIT(5))
329 #define SMA1307_SDO_OUT0_SEL_MASK (BIT(0)|BIT(1)|BIT(2))
331 #define SMA1307_SDO0_FORMAT_C BIT(0)
332 #define SMA1307_SDO0_MONO_MIX BIT(1)
333 #define SMA1307_SDO0_AFTER_DSP (BIT(0)|BIT(1))
334 #define SMA1307_SDO0_VRMS2_AVG BIT(2)
335 #define SMA1307_SDO0_VBAT_MON (BIT(0)|BIT(2))
336 #define SMA1307_SDO0_TEMP_MON (BIT(1)|BIT(2))
337 #define SMA1307_SDO0_AFTER_DELAY (BIT(0)|BIT(1)|BIT(2))
340 #define SMA1307_SEL_INT_MASK BIT(2)
342 #define SMA1307_INT_CLEAR_MANUAL BIT(2)
345 #define SMA1307_CLR_INT_MASK BIT(1)
347 #define SMA1307_INT_CLEAR BIT(1)
350 #define SMA1307_DIS_INT_MASK BIT(0)
352 #define SMA1307_HIGH_Z_INT BIT(0)
355 #define SMA1307_INTERFACE_MASK (BIT(5)|BIT(6)|BIT(7))
356 #define SMA1307_LJ_FORMAT BIT(5)
357 #define SMA1307_I2S_FORMAT (BIT(5)|BIT(6))
358 #define SMA1307_TDM_FORMAT BIT(7)
360 #define SMA1307_SCK_RATE_MASK (BIT(3)|BIT(4))
362 #define SMA1307_SCK_32FS BIT(4)
364 #define SMA1307_DATA_WIDTH_MASK (BIT(1)|BIT(2))
366 #define SMA1307_DATA_16BIT (BIT(1)|BIT(2))
368 #define SMA1307_TDM_TX_MODE_MASK BIT(6)
370 #define SMA1307_TDM_TX_STEREO BIT(6)
372 #define SMA1307_TDM_SLOT0_RX_POS_MASK (BIT(3)|BIT(4)|BIT(5))
374 #define SMA1307_TDM_SLOT0_RX_POS_1 BIT(3)
375 #define SMA1307_TDM_SLOT0_RX_POS_2 BIT(4)
376 #define SMA1307_TDM_SLOT0_RX_POS_3 (BIT(3)|BIT(4))
377 #define SMA1307_TDM_SLOT0_RX_POS_4 BIT(5)
378 #define SMA1307_TDM_SLOT0_RX_POS_5 (BIT(3)|BIT(5))
379 #define SMA1307_TDM_SLOT0_RX_POS_6 (BIT(4)|BIT(5))
380 #define SMA1307_TDM_SLOT0_RX_POS_7 (BIT(3)|BIT(4)|BIT(5))
382 #define SMA1307_TDM_SLOT1_RX_POS_MASK (BIT(0)|BIT(1)|BIT(2))
384 #define SMA1307_TDM_SLOT1_RX_POS_1 BIT(0)
385 #define SMA1307_TDM_SLOT1_RX_POS_2 BIT(1)
386 #define SMA1307_TDM_SLOT1_RX_POS_3 (BIT(0)|BIT(1))
387 #define SMA1307_TDM_SLOT1_RX_POS_4 BIT(2)
388 #define SMA1307_TDM_SLOT1_RX_POS_5 (BIT(0)|BIT(2))
389 #define SMA1307_TDM_SLOT1_RX_POS_6 (BIT(1)|BIT(2))
390 #define SMA1307_TDM_SLOT1_RX_POS_7 (BIT(0)|BIT(1)|BIT(2))
393 #define SMA1307_TDM_DL_MASK BIT(7)
395 #define SMA1307_TDM_DL_32 BIT(7)
397 #define SMA1307_TDM_N_SLOT_MASK BIT(6)
399 #define SMA1307_TDM_N_SLOT_8 BIT(6)
401 #define SMA1307_TDM_SLOT0_TX_POS_MASK (BIT(3)|BIT(4)|BIT(5))
403 #define SMA1307_TDM_SLOT0_TX_POS_1 BIT(3)
404 #define SMA1307_TDM_SLOT0_TX_POS_2 BIT(4)
405 #define SMA1307_TDM_SLOT0_TX_POS_3 (BIT(3)|BIT(4))
406 #define SMA1307_TDM_SLOT0_TX_POS_4 BIT(5)
407 #define SMA1307_TDM_SLOT0_TX_POS_5 (BIT(3)|BIT(5))
408 #define SMA1307_TDM_SLOT0_TX_POS_6 (BIT(4)|BIT(5))
409 #define SMA1307_TDM_SLOT0_TX_POS_7 (BIT(3)|BIT(4)|BIT(5))
411 #define SMA1307_TDM_SLOT1_TX_POS_MASK (BIT(0)|BIT(1)|BIT(2))
413 #define SMA1307_TDM_SLOT1_TX_POS_1 BIT(0)
414 #define SMA1307_TDM_SLOT1_TX_POS_2 BIT(1)
415 #define SMA1307_TDM_SLOT1_TX_POS_3 (BIT(0)|BIT(1))
416 #define SMA1307_TDM_SLOT1_TX_POS_4 BIT(2)
417 #define SMA1307_TDM_SLOT1_TX_POS_5 (BIT(0)|BIT(2))
418 #define SMA1307_TDM_SLOT1_TX_POS_6 (BIT(1)|BIT(2))
419 #define SMA1307_TDM_SLOT1_TX_POS_7 (BIT(0)|BIT(1)|BIT(2))
422 #define SMA1307_OTP_STAT_MASK BIT(6)
424 #define SMA1307_OTP_STAT_1 BIT(6)
427 #define SMA1307_OT1_OK_STATUS BIT(7)
428 #define SMA1307_OT2_OK_STATUS BIT(6)
429 #define SMA1307_UVLO_STATUS BIT(5)
430 #define SMA1307_OVP_BST_STATUS BIT(4)
431 #define SMA1307_POWER_FLAG BIT(3)
433 #define SMA1307_SCAN_CHK BIT(7)
434 #define SMA1307_OCP_SPK_STATUS BIT(5)
435 #define SMA1307_OCP_BST_STATUS BIT(4)
436 #define SMA1307_BOP_STATE (BIT(1)|BIT(2)|BIT(3))
437 #define SMA1307_CLK_MON_STATUS BIT(0)
439 #define SMA1307_DEVICE_ID (BIT(3)|BIT(4))
440 #define SMA1307_REV_NUM_STATUS (BIT(0)|BIT(1))
442 #define SMA1307_REV_NUM_REV1 BIT(0)