Lines Matching +full:11 +full:- +full:7
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5670.h -- RT5670 ALSA SoC audio driver
17 /* I/O - Output */
20 /* I/O - Input */
26 /* I/O - ADC/DAC/DMIC */
34 /* Mixer - D-D */
47 /* Mixer - PDM */
56 /* Mixer - ADC */
61 /* Mixer - DAC */
77 /* Format - ADC/DAC */
86 /* Format - TDM Control */
91 /* Function - Analog */
121 /* Function - Digital */
215 #define RT5670_R_MUTE (0x1 << 7)
216 #define RT5670_R_MUTE_SFT 7
237 #define RT5670_CAPLESS_EN (0x1 << 11)
238 #define RT5670_CBJ_DET_MODE (0x1 << 7)
245 #define RT5670_IN_DF1 (0x1 << 7)
246 #define RT5670_IN_SFT1 7
257 #define RT5670_INR_SEL_MASK (0x1 << 7)
258 #define RT5670_INR_SEL_SFT 7
259 #define RT5670_INR_SEL_IN4N (0x0 << 7)
260 #define RT5670_INR_SEL_MONON (0x1 << 7)
269 #define RT5670_M_ST_DACL2 (0x1 << 7)
270 #define RT5670_M_ST_DACL2_SFT 7
335 #define RT5670_ADC_2_SRC_MASK (0x1 << 11)
336 #define RT5670_ADC_2_SRC_SFT 11
357 #define RT5670_MONO_ADC_L2_SRC_MASK (0x1 << 11)
358 #define RT5670_MONO_ADC_L2_SRC_SFT 11
393 #define RT5670_M_ADCMIX_R (0x1 << 7)
394 #define RT5670_M_ADCMIX_R_SFT 7
405 #define RT5670_DAC_L2_STO_L_VOL_MASK (0x1 << 11)
406 #define RT5670_DAC_L2_STO_L_VOL_SFT 11
431 #define RT5670_DAC_L2_MONO_L_VOL_MASK (0x1 << 11)
432 #define RT5670_DAC_L2_MONO_L_VOL_SFT 11
459 #define RT5670_M_STO_R_DAC_R (0x1 << 11)
460 #define RT5670_M_STO_R_DAC_R_SFT 11
467 #define RT5670_M_DAC_R2_DAC_L (0x1 << 7)
468 #define RT5670_M_DAC_R2_DAC_L_SFT 7
479 #define RT5670_RXDP_SRC_MASK (0x3 << 11)
480 #define RT5670_RXDP_SRC_SFT 11
481 #define RT5670_RXDP_SRC_NOR (0x0 << 11)
482 #define RT5670_RXDP_SRC_DIV2 (0x1 << 11)
483 #define RT5670_RXDP_SRC_DIV3 (0x2 << 11)
525 #define RT5670_PDM2_L_MASK (0x1 << 11)
526 #define RT5670_PDM2_L_SFT 11
533 #define RT5670_PDM2_BUSY (0x1 << 7)
544 #define RT5670_G_BST4_RM_L_MASK (0x7 << 7)
545 #define RT5670_G_BST4_RM_L_SFT 7
566 #define RT5670_G_BST4_RM_R_MASK (0x7 << 7)
567 #define RT5670_G_BST4_RM_R_SFT 7
616 #define RT5670_M_BST4_MM (0x1 << 7)
617 #define RT5670_M_BST4_MM_SFT 7
624 #define RT5670_G_BST1_OM_L_MASK (0x7 << 7)
625 #define RT5670_G_BST1_OM_L_SFT 7
636 #define RT5670_G_DAC_L1_OM_L_MASK (0x7 << 7)
637 #define RT5670_G_DAC_L1_OM_L_SFT 7
654 #define RT5670_G_BST1_OM_R_MASK (0x7 << 7)
655 #define RT5670_G_BST1_OM_R_SFT 7
666 #define RT5670_G_DAC_R1_OM_R_MASK (0x7 << 7)
667 #define RT5670_G_DAC_R1_OM_R_SFT 7
688 #define RT5670_G_LOUTMIX_MASK (0x1 << 11)
689 #define RT5670_G_LOUTMIX_SFT 11
698 #define RT5670_PWR_DAC_R1 (0x1 << 11)
699 #define RT5670_PWR_DAC_R1_BIT 11
700 #define RT5670_PWR_DAC_L2 (0x1 << 7)
701 #define RT5670_PWR_DAC_L2_BIT 7
720 #define RT5670_PWR_DAC_S1F (0x1 << 11)
721 #define RT5670_PWR_DAC_S1F_BIT 11
728 #define RT5670_PWR_PDM1 (0x1 << 7)
729 #define RT5670_PWR_PDM1_BIT 7
742 #define RT5670_PWR_BG (0x1 << 11)
743 #define RT5670_PWR_BG_BIT 11
744 #define RT5670_PWR_HP_L (0x1 << 7)
745 #define RT5670_PWR_HP_L_BIT 7
762 #define RT5670_PWR_MB1 (0x1 << 11)
763 #define RT5670_PWR_MB1_BIT 11
782 #define RT5670_PWR_RM_L (0x1 << 11)
783 #define RT5670_PWR_RM_L_BIT 11
788 #define RT5670_PWR_HV_L (0x1 << 11)
789 #define RT5670_PWR_HV_L_BIT 11
816 #define RT5670_I2S_BP_MASK (0x1 << 7)
817 #define RT5670_I2S_BP_SFT 7
818 #define RT5670_I2S_BP_NOR (0x0 << 7)
819 #define RT5670_I2S_BP_INV (0x1 << 7)
854 #define RT5670_I2S_BCLK_MS2_MASK (0x1 << 11)
855 #define RT5670_I2S_BCLK_MS2_SFT 11
856 #define RT5670_I2S_BCLK_MS2_32 (0x0 << 11)
857 #define RT5670_I2S_BCLK_MS2_64 (0x1 << 11)
868 #define RT5670_I2S_BCLK_MS3_MASK (0x1 << 7)
869 #define RT5670_I2S_BCLK_MS3_SFT 7
870 #define RT5670_I2S_BCLK_MS3_32 (0x0 << 7)
871 #define RT5670_I2S_BCLK_MS3_64 (0x1 << 7)
908 #define RT5670_DAHPF_EN (0x1 << 11)
909 #define RT5670_DAHPF_EN_SFT 11
967 #define RT5670_PLL1_SRC_MASK (0x7 << 11)
968 #define RT5670_PLL1_SRC_SFT 11
969 #define RT5670_PLL1_SRC_MCLK (0x0 << 11)
970 #define RT5670_PLL1_SRC_BCLK1 (0x1 << 11)
971 #define RT5670_PLL1_SRC_BCLK2 (0x2 << 11)
972 #define RT5670_PLL1_SRC_BCLK3 (0x3 << 11)
982 #define RT5670_PLL_N_MASK (RT5670_PLL_N_MAX << 7)
983 #define RT5670_PLL_N_SFT 7
992 #define RT5670_PLL_M_BP (0x1 << 11)
993 #define RT5670_PLL_M_BP_SFT 11
1078 #define RT5670_CLSD_OM_MASK (0x1 << 11)
1079 #define RT5670_CLSD_OM_SFT 11
1080 #define RT5670_CLSD_OM_MONO (0x0 << 11)
1081 #define RT5670_CLSD_OM_STO (0x1 << 11)
1100 #define RT5670_HP_CD_PD_MASK (0x1 << 7)
1101 #define RT5670_HP_CD_PD_SFT 7
1102 #define RT5670_HP_CD_PD_DIS (0x0 << 7)
1103 #define RT5670_HP_CD_PD_EN (0x1 << 7)
1142 #define RT5670_BPS_MASK (0x1 << 11)
1143 #define RT5670_BPS_SFT 11
1144 #define RT5670_BPS_DIS (0x0 << 11)
1145 #define RT5670_BPS_EN (0x1 << 11)
1156 #define RT5670_VLO_MASK (0x1 << 7)
1157 #define RT5670_VLO_SFT 7
1158 #define RT5670_VLO_3V (0x0 << 7)
1159 #define RT5670_VLO_32V (0x1 << 7)
1183 #define RT5670_CP_FQ_192_KHZ 7
1186 #define RT5670_OSW_L_MASK (0x1 << 11)
1187 #define RT5670_OSW_L_SFT 11
1188 #define RT5670_OSW_L_DIS (0x0 << 11)
1189 #define RT5670_OSW_L_EN (0x1 << 11)
1233 #define RT5670_MIC1_OVCD_MASK (0x1 << 11)
1234 #define RT5670_MIC1_OVCD_SFT 11
1235 #define RT5670_MIC1_OVCD_DIS (0x0 << 11)
1236 #define RT5670_MIC1_OVCD_EN (0x1 << 11)
1293 #define RT5670_EQ_LPF1_M_MASK (0x1 << 7)
1294 #define RT5670_EQ_LPF1_M_SFT 7
1295 #define RT5670_EQ_LPF1_M_LO (0x0 << 7)
1296 #define RT5670_EQ_LPF1_M_1ST (0x1 << 7)
1360 #define RT5670_DRC_AGC_CP_MASK (0x1 << 7)
1361 #define RT5670_DRC_AGC_CP_SFT 7
1362 #define RT5670_DRC_AGC_CP_DIS (0x0 << 7)
1363 #define RT5670_DRC_AGC_CP_EN (0x1 << 7)
1376 #define RT5670_DRC_AGC_TAR_MASK (0x1f << 7)
1377 #define RT5670_DRC_AGC_TAR_SFT 7
1399 #define RT5670_JD_HP_MASK (0x1 << 11)
1400 #define RT5670_JD_HP_SFT 11
1401 #define RT5670_JD_HP_DIS (0x0 << 11)
1402 #define RT5670_JD_HP_EN (0x1 << 11)
1415 #define RT5670_JD_SPR_MASK (0x1 << 7)
1416 #define RT5670_JD_SPR_SFT 7
1417 #define RT5670_JD_SPR_DIS (0x0 << 7)
1418 #define RT5670_JD_SPR_EN (0x1 << 7)
1465 #define RT5670_JD_P_MASK (0x1 << 11)
1466 #define RT5670_JD_P_SFT 11
1467 #define RT5670_JD_P_NOR (0x0 << 11)
1468 #define RT5670_JD_P_INV (0x1 << 11)
1487 #define RT5670_MB1_OC_STKY_MASK (0x1 << 11)
1488 #define RT5670_MB1_OC_STKY_SFT 11
1489 #define RT5670_MB1_OC_STKY_DIS (0x0 << 11)
1490 #define RT5670_MB1_OC_STKY_EN (0x1 << 11)
1495 #define RT5670_MB1_OC_P_MASK (0x1 << 7)
1496 #define RT5670_MB1_OC_P_SFT 7
1497 #define RT5670_MB1_OC_P_NOR (0x0 << 7)
1498 #define RT5670_MB1_OC_P_INV (0x1 << 7)
1522 #define RT5670_GP4_PIN_MASK (0x1 << 11)
1523 #define RT5670_GP4_PIN_SFT 11
1524 #define RT5670_GP4_PIN_GPIO4 (0x0 << 11)
1525 #define RT5670_GP4_PIN_DMIC2_SDA (0x1 << 11)
1538 #define RT5670_GP5_PIN_MASK (0x1 << 7)
1539 #define RT5670_GP5_PIN_SFT 7
1540 #define RT5670_GP5_PIN_GPIO5 (0x0 << 7)
1541 #define RT5670_GP5_PIN_DMIC3_SDA (0x1 << 7)
1566 #define RT5670_GP4_PF_MASK (0x1 << 11)
1567 #define RT5670_GP4_PF_SFT 11
1568 #define RT5670_GP4_PF_IN (0x0 << 11)
1569 #define RT5670_GP4_PF_OUT (0x1 << 11)
1582 #define RT5670_GP3_OUT_MASK (0x1 << 7)
1583 #define RT5670_GP3_OUT_SFT 7
1584 #define RT5670_GP3_OUT_LO (0x0 << 7)
1585 #define RT5670_GP3_OUT_HI (0x1 << 7)
1644 #define RT5670_M_BB_HPF_L_MASK (0x1 << 7)
1645 #define RT5670_M_BB_HPF_L_SFT 7
1662 #define RT5670_MP3_HLP_MASK (0x1 << 7)
1663 #define RT5670_MP3_HLP_SFT 7
1664 #define RT5670_MP3_HLP_DIS (0x0 << 7)
1665 #define RT5670_MP3_HLP_EN (0x1 << 7)
1694 #define RT5670_3D_1F_MIX_MASK (0x3 << 11)
1695 #define RT5670_3D_1F_MIX_SFT 11
1704 #define RT5670_M_3D_D2R_MASK (0x1 << 7)
1705 #define RT5670_M_3D_D2R_SFT 7
1716 #define RT5670_1ST_HPF_MASK (0x1 << 11)
1717 #define RT5670_1ST_HPF_SFT 11
1718 #define RT5670_1ST_HPF_DIS (0x0 << 11)
1719 #define RT5670_1ST_HPF_EN (0x1 << 11)
1732 #define RT5670_SI_DAC_MASK (0x1 << 11)
1733 #define RT5670_SI_DAC_SFT 11
1734 #define RT5670_SI_DAC_AUTO (0x0 << 11)
1735 #define RT5670_SI_DAC_TEST (0x1 << 11)
1785 #define RT5670_ZCD_DIG_MASK (0x1 << 11)
1786 #define RT5670_ZCD_DIG_SFT 11
1787 #define RT5670_ZCD_DIG_DIS (0x0 << 11)
1788 #define RT5670_ZCD_DIG_EN (0x1 << 11)
1797 #define RT5670_M_ZCD_SM_L (0x1 << 7)
1811 #define RT5670_TDM_DATA_MODE_SEL (0x1 << 11)
1812 #define RT5670_TDM_DATA_MODE_NOR (0x0 << 11)
1813 #define RT5670_TDM_DATA_MODE_50FS (0x1 << 11)
1855 #define RT5670_WND_WIND_MASK (0x1 << 13) /* Read-Only */
1857 #define RT5670_WND_STRONG_MASK (0x1 << 12) /* Read-Only */
1883 #define RT5670_JD_CBJ_EN (0x1 << 7)
1908 #define RT5670_IF1_ADC1_IN2_SEL (0x1 << 11)
1909 #define RT5670_IF1_ADC1_IN2_SFT 11
1915 #define RT5670_RXDC_SRC_MASK (0x1 << 7)
1916 #define RT5670_RXDC_SRC_STO (0x0 << 7)
1917 #define RT5670_RXDC_SRC_MONO (0x1 << 7)
1918 #define RT5670_RXDC_SRC_SFT (7)
1977 RT5670_DOWN_RATE_FILTER = (0x1 << 7),