Lines Matching +full:12 +full:- +full:13
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5659.h -- RT5659/RT5658 ALSA SoC audio driver
21 /* I/O - Output */
31 /* I/O - Input */
36 /* I/O - Speaker */
42 /* I/O - Sidetone */
44 /* I/O - ADC/DAC/DMIC */
56 /* Mixer - D-D */
65 /* Mixer - PDM */
73 /* Mixer - ADC */
85 /* Mixer - DAC */
127 /* Format - ADC/DAC */
135 /* Format - TDM Control */
142 /* Function - Analog */
170 /* Function - Digital */
585 #define RT5659_JD_MODE (0x1 << 13)
586 #define RT5659_JD_MODE_SFT 13
626 #define RT5659_M_DAC2_L_VOL (0x1 << 13)
627 #define RT5659_M_DAC2_L_VOL_SFT 13
628 #define RT5659_M_DAC2_R_VOL (0x1 << 12)
629 #define RT5659_M_DAC2_R_VOL_SFT 12
650 #define RT5659_STO1_ADC_R_BST_MASK (0x3 << 12)
651 #define RT5659_STO1_ADC_R_BST_SFT 12
656 #define RT5659_MONO_ADC_R_BST_MASK (0x3 << 12)
657 #define RT5659_MONO_ADC_R_BST_SFT 12
662 #define RT5659_STO2_ADC_R_BST_MASK (0x3 << 12)
663 #define RT5659_STO2_ADC_R_BST_SFT 12
670 #define RT5659_STO1_ADC1_SRC_MASK (0x1 << 13)
671 #define RT5659_STO1_ADC1_SRC_SFT 13
672 #define RT5659_STO1_ADC1_SRC_ADC (0x1 << 13)
673 #define RT5659_STO1_ADC1_SRC_DACMIX (0x0 << 13)
674 #define RT5659_STO1_ADC_SRC_MASK (0x1 << 12)
675 #define RT5659_STO1_ADC_SRC_SFT 12
676 #define RT5659_STO1_ADC_SRC_ADC1 (0x1 << 12)
677 #define RT5659_STO1_ADC_SRC_ADC2 (0x0 << 12)
694 #define RT5659_MONO_ADC_L2_SRC_MASK (0x1 << 12)
695 #define RT5659_MONO_ADC_L2_SRC_SFT 12
742 #define RT5659_M_DAC_R1_STO_L (0x1 << 13)
743 #define RT5659_M_DAC_R1_STO_L_SFT 13
744 #define RT5659_G_DAC_R1_STO_L_MASK (0x1 << 12)
745 #define RT5659_G_DAC_R1_STO_L_SFT 12
776 #define RT5659_M_DAC_R1_MONO_L (0x1 << 13)
777 #define RT5659_M_DAC_R1_MONO_L_SFT 13
778 #define RT5659_G_DAC_R1_MONO_L_MASK (0x1 << 12)
779 #define RT5659_G_DAC_R1_MONO_L_SFT 12
828 #define RT5659_IF2_ADC_IN_MASK (0x3 << 12)
829 #define RT5659_IF2_ADC_IN_SFT 12
846 #define RT5659_PDM1_R_MASK (0x1 << 13)
847 #define RT5659_PDM1_R_SFT 13
848 #define RT5659_M_PDM1_R (0x1 << 12)
849 #define RT5659_M_PDM1_R_SFT 12
913 #define RT5659_M_DAC_L2_SPKOMIX (0x1 << 13)
914 #define RT5659_M_DAC_L2_SPKOMIX_SFT 13
915 #define RT5659_M_SPKVOLL_SPKOMIX (0x1 << 12)
916 #define RT5659_M_SPKVOLL_SPKOMIX_SFT 12
939 #define RT5659_G_BST3_OM_L_MASK (0x7 << 12)
940 #define RT5659_G_BST3_OM_L_SFT 12
979 #define RT5659_M_OV_L_LM (0x1 << 13)
980 #define RT5659_M_OV_L_LM_SFT 13
981 #define RT5659_M_OV_R_LM (0x1 << 12)
982 #define RT5659_M_OV_R_LM_SFT 12
989 #define RT5659_PWR_I2S3 (0x1 << 13)
990 #define RT5659_PWR_I2S3_BIT 13
991 #define RT5659_PWR_SPDIF (0x1 << 12)
992 #define RT5659_PWR_SPDIF_BIT 12
1019 #define RT5659_PWR_ADC_MF_L (0x1 << 13)
1020 #define RT5659_PWR_ADC_MF_L_BIT 13
1021 #define RT5659_PWR_ADC_MF_R (0x1 << 12)
1022 #define RT5659_PWR_ADC_MF_R_BIT 12
1037 #define RT5659_PWR_VREF2 (0x1 << 13)
1038 #define RT5659_PWR_VREF2_BIT 13
1039 #define RT5659_PWR_FV2 (0x1 << 12)
1040 #define RT5659_PWR_FV2_BIT 12
1063 #define RT5659_PWR_BST3 (0x1 << 13)
1064 #define RT5659_PWR_BST3_BIT 13
1065 #define RT5659_PWR_BST4 (0x1 << 12)
1066 #define RT5659_PWR_BST4_BIT 12
1111 #define RT5659_PWR_SM_L (0x1 << 13)
1112 #define RT5659_PWR_SM_L_BIT 13
1113 #define RT5659_PWR_SM_R (0x1 << 12)
1114 #define RT5659_PWR_SM_R_BIT 12
1131 #define RT5659_PWR_OV_L (0x1 << 13)
1132 #define RT5659_PWR_OV_L_BIT 13
1133 #define RT5659_PWR_OV_R (0x1 << 12)
1134 #define RT5659_PWR_OV_R_BIT 12
1149 #define RT5659_I2S_O_CP_MASK (0x3 << 12)
1150 #define RT5659_I2S_O_CP_SFT 12
1151 #define RT5659_I2S_O_CP_OFF (0x0 << 12)
1152 #define RT5659_I2S_O_CP_U_LAW (0x1 << 12)
1153 #define RT5659_I2S_O_CP_A_LAW (0x2 << 12)
1179 #define RT5659_I2S_PD1_MASK (0x7 << 12)
1180 #define RT5659_I2S_PD1_SFT 12
1181 #define RT5659_I2S_PD1_1 (0x0 << 12)
1182 #define RT5659_I2S_PD1_2 (0x1 << 12)
1183 #define RT5659_I2S_PD1_3 (0x2 << 12)
1184 #define RT5659_I2S_PD1_4 (0x3 << 12)
1185 #define RT5659_I2S_PD1_6 (0x4 << 12)
1186 #define RT5659_I2S_PD1_8 (0x5 << 12)
1187 #define RT5659_I2S_PD1_12 (0x6 << 12)
1188 #define RT5659_I2S_PD1_16 (0x7 << 12)
1239 #define RT5659_DMIC_1L_LH_MASK (0x1 << 13)
1240 #define RT5659_DMIC_1L_LH_SFT 13
1241 #define RT5659_DMIC_1L_LH_RISING (0x0 << 13)
1242 #define RT5659_DMIC_1L_LH_FALLING (0x1 << 13)
1243 #define RT5659_DMIC_1R_LH_MASK (0x1 << 12)
1244 #define RT5659_DMIC_1R_LH_SFT 12
1245 #define RT5659_DMIC_1R_LH_RISING (0x0 << 12)
1246 #define RT5659_DMIC_1R_LH_FALLING (0x1 << 12)
1264 #define RT5659_DS_ADC_SLOT23_SFT 12
1299 #define RT5659_PLL_M_MASK (RT5659_PLL_M_MAX << 12)
1300 #define RT5659_PLL_M_SFT 12
1305 #define RT5659_I2S3_ASRC_MASK (0x1 << 13)
1306 #define RT5659_I2S3_ASRC_SFT 13
1307 #define RT5659_I2S2_ASRC_MASK (0x1 << 12)
1308 #define RT5659_I2S2_ASRC_SFT 12
1331 #define RT5659_DA_STO_T_MASK (0x7 << 12)
1332 #define RT5659_DA_STO_T_SFT 12
1349 #define RT5659_I2S1_RATE_MASK (0xf << 12)
1350 #define RT5659_I2S1_RATE_SFT 12
1403 #define RT5659_DEPOP_MASK (0x1 << 13)
1404 #define RT5659_DEPOP_SFT 13
1405 #define RT5659_DEPOP_AUTO (0x0 << 13)
1406 #define RT5659_DEPOP_MAN (0x1 << 13)
1407 #define RT5659_RAMP_MASK (0x1 << 12)
1408 #define RT5659_RAMP_SFT 12
1409 #define RT5659_RAMP_DIS (0x0 << 12)
1410 #define RT5659_RAMP_EN (0x1 << 12)
1437 #define RT5659_CP_SYS_MASK (0x7 << 12)
1438 #define RT5659_CP_SYS_SFT 12
1494 #define RT5659_MIC1_CLK_MASK (0x1 << 13)
1495 #define RT5659_MIC1_CLK_SFT 13
1496 #define RT5659_MIC1_CLK_DIS (0x0 << 13)
1497 #define RT5659_MIC1_CLK_EN (0x1 << 13)
1498 #define RT5659_MIC2_CLK_MASK (0x1 << 12)
1499 #define RT5659_MIC2_CLK_SFT 12
1500 #define RT5659_MIC2_CLK_DIS (0x0 << 12)
1501 #define RT5659_MIC2_CLK_EN (0x1 << 12)
1567 #define RT5659_EQ_CD_MASK (0x1 << 13)
1568 #define RT5659_EQ_CD_SFT 13
1569 #define RT5659_EQ_CD_DIS (0x0 << 13)
1570 #define RT5659_EQ_CD_EN (0x1 << 13)
1583 #define RT5659_JD1_2_EN_MASK (0x1 << 12)
1584 #define RT5659_JD1_2_EN_SFT 12
1585 #define RT5659_JD1_2_DIS (0x0 << 12)
1586 #define RT5659_JD1_2_EN (0x1 << 12)
1604 #define RT5659_GP3_PIN_MASK (0x1 << 13)
1605 #define RT5659_GP3_PIN_SFT 13
1606 #define RT5659_GP3_PIN_GPIO3 (0x0 << 13)
1607 #define RT5659_GP3_PIN_PDM_SCL (0x1 << 13)
1608 #define RT5659_GP4_PIN_MASK (0x1 << 12)
1609 #define RT5659_GP4_PIN_SFT 12
1610 #define RT5659_GP4_PIN_GPIO4 (0x0 << 12)
1611 #define RT5659_GP4_PIN_PDM_SDA (0x1 << 12)
1673 #define RT5659_OUT_SV_MASK (0x1 << 13)
1674 #define RT5659_OUT_SV_SFT 13
1675 #define RT5659_OUT_SV_DIS (0x0 << 13)
1676 #define RT5659_OUT_SV_EN (0x1 << 13)
1677 #define RT5659_HP_SV_MASK (0x1 << 12)
1678 #define RT5659_HP_SV_SFT 12
1679 #define RT5659_HP_SV_DIS (0x0 << 12)
1680 #define RT5659_HP_SV_EN (0x1 << 12)
1728 #define RT5659_M_RF_DIG_MASK (0x1 << 12)
1729 #define RT5659_M_RF_DIG_SFT 12
1733 #define RT5659_CKXEN_DAC1_MASK (0x1 << 13)
1734 #define RT5659_CKXEN_DAC1_SFT 13
1735 #define RT5659_CKGEN_DAC1_MASK (0x1 << 12)
1736 #define RT5659_CKGEN_DAC1_SFT 12
1743 #define RT5659_CKXEN_ADC1_MASK (0x1 << 13)
1744 #define RT5659_CKXEN_ADC1_SFT 13
1745 #define RT5659_CKGEN_ADC1_MASK (0x1 << 12)
1746 #define RT5659_CKGEN_ADC1_SFT 12