Lines Matching full:adc2

1723 	SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1730 	SOC_DAPM_SINGLE("ADC2 Switch", RT5659_STO1_ADC_MIXER,
1737 	SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
1744 	SOC_DAPM_SINGLE("ADC2 Switch", RT5659_MONO_ADC_MIXER,
2004 	"ADC1", "ADC2"
2014 /* STO1 ADC2 Source */
2025 	SOC_DAPM_ENUM("Stereo1 ADC2 Source", rt5659_sto1_adc2_enum);
2071 	"ADC1 L", "ADC1 R", "ADC2 L", "ADC2 R"
2539 	SND_SOC_DAPM_ADC("ADC2 L", NULL, SND_SOC_NOPM, 0, 0),
2540 	SND_SOC_DAPM_ADC("ADC2 R", NULL, SND_SOC_NOPM, 0, 0),
2546 	SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1,
2548 	SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1,
2552 	SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc2_clk,
2644 	SND_SOC_DAPM_PGA("IF2 ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
2920 	{ "ADC2 L", NULL, "RECMIX2L" },
2921 	{ "ADC2 L", NULL, "ADC2 L Power" },
2922 	{ "ADC2 L", NULL, "ADC2 clock" },
2923 	{ "ADC2 R", NULL, "RECMIX2R" },
2924 	{ "ADC2 R", NULL, "ADC2 R Power" },
2925 	{ "ADC2 R", NULL, "ADC2 clock" },
2949 	{ "Stereo1 ADC L Mux", "ADC2", "ADC2 L" },
2951 	{ "Stereo1 ADC R Mux", "ADC2", "ADC2 R" },
2965 	{ "Mono ADC L Mux", "ADC2 L", "ADC2 L" },
2966 	{ "Mono ADC L Mux", "ADC2 R", "ADC2 R" },
2970 	{ "Mono ADC R Mux", "ADC2 L", "ADC2 L" },
2971 	{ "Mono ADC R Mux", "ADC2 R", "ADC2 R" },
2984 	{ "Stereo1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2988 	{ "Stereo1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2992 	{ "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2996 	{ "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },