Lines Matching +full:11 +full:- +full:7
1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * rt5651.h -- RT5651 ALSA SoC audio driver
12 #include <dt-bindings/sound/rt5651.h>
19 /* I/O - Output */
23 /* I/O - Input */
28 /* I/O - ADC/DAC/DMIC */
35 /* Mixer - D-D */
48 /* Mixer - ADC */
53 /* Mixer - DAC */
72 /* Format - ADC/DAC */
82 /* Function - Analog */
99 /* Function - Digital */
180 #define RT5651_R_MUTE (0x1 << 7)
181 #define RT5651_R_MUTE_SFT 7
198 #define RT5651_IN_DF1 (0x1 << 7)
199 #define RT5651_IN_SFT1 7
211 #define RT5651_INR_SEL_MASK (0x1 << 7)
212 #define RT5651_INR_SEL_SFT 7
213 #define RT5651_INR_SEL_IN4N (0x0 << 7)
214 #define RT5651_INR_SEL_MONON (0x1 << 7)
235 #define RT5651_SEL_DAC_L2 (0x1 << 11)
236 #define RT5651_IF2_DAC_L2 (0x1 << 11)
237 #define RT5651_IF1_DAC_L2 (0x0 << 11)
238 #define RT5651_SEL_DAC_L2_SFT 11
240 #define RT5651_IF2_DAC_R2 (0x1 << 11)
241 #define RT5651_IF1_DAC_R2 (0x0 << 11)
255 #define RT5651_M_MONO_ADC_R (0x1 << 7)
256 #define RT5651_M_MONO_ADC_R_SFT 7
277 #define RT5651_STO1_ADC_2_SRC_MASK (0x1 << 11)
278 #define RT5651_STO1_ADC_2_SRC_SFT 11
279 #define RT5651_STO1_ADC_2_SRC_DMIC (0x0 << 11)
280 #define RT5651_STO1_ADC_2_SRC_DACMIXR (0x1 << 11)
295 #define RT5651_STO2_ADC_L2_SRC_MASK (0x1 << 11)
296 #define RT5651_STO2_ADC_L2_SRC_SFT 11
297 #define RT5651_STO2_ADC_L2_SRC_DMIC (0x0 << 11)
298 #define RT5651_STO2_ADC_L2_SRC_DACMIXR (0x1 << 11)
317 #define RT5651_M_ADCMIX_R (0x1 << 7)
318 #define RT5651_M_ADCMIX_R_SFT 7
329 #define RT5651_DAC_L2_STO_L_VOL_MASK (0x1 << 11)
330 #define RT5651_DAC_L2_STO_L_VOL_SFT 11
355 #define RT5651_STO_DD_L2_VOL_MASK (0x1 << 11)
356 #define RT5651_STO_DD_L2_VOL_SFT 11
383 #define RT5651_M_STO_R_DAC_R (0x1 << 11)
384 #define RT5651_M_STO_R_DAC_R_SFT 11
414 #define RT5651_IF2_ADC_L_SEL_MASK (0x1 << 11)
415 #define RT5651_IF2_ADC_L_SEL_SFT 11
416 #define RT5651_IF2_ADC_L_SEL_TXDP (0x0 << 11)
417 #define RT5651_IF2_ADC_L_SEL_PASS (0x1 << 11)
460 #define RT5651_IF2_ADC_SRC_MASK (0x1 << 7)
461 #define RT5651_IF2_ADC_SRC_SFT 7
462 #define RT5651_IF1_ADC1 (0x0 << 7)
463 #define RT5651_IF1_ADC2 (0x1 << 7)
494 #define PT5631_PDM_CMD_EXE (0x1 << 11)
624 #define RT5651_M_BST1_SPM_L (0x1 << 11)
625 #define RT5651_M_BST1_SPM_L_SFT 11
632 #define RT5651_M_BST1_SPM_R (0x1 << 11)
633 #define RT5651_M_BST1_SPM_R_SFT 11
648 #define RT5651_M_BST1_MM (0x1 << 11)
649 #define RT5651_M_BST1_MM_SFT 11
656 #define RT5651_G_BST1_OM_L_MASK (0x7 << 7)
657 #define RT5651_G_BST1_OM_L_SFT 7
664 #define RT5651_G_DAC_L1_OM_L_MASK (0x7 << 7)
665 #define RT5651_G_DAC_L1_OM_L_SFT 7
686 #define RT5651_G_BST1_OM_R_MASK (0x7 << 7)
687 #define RT5651_G_BST1_OM_R_SFT 7
694 #define RT5651_G_DAC_R1_OM_R_MASK (0x7 << 7)
695 #define RT5651_G_DAC_R1_OM_R_SFT 7
722 #define RT5651_G_LOUTMIX_MASK (0x1 << 11)
723 #define RT5651_G_LOUTMIX_SFT 11
732 #define RT5651_PWR_DAC_R1 (0x1 << 11)
733 #define RT5651_PWR_DAC_R1_BIT 11
744 #define RT5651_PWR_DAC_STO1_F (0x1 << 11)
745 #define RT5651_PWR_DAC_STO1_F_BIT 11
760 #define RT5651_PWR_BG (0x1 << 11)
761 #define RT5651_PWR_BG_BIT 11
762 #define RT5651_PWR_HP_L (0x1 << 7)
763 #define RT5651_PWR_HP_L_BIT 7
787 #define RT5651_PWR_MB1 (0x1 << 11)
788 #define RT5651_PWR_MB1_BIT 11
809 #define RT5651_PWR_RM_L (0x1 << 11)
810 #define RT5651_PWR_RM_L_BIT 11
819 #define RT5651_PWR_HV_L (0x1 << 11)
820 #define RT5651_PWR_HV_L_BIT 11
827 #define RT5651_PWR_IN2_L (0x1 << 7)
828 #define RT5651_PWR_IN2_L_BIT 7
847 #define RT5651_I2S_BP_MASK (0x1 << 7)
848 #define RT5651_I2S_BP_SFT 7
849 #define RT5651_I2S_BP_NOR (0x0 << 7)
850 #define RT5651_I2S_BP_INV (0x1 << 7)
875 #define RT5651_I2S_BCLK_MS2_MASK (0x1 << 11)
876 #define RT5651_I2S_BCLK_MS2_SFT 11
877 #define RT5651_I2S_BCLK_MS2_32 (0x0 << 11)
878 #define RT5651_I2S_BCLK_MS2_64 (0x1 << 11)
903 #define RT5651_DAHPF_EN (0x1 << 11)
904 #define RT5651_DAHPF_EN_SFT 11
996 #define RT5651_TDM_LRCK_PULSE_SEL_MASK (0x1 << 11)
997 #define RT5651_TDM_LRCK_PULSE_SEL_SFT 11
998 #define RT5651_TDM_LRCK_PULSE_SEL_BCLK (0x0 << 11)
999 #define RT5651_TDM_LRCK_PULSE_SEL_CH (0x1 << 11)
1010 #define RT5651_M_TDM2_L (0x1 << 7)
1011 #define RT5651_M_TDM2_L_SFT 7
1081 #define RT5651_PLL_N_MASK (RT5651_PLL_N_MAX << 7)
1082 #define RT5651_PLL_N_SFT 7
1091 #define RT5651_PLL_M_BP (0x1 << 11)
1092 #define RT5651_PLL_M_BP_SFT 11
1103 #define RT5651_ASRC2_REF_MASK (0x1 << 11)
1104 #define RT5651_ASRC2_REF_SFT 11
1105 #define RT5651_ASRC2_REF_LRCK2 (0x0 << 11)
1106 #define RT5651_ASRC2_REF_LRCK1 (0x1 << 11)
1125 #define RT5651_ADC_M_MASK (0x1 << 11)
1126 #define RT5651_ADC_M_SFT 11
1127 #define RT5651_ADC_M_NOR (0x0 << 11)
1128 #define RT5651_ADC_M_ASRC (0x1 << 11)
1167 /*PLL tracking mode 7 (0x8a) */
1198 #define RT5651_HP_CD_PD_MASK (0x1 << 7)
1199 #define RT5651_HP_CD_PD_SFT 7
1200 #define RT5651_HP_CD_PD_DIS (0x0 << 7)
1201 #define RT5651_HP_CD_PD_EN (0x1 << 7)
1240 #define RT5651_BPS_MASK (0x1 << 11)
1241 #define RT5651_BPS_SFT 11
1242 #define RT5651_BPS_DIS (0x0 << 11)
1243 #define RT5651_BPS_EN (0x1 << 11)
1254 #define RT5651_VLO_MASK (0x1 << 7)
1255 #define RT5651_VLO_SFT 7
1256 #define RT5651_VLO_3V (0x0 << 7)
1257 #define RT5651_VLO_32V (0x1 << 7)
1281 #define RT5651_CP_FQ_192_KHZ 7
1284 #define RT5651_OSW_L_MASK (0x1 << 11)
1285 #define RT5651_OSW_L_SFT 11
1286 #define RT5651_OSW_L_DIS (0x0 << 11)
1287 #define RT5651_OSW_L_EN (0x1 << 11)
1313 #define RT5651_MIC1_OVCD_MASK (0x1 << 11)
1314 #define RT5651_MIC1_OVCD_SFT 11
1315 #define RT5651_MIC1_OVCD_DIS (0x0 << 11)
1316 #define RT5651_MIC1_OVCD_EN (0x1 << 11)
1334 #define RT5651_JD_PU (0x1 << 11)
1335 #define RT5651_JD_PU_SFT 11
1376 #define RT5651_EQ_CD_F (0x1 << 7)
1377 #define RT5651_EQ_CD_F_BIT 7
1398 #define RT5651_EQ_LPF1_M_MASK (0x1 << 7)
1399 #define RT5651_EQ_LPF1_M_SFT 7
1400 #define RT5651_EQ_LPF1_M_LO (0x0 << 7)
1401 #define RT5651_EQ_LPF1_M_1ST (0x1 << 7)
1465 #define RT5651_ALC_DRC_MASK (0x1 << 7)
1466 #define RT5651_ALC_DRC_SFT 7
1467 #define RT5651_ALC_DRC_DIS (0x0 << 7)
1468 #define RT5651_ALC_DRC_EN (0x1 << 7)
1481 #define RT5651_ALC_TAR_MASK (0x1f << 7)
1482 #define RT5651_ALC_TAR_SFT 7
1504 #define RT5651_JD_HP_MASK (0x1 << 11)
1505 #define RT5651_JD_HP_SFT 11
1506 #define RT5651_JD_HP_DIS (0x0 << 11)
1507 #define RT5651_JD_HP_EN (0x1 << 11)
1520 #define RT5651_JD_SPR_MASK (0x1 << 7)
1521 #define RT5651_JD_SPR_SFT 7
1522 #define RT5651_JD_SPR_DIS (0x0 << 7)
1523 #define RT5651_JD_SPR_EN (0x1 << 7)
1547 #define RT5651_JD3_EN_STKY (0x1 << 7)
1548 #define RT5651_JD3_EN_STKY_SFT 7
1561 #define RT5651_JD_P_MASK (0x1 << 11)
1562 #define RT5651_JD_P_SFT 11
1563 #define RT5651_JD_P_NOR (0x0 << 11)
1564 #define RT5651_JD_P_INV (0x1 << 11)
1569 #define RT5651_JD1_1_INV (0x1 << 7)
1570 #define RT5651_JD1_1_INV_SFT 7
1589 #define RT5651_MB1_OC_STKY_MASK (0x1 << 11)
1590 #define RT5651_MB1_OC_STKY_SFT 11
1591 #define RT5651_MB1_OC_STKY_DIS (0x0 << 11)
1592 #define RT5651_MB1_OC_STKY_EN (0x1 << 11)
1593 #define RT5651_MB1_OC_P_MASK (0x1 << 7)
1594 #define RT5651_MB1_OC_P_SFT 7
1595 #define RT5651_MB1_OC_P_NOR (0x0 << 7)
1596 #define RT5651_MB1_OC_P_INV (0x1 << 7)
1612 #define RT5651_STA_GP7 (0x1 << 11)
1613 #define RT5651_STA_GP7_BIT 11
1620 #define RT5651_STA_GP2 (0x1 << 7)
1621 #define RT5651_STA_GP2_BIT 7
1646 #define RT5651_GP5_PIN_MASK (0x1 << 7)
1647 #define RT5651_GP5_PIN_SFT 7
1648 #define RT5651_GP5_PIN_GPIO5 (0x0 << 7)
1649 #define RT5651_GP5_PIN_IRQ (0x1 << 7)
1680 #define RT5651_GP4_DR_MASK (0x1 << 11)
1681 #define RT5651_GP4_DR_SFT 11
1682 #define RT5651_GP4_DR_IN (0x0 << 11)
1683 #define RT5651_GP4_DR_OUT (0x1 << 11)
1696 #define RT5651_GP3_OUT_MASK (0x1 << 7)
1697 #define RT5651_GP3_OUT_SFT 7
1698 #define RT5651_GP3_OUT_LO (0x0 << 7)
1699 #define RT5651_GP3_OUT_HI (0x1 << 7)
1734 #define RT5651_GP8_OUT_MASK (0x1 << 7)
1735 #define RT5651_GP8_OUT_SFT 7
1736 #define RT5651_GP8_OUT_LO (0x0 << 7)
1737 #define RT5651_GP8_OUT_HI (0x1 << 7)
1792 #define RT5651_M_BB_HPF_L_MASK (0x1 << 7)
1793 #define RT5651_M_BB_HPF_L_SFT 7
1810 #define RT5651_MP3_HLP_MASK (0x1 << 7)
1811 #define RT5651_MP3_HLP_SFT 7
1812 #define RT5651_MP3_HLP_DIS (0x0 << 7)
1813 #define RT5651_MP3_HLP_EN (0x1 << 7)
1842 #define RT5651_3D_1F_MIX_MASK (0x3 << 11)
1843 #define RT5651_3D_1F_MIX_SFT 11
1852 #define RT5651_M_3D_D2R_MASK (0x1 << 7)
1853 #define RT5651_M_3D_D2R_SFT 7
1882 #define RT5651_SI_DAC_MASK (0x1 << 11)
1883 #define RT5651_SI_DAC_SFT 11
1884 #define RT5651_SI_DAC_AUTO (0x0 << 11)
1885 #define RT5651_SI_DAC_TEST (0x1 << 11)
1931 #define RT5651_ZCD_DIG_MASK (0x1 << 11)
1932 #define RT5651_ZCD_DIG_SFT 11
1933 #define RT5651_ZCD_DIG_DIS (0x0 << 11)
1934 #define RT5651_ZCD_DIG_EN (0x1 << 11)
1941 #define RT5651_M_ZCD_OM_L (0x1 << 7)
2015 #define RT5651_WND_WIND_MASK (0x1 << 13) /* Read-Only */
2017 #define RT5651_WND_STRONG_MASK (0x1 << 12) /* Read-Only */