Lines Matching +full:0 +full:xc400
31 { 0xc003, 0xe0 },
32 { 0xc01b, 0xfc },
33 { 0xc5c3, 0xf2 },
34 { 0xc5c2, 0x00 },
35 { 0xc5c6, 0x10 },
36 { 0xc5c4, 0x12 },
37 { 0xc5c8, 0x03 },
38 { 0xc5d8, 0x0a },
39 { 0xc5f7, 0x22 },
40 { 0xc5f6, 0x22 },
41 { 0xc5d0, 0x0f },
42 { 0xc5d1, 0x89 },
43 { 0xc057, 0x51 },
44 { 0xc054, 0x35 },
45 { 0xc053, 0x55 },
46 { 0xc052, 0x55 },
47 { 0xc051, 0x13 },
48 { 0xc050, 0x15 },
49 { 0xc060, 0x77 },
50 { 0xc061, 0x55 },
51 { 0xc063, 0x55 },
52 { 0xc065, 0xa5 },
53 { 0xc06b, 0x0a },
54 { 0xca05, 0xd6 },
55 { 0xca25, 0xd6 },
56 { 0xcd00, 0x05 },
57 { 0xc604, 0x40 },
58 { 0xc609, 0x40 },
59 { 0xc046, 0xff },
60 { 0xc045, 0xff },
61 { 0xc044, 0xff },
62 { 0xc043, 0xff },
63 { 0xc042, 0xff },
64 { 0xc041, 0xff },
65 { 0xc040, 0xff },
66 { 0xcc10, 0x01 },
67 { 0xc700, 0xf0 },
68 { 0xc701, 0x13 },
69 { 0xc901, 0x04 },
70 { 0xc900, 0x73 },
71 { 0xde03, 0x05 },
72 { 0xdd0b, 0x0d },
73 { 0xdd0a, 0xff },
74 { 0xdd09, 0x0d },
75 { 0xdd08, 0xff },
76 { 0xc570, 0x08 },
77 { 0xe803, 0xbe },
78 { 0xc003, 0xc0 },
79 { 0xc081, 0xfe },
80 { 0xce31, 0x0d },
81 { 0xce30, 0xae },
82 { 0xce37, 0x0b },
83 { 0xce36, 0xd2 },
84 { 0xce39, 0x04 },
85 { 0xce38, 0x80 },
86 { 0xce3f, 0x00 },
87 { 0xce3e, 0x00 },
88 { 0xd470, 0x8b },
89 { 0xd471, 0x18 },
90 { 0xc019, 0x10 },
91 { 0xd487, 0x3f },
92 { 0xd486, 0xc3 },
93 { 0x3fc2bfc7, 0x00 },
94 { 0x3fc2bfc6, 0x00 },
95 { 0x3fc2bfc5, 0x00 },
96 { 0x3fc2bfc4, 0x01 },
97 { 0x0000d486, 0x43 },
98 { 0x1000db00, 0x02 },
99 { 0x1000db01, 0x00 },
100 { 0x1000db02, 0x11 },
101 { 0x1000db03, 0x00 },
102 { 0x1000db04, 0x00 },
103 { 0x1000db05, 0x82 },
104 { 0x1000db06, 0x04 },
105 { 0x1000db07, 0xf1 },
106 { 0x1000db08, 0x00 },
107 { 0x1000db09, 0x00 },
108 { 0x1000db0a, 0x40 },
109 { 0x0000d540, 0x01 },
110 { 0xd172, 0x2a },
111 { 0xc5d6, 0x01 },
115 { 0xc003, 0xe0 },
116 { 0xe80a, 0x01 },
117 { 0xc5c3, 0xf3 },
118 { 0xc057, 0x51 },
119 { 0xc054, 0x35 },
120 { 0xca05, 0xd6 },
121 { 0xca07, 0x07 },
122 { 0xca25, 0xd6 },
123 { 0xca27, 0x07 },
124 { 0xc604, 0x40 },
125 { 0xc609, 0x40 },
126 { 0xc046, 0xff },
127 { 0xc045, 0xff },
128 { 0xda81, 0x14 },
129 { 0xda8d, 0x14 },
130 { 0xc044, 0xff },
131 { 0xc043, 0xff },
132 { 0xc042, 0xff },
133 { 0xc041, 0x7f },
134 { 0xc040, 0xff },
135 { 0xcc10, 0x01 },
136 { 0xc700, 0xf0 },
137 { 0xc701, 0x13 },
138 { 0xc901, 0x09 },
139 { 0xc900, 0xd0 },
140 { 0xde03, 0x05 },
141 { 0xdd0b, 0x0d },
142 { 0xdd0a, 0xff },
143 { 0xdd09, 0x0d },
144 { 0xdd08, 0xff },
145 { 0xc570, 0x08 },
146 { 0xc086, 0x02 },
147 { 0xc085, 0x7f },
148 { 0xc084, 0x00 },
149 { 0xc081, 0xfe },
150 { 0xf084, 0x0f },
151 { 0xf083, 0xff },
152 { 0xf082, 0xff },
153 { 0xf081, 0xff },
154 { 0xf080, 0xff },
155 { 0xe802, 0xf8 },
156 { 0xe803, 0xbe },
157 { 0xc003, 0xc0 },
158 { 0xd470, 0xec },
159 { 0xd471, 0x3a },
160 { 0xd474, 0x11 },
161 { 0xd475, 0x32 },
162 { 0xd478, 0x64 },
163 { 0xd479, 0x20 },
164 { 0xd47a, 0x10 },
165 { 0xd47c, 0xff },
166 { 0xc019, 0x10 },
167 { 0xd487, 0x0b },
168 { 0xd487, 0x3b },
169 { 0xd486, 0xc3 },
170 { 0xc598, 0x04 },
171 { 0xdb03, 0xf0 },
172 { 0xdb09, 0x00 },
173 { 0xdb08, 0x7a },
174 { 0xdb19, 0x02 },
175 { 0xdb07, 0x5a },
176 { 0xdb05, 0x45 },
177 { 0xd500, 0x00 },
178 { 0xd500, 0x17 },
179 { 0xd600, 0x01 },
180 { 0xd601, 0x02 },
181 { 0xd602, 0x03 },
182 { 0xd603, 0x04 },
183 { 0xd64c, 0x03 },
184 { 0xd64d, 0x03 },
185 { 0xd64e, 0x03 },
186 { 0xd64f, 0x03 },
187 { 0xd650, 0x03 },
188 { 0xd651, 0x03 },
189 { 0xd652, 0x03 },
190 { 0xd610, 0x01 },
191 { 0xd608, 0x03 },
192 { 0xd609, 0x00 },
193 { 0x3fc2bf83, 0x00 },
194 { 0x3fc2bf82, 0x00 },
195 { 0x3fc2bf81, 0x00 },
196 { 0x3fc2bf80, 0x00 },
197 { 0x3fc2bfc7, 0x00 },
198 { 0x3fc2bfc6, 0x00 },
199 { 0x3fc2bfc5, 0x00 },
200 { 0x3fc2bfc4, 0x00 },
201 { 0x3fc2bfc3, 0x00 },
202 { 0x3fc2bfc2, 0x00 },
203 { 0x3fc2bfc1, 0x00 },
204 { 0x3fc2bfc0, 0x03 },
205 { 0x0000d486, 0x43 },
206 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23, RT1320_SDCA_CTL_REQ_POWER_STATE, 0), 0x00 },
207 { 0x1000db00, 0x04 },
208 { 0x1000db01, 0x00 },
209 { 0x1000db02, 0x11 },
210 { 0x1000db03, 0x00 },
211 { 0x1000db04, 0x00 },
212 { 0x1000db05, 0x82 },
213 { 0x1000db06, 0x04 },
214 { 0x1000db07, 0xf1 },
215 { 0x1000db08, 0x00 },
216 { 0x1000db09, 0x00 },
217 { 0x1000db0a, 0x40 },
218 { 0x1000db0b, 0x02 },
219 { 0x1000db0c, 0xf2 },
220 { 0x1000db0d, 0x00 },
221 { 0x1000db0e, 0x00 },
222 { 0x1000db0f, 0xe0 },
223 { 0x1000db10, 0x00 },
224 { 0x1000db11, 0x10 },
225 { 0x1000db12, 0x00 },
226 { 0x1000db13, 0x00 },
227 { 0x1000db14, 0x45 },
228 { 0x0000d540, 0x01 },
229 { 0x0000c081, 0xfc },
230 { 0x0000f01e, 0x80 },
231 { 0xc01b, 0xfc },
232 { 0xc5d1, 0x89 },
233 { 0xc5d8, 0x0a },
234 { 0xc5f7, 0x22 },
235 { 0xc5f6, 0x22 },
236 { 0xc065, 0xa5 },
237 { 0xc06b, 0x0a },
238 { 0xd172, 0x2a },
239 { 0xc5d6, 0x01 },
240 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23, RT1320_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
244 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_PDE11, RT1320_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
245 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_FU113, RT1320_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
246 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_FU113, RT1320_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
247 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_FU14, RT1320_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
248 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_FU14, RT1320_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
249 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_CS113, RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
250 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_CS14, RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x0b },
251 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_PDE11, RT1320_SDCA_CTL_ACTUAL_POWER_STATE, 0), 0x03 },
252 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_FU21, RT1320_SDCA_CTL_FU_MUTE, CH_01), 0x01 },
253 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_FU21, RT1320_SDCA_CTL_FU_MUTE, CH_02), 0x01 },
254 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE27, RT1320_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
255 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23, RT1320_SDCA_CTL_REQ_POWER_STATE, 0), 0x03 },
256 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PPU21, RT1320_SDCA_CTL_POSTURE_NUMBER, 0), 0x00 },
257 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_CS21, RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), 0x09 },
258 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23, RT1320_SDCA_CTL_ACTUAL_POWER_STATE, 0), 0x03 },
262 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_FU113, RT1320_SDCA_CTL_FU_VOLUME, CH_01), 0x0000 },
263 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_FU113, RT1320_SDCA_CTL_FU_VOLUME, CH_02), 0x0000 },
264 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_FU14, RT1320_SDCA_CTL_FU_VOLUME, CH_01), 0x0000 },
265 { SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_FU14, RT1320_SDCA_CTL_FU_VOLUME, CH_02), 0x0000 },
266 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_FU21, RT1320_SDCA_CTL_FU_VOLUME, CH_01), 0x0000 },
267 { SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_FU21, RT1320_SDCA_CTL_FU_VOLUME, CH_02), 0x0000 },
273 case 0xc000 ... 0xc086: in rt1320_readable_register()
274 case 0xc400 ... 0xc409: in rt1320_readable_register()
275 case 0xc480 ... 0xc48f: in rt1320_readable_register()
276 case 0xc4c0 ... 0xc4c4: in rt1320_readable_register()
277 case 0xc4e0 ... 0xc4e7: in rt1320_readable_register()
278 case 0xc500: in rt1320_readable_register()
279 case 0xc560 ... 0xc56b: in rt1320_readable_register()
280 case 0xc570: in rt1320_readable_register()
281 case 0xc580 ... 0xc59a: in rt1320_readable_register()
282 case 0xc5b0 ... 0xc60f: in rt1320_readable_register()
283 case 0xc640 ... 0xc64f: in rt1320_readable_register()
284 case 0xc670: in rt1320_readable_register()
285 case 0xc680 ... 0xc683: in rt1320_readable_register()
286 case 0xc700 ... 0xc76f: in rt1320_readable_register()
287 case 0xc800 ... 0xc801: in rt1320_readable_register()
288 case 0xc820: in rt1320_readable_register()
289 case 0xc900 ... 0xc901: in rt1320_readable_register()
290 case 0xc920 ... 0xc921: in rt1320_readable_register()
291 case 0xca00 ... 0xca07: in rt1320_readable_register()
292 case 0xca20 ... 0xca27: in rt1320_readable_register()
293 case 0xca40 ... 0xca4b: in rt1320_readable_register()
294 case 0xca60 ... 0xca68: in rt1320_readable_register()
295 case 0xca80 ... 0xca88: in rt1320_readable_register()
296 case 0xcb00 ... 0xcb0c: in rt1320_readable_register()
297 case 0xcc00 ... 0xcc12: in rt1320_readable_register()
298 case 0xcc80 ... 0xcc81: in rt1320_readable_register()
299 case 0xcd00: in rt1320_readable_register()
300 case 0xcd80 ... 0xcd82: in rt1320_readable_register()
301 case 0xce00 ... 0xce4d: in rt1320_readable_register()
302 case 0xcf00 ... 0xcf25: in rt1320_readable_register()
303 case 0xd000 ... 0xd0ff: in rt1320_readable_register()
304 case 0xd100 ... 0xd1ff: in rt1320_readable_register()
305 case 0xd200 ... 0xd2ff: in rt1320_readable_register()
306 case 0xd300 ... 0xd3ff: in rt1320_readable_register()
307 case 0xd400 ... 0xd403: in rt1320_readable_register()
308 case 0xd410 ... 0xd417: in rt1320_readable_register()
309 case 0xd470 ... 0xd497: in rt1320_readable_register()
310 case 0xd4dc ... 0xd50f: in rt1320_readable_register()
311 case 0xd520 ... 0xd543: in rt1320_readable_register()
312 case 0xd560 ... 0xd5ef: in rt1320_readable_register()
313 case 0xd600 ... 0xd663: in rt1320_readable_register()
314 case 0xda00 ... 0xda6e: in rt1320_readable_register()
315 case 0xda80 ... 0xda9e: in rt1320_readable_register()
316 case 0xdb00 ... 0xdb7f: in rt1320_readable_register()
317 case 0xdc00: in rt1320_readable_register()
318 case 0xdc20 ... 0xdc21: in rt1320_readable_register()
319 case 0xdd00 ... 0xdd17: in rt1320_readable_register()
320 case 0xde00 ... 0xde09: in rt1320_readable_register()
321 case 0xdf00 ... 0xdf1b: in rt1320_readable_register()
322 case 0xe000 ... 0xe847: in rt1320_readable_register()
323 case 0xf01e: in rt1320_readable_register()
324 case 0xf717 ... 0xf719: in rt1320_readable_register()
325 case 0xf720 ... 0xf723: in rt1320_readable_register()
326 case 0x1000cd91 ... 0x1000cd96: in rt1320_readable_register()
327 case 0x1000f008: in rt1320_readable_register()
328 case 0x1000f021: in rt1320_readable_register()
329 case 0x3fe2e000 ... 0x3fe2e003: in rt1320_readable_register()
330 case 0x3fc2ab80 ... 0x3fc2abd4: in rt1320_readable_register()
331 /* 0x40801508/0x40801809/0x4080180a/0x40801909/0x4080190a */ in rt1320_readable_register()
332 case SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_PDE11, RT1320_SDCA_CTL_REQ_POWER_STATE, 0): in rt1320_readable_register()
337 /* 0x40880900/0x40880980 */ in rt1320_readable_register()
338 case SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_CS113, RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): in rt1320_readable_register()
339 case SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_CS14, RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): in rt1320_readable_register()
340 /* 0x40881500 */ in rt1320_readable_register()
341 case SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_PDE11, RT1320_SDCA_CTL_ACTUAL_POWER_STATE, 0): in rt1320_readable_register()
342 /* 0x41000189/0x4100018a */ in rt1320_readable_register()
345 /* 0x41001388 */ in rt1320_readable_register()
346 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE27, RT1320_SDCA_CTL_REQ_POWER_STATE, 0): in rt1320_readable_register()
347 /* 0x41001988 */ in rt1320_readable_register()
348 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23, RT1320_SDCA_CTL_REQ_POWER_STATE, 0): in rt1320_readable_register()
349 /* 0x41080000 */ in rt1320_readable_register()
350 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT0, RT1320_SDCA_CTL_FUNC_STATUS, 0): in rt1320_readable_register()
351 /* 0x41080200 */ in rt1320_readable_register()
352 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PPU21, RT1320_SDCA_CTL_POSTURE_NUMBER, 0): in rt1320_readable_register()
353 /* 0x41080900 */ in rt1320_readable_register()
354 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_CS113, RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): in rt1320_readable_register()
355 /* 0x41080980 */ in rt1320_readable_register()
356 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_CS14, RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): in rt1320_readable_register()
357 /* 0x41081080 */ in rt1320_readable_register()
358 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_CS21, RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX, 0): in rt1320_readable_register()
359 /* 0x41081480/0x41081488 */ in rt1320_readable_register()
360 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_SAPU, RT1320_SDCA_CTL_SAPU_PROTECTION_MODE, 0): in rt1320_readable_register()
361 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_SAPU, RT1320_SDCA_CTL_SAPU_PROTECTION_STATUS, 0): in rt1320_readable_register()
362 /* 0x41081980 */ in rt1320_readable_register()
363 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23, RT1320_SDCA_CTL_ACTUAL_POWER_STATE, 0): in rt1320_readable_register()
373 case 0xc000: in rt1320_volatile_register()
374 case 0xc003: in rt1320_volatile_register()
375 case 0xc081: in rt1320_volatile_register()
376 case 0xc402 ... 0xc406: in rt1320_volatile_register()
377 case 0xc48c ... 0xc48f: in rt1320_volatile_register()
378 case 0xc560: in rt1320_volatile_register()
379 case 0xc5b5 ... 0xc5b7: in rt1320_volatile_register()
380 case 0xc5fc ... 0xc5ff: in rt1320_volatile_register()
381 case 0xc820: in rt1320_volatile_register()
382 case 0xc900: in rt1320_volatile_register()
383 case 0xc920: in rt1320_volatile_register()
384 case 0xca42: in rt1320_volatile_register()
385 case 0xca62: in rt1320_volatile_register()
386 case 0xca82: in rt1320_volatile_register()
387 case 0xcd00: in rt1320_volatile_register()
388 case 0xce03: in rt1320_volatile_register()
389 case 0xce10: in rt1320_volatile_register()
390 case 0xce14 ... 0xce17: in rt1320_volatile_register()
391 case 0xce44 ... 0xce49: in rt1320_volatile_register()
392 case 0xce4c ... 0xce4d: in rt1320_volatile_register()
393 case 0xcf0c: in rt1320_volatile_register()
394 case 0xcf10 ... 0xcf25: in rt1320_volatile_register()
395 case 0xd486 ... 0xd487: in rt1320_volatile_register()
396 case 0xd4e5 ... 0xd4e6: in rt1320_volatile_register()
397 case 0xd4e8 ... 0xd4ff: in rt1320_volatile_register()
398 case 0xd530: in rt1320_volatile_register()
399 case 0xd540: in rt1320_volatile_register()
400 case 0xd543: in rt1320_volatile_register()
401 case 0xdb58 ... 0xdb5f: in rt1320_volatile_register()
402 case 0xdb60 ... 0xdb63: in rt1320_volatile_register()
403 case 0xdb68 ... 0xdb69: in rt1320_volatile_register()
404 case 0xdb6d: in rt1320_volatile_register()
405 case 0xdb70 ... 0xdb71: in rt1320_volatile_register()
406 case 0xdb76: in rt1320_volatile_register()
407 case 0xdb7a: in rt1320_volatile_register()
408 case 0xdb7c ... 0xdb7f: in rt1320_volatile_register()
409 case 0xdd0c ... 0xdd13: in rt1320_volatile_register()
410 case 0xde02: in rt1320_volatile_register()
411 case 0xdf14 ... 0xdf1b: in rt1320_volatile_register()
412 case 0xe83c ... 0xe847: in rt1320_volatile_register()
413 case 0xf01e: in rt1320_volatile_register()
414 case 0xf717 ... 0xf719: in rt1320_volatile_register()
415 case 0xf720 ... 0xf723: in rt1320_volatile_register()
416 case 0x10000000 ... 0x10007fff: in rt1320_volatile_register()
417 case 0x1000c000 ... 0x1000dfff: in rt1320_volatile_register()
418 case 0x1000f008: in rt1320_volatile_register()
419 case 0x1000f021: in rt1320_volatile_register()
420 case 0x3fc2ab80 ... 0x3fc2abd4: in rt1320_volatile_register()
421 case 0x3fc2bf80 ... 0x3fc2bf83: in rt1320_volatile_register()
422 case 0x3fc2bfc0 ... 0x3fc2bfc7: in rt1320_volatile_register()
423 case 0x3fe2e000 ... 0x3fe2e003: in rt1320_volatile_register()
424 case SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_PDE11, RT1320_SDCA_CTL_ACTUAL_POWER_STATE, 0): in rt1320_volatile_register()
425 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT0, RT1320_SDCA_CTL_FUNC_STATUS, 0): in rt1320_volatile_register()
426 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_SAPU, RT1320_SDCA_CTL_SAPU_PROTECTION_MODE, 0): in rt1320_volatile_register()
427 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_SAPU, RT1320_SDCA_CTL_SAPU_PROTECTION_STATUS, 0): in rt1320_volatile_register()
428 case SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23, RT1320_SDCA_CTL_ACTUAL_POWER_STATE, 0): in rt1320_volatile_register()
455 .max_register = 0x41081980,
468 .max_register = 0x41000192,
506 i = 0; in rt1320_read_prop()
524 j = 0; in rt1320_read_prop()
538 /* BIOS may set wake_capable. Make sure it is 0 as wake events are disabled. */ in rt1320_read_prop()
539 prop->wake_capable = 0; in rt1320_read_prop()
541 return 0; in rt1320_read_prop()
554 SDW_SDCA_CTL(func, entity, RT1320_SDCA_CTL_ACTUAL_POWER_STATE, 0), &val); in rt1320_pde_transition_delay()
566 return 0; in rt1320_pde_transition_delay()
591 regmap_write(rt1320->regmap, 0xc598, 0x00); in rt1320_load_mcu_patch()
592 regmap_write(rt1320->regmap, 0x10007000, 0x67); in rt1320_load_mcu_patch()
593 regmap_write(rt1320->regmap, 0x10007001, 0x80); in rt1320_load_mcu_patch()
594 regmap_write(rt1320->regmap, 0x10007002, 0x00); in rt1320_load_mcu_patch()
595 regmap_write(rt1320->regmap, 0x10007003, 0x00); in rt1320_load_mcu_patch()
598 if ((patch->size % 8) == 0) { in rt1320_load_mcu_patch()
599 for (i = 0; i < patch->size; i += 8) { in rt1320_load_mcu_patch()
600 addr = (ptr[i] & 0xff) | (ptr[i + 1] & 0xff) << 8 | in rt1320_load_mcu_patch()
601 (ptr[i + 2] & 0xff) << 16 | (ptr[i + 3] & 0xff) << 24; in rt1320_load_mcu_patch()
602 val = (ptr[i + 4] & 0xff) | (ptr[i + 5] & 0xff) << 8 | in rt1320_load_mcu_patch()
603 (ptr[i + 6] & 0xff) << 16 | (ptr[i + 7] & 0xff) << 24; in rt1320_load_mcu_patch()
605 if (addr > 0x10007fff || addr < 0x10007000) { in rt1320_load_mcu_patch()
606 dev_err(&slave->dev, "%s: the address 0x%x is wrong", __func__, addr); in rt1320_load_mcu_patch()
609 if (val > 0xff) { in rt1320_load_mcu_patch()
610 dev_err(&slave->dev, "%s: the value 0x%x is wrong", __func__, val); in rt1320_load_mcu_patch()
625 for (i = 0; i < ARRAY_SIZE(rt1320_blind_write); i++) { in rt1320_vab_preset()
630 if (reg == 0x3fc2bfc7) in rt1320_vab_preset()
644 for (i = 0; i < ARRAY_SIZE(rt1320_vc_blind_write); i++) { in rt1320_vc_preset()
649 if (reg == 0x3fc2bf83) in rt1320_vc_preset()
652 …if ((reg == SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23, RT1320_SDCA_CTL_REQ_POWER_STATE, 0))… in rt1320_vc_preset()
653 (val == 0x00)) { in rt1320_vc_preset()
657 dev_dbg(&slave->dev, "%s, RT1320_KR0_INT_READY=0x%x\n", __func__, tmp); in rt1320_vc_preset()
658 if (tmp == 0x1f) in rt1320_vc_preset()
670 if (reg == SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PDE23, RT1320_SDCA_CTL_REQ_POWER_STATE, 0)) in rt1320_vc_preset()
681 return 0; in rt1320_io_init()
698 if (rt1320->version_id < 0) { in rt1320_io_init()
704 SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT0, RT1320_SDCA_CTL_FUNC_STATUS, 0), &_func_status); in rt1320_io_init()
705 dev_dbg(dev, "%s amp func_status=0x%x\n", __func__, amp_func_status); in rt1320_io_init()
715 SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT0, RT1320_SDCA_CTL_FUNC_STATUS, 0), in rt1320_io_init()
720 RT1320_SDCA_CTL_REQ_POWER_STATE, 0), 0); in rt1320_io_init()
728 dev_dbg(dev, "%s ROM version=0x%x\n", __func__, val); in rt1320_io_init()
736 RT1320_SDCA_CTL_REQ_POWER_STATE, 0), 3); in rt1320_io_init()
755 return 0; in rt1320_io_init()
771 return 0; in rt1320_update_status()
783 unsigned char ps0 = 0x0, ps3 = 0x3; in rt1320_pde11_event()
789 RT1320_SDCA_CTL_REQ_POWER_STATE, 0), ps0); in rt1320_pde11_event()
795 RT1320_SDCA_CTL_REQ_POWER_STATE, 0), ps3); in rt1320_pde11_event()
802 return 0; in rt1320_pde11_event()
811 unsigned char ps0 = 0x0, ps3 = 0x3; in rt1320_pde23_event()
817 RT1320_SDCA_CTL_REQ_POWER_STATE, 0), ps0); in rt1320_pde23_event()
823 RT1320_SDCA_CTL_REQ_POWER_STATE, 0), ps3); in rt1320_pde23_event()
830 return 0; in rt1320_pde23_event()
842 const unsigned int interval_offset = 0xc0; in rt1320_set_gain_put()
843 unsigned int changed = 0, reg_base; in rt1320_set_gain_put()
855 gain_l_val = ucontrol->value.integer.value[0]; in rt1320_set_gain_put()
858 gain_l_val = 0 - ((mc->max - gain_l_val) * interval_offset); in rt1320_set_gain_put()
859 gain_l_val &= 0xffff; in rt1320_set_gain_put()
865 gain_r_val = 0 - ((mc->max - gain_r_val) * interval_offset); in rt1320_set_gain_put()
866 gain_r_val &= 0xffff; in rt1320_set_gain_put()
869 return 0; in rt1320_set_gain_put()
881 for (i = 0; i < p->count; i++) { in rt1320_set_gain_put()
894 gain_val[i] = 0x1e00 - ((p->max - gain_val[i]) * interval_offset); in rt1320_set_gain_put()
895 gain_val[i] &= 0xffff; in rt1320_set_gain_put()
901 return 0; in rt1320_set_gain_put()
903 for (i = 0; i < p->count; i++) { in rt1320_set_gain_put()
912 if (err < 0) in rt1320_set_gain_put()
913 dev_err(&rt1320->sdw_slave->dev, "0x%08x can't be set\n", reg_base + i); in rt1320_set_gain_put()
927 unsigned int read_l, read_r, ctl_l = 0, ctl_r = 0; in rt1320_set_gain_get()
928 const unsigned int interval_offset = 0xc0; in rt1320_set_gain_get()
938 ctl_l = mc->max - (((0 - read_l) & 0xffff) / interval_offset); in rt1320_set_gain_get()
941 ctl_r = mc->max - (((0 - read_r) & 0xffff) / interval_offset); in rt1320_set_gain_get()
945 ucontrol->value.integer.value[0] = ctl_l; in rt1320_set_gain_get()
953 for (i = 0; i < p->count; i++) { in rt1320_set_gain_get()
962 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset); in rt1320_set_gain_get()
966 return 0; in rt1320_set_gain_get()
974 for (i = 0; i < ARRAY_SIZE(rt1320->fu_mixer_mute); i++) { in rt1320_set_fu_capture_ctl()
975 ch_mute = (rt1320->fu_dapm_mute || rt1320->fu_mixer_mute[i]) ? 0x01 : 0x00; in rt1320_set_fu_capture_ctl()
985 if (err < 0) in rt1320_set_fu_capture_ctl()
989 return 0; in rt1320_set_fu_capture_ctl()
1001 for (i = 0; i < p->count; i++) in rt1320_dmic_fu_capture_get()
1004 return 0; in rt1320_dmic_fu_capture_get()
1014 int err, changed = 0, i; in rt1320_dmic_fu_capture_put()
1016 for (i = 0; i < p->count; i++) { in rt1320_dmic_fu_capture_put()
1023 if (err < 0) in rt1320_dmic_fu_capture_put()
1040 uinfo->value.integer.min = 0; in rt1320_dmic_fu_info()
1042 return 0; in rt1320_dmic_fu_info()
1062 return 0; in rt1320_dmic_fu_event()
1078 SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_PPU21, RT1320_SDCA_CTL_POSTURE_NUMBER, 0), 0,
1081 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -6525, 75, 0);
1082 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -1725, 75, 0);
1088 0, 0x57, 0, rt1320_set_gain_get, rt1320_set_gain_put, out_vol_tlv),
1096 rt1320_set_gain_get, rt1320_set_gain_put, 4, 0x3f, in_vol_tlv, rt1320_dmic_fu_info),
1102 0, 1, 1);
1106 0, 1, 1);
1110 SND_SOC_DAPM_AIF_IN("DP1RX", "DP1 Playback", 0, SND_SOC_NOPM, 0, 0),
1111 SND_SOC_DAPM_AIF_OUT("DP4TX", "DP4 Capture", 0, SND_SOC_NOPM, 0, 0),
1112 SND_SOC_DAPM_AIF_OUT("DP8-10TX", "DP8-10 Capture", 0, SND_SOC_NOPM, 0, 0),
1115 SND_SOC_DAPM_PGA("FU21", SND_SOC_NOPM, 0, 0, NULL, 0),
1116 SND_SOC_DAPM_SUPPLY("PDE 23", SND_SOC_NOPM, 0, 0,
1119 SND_SOC_DAPM_SUPPLY("PDE 11", SND_SOC_NOPM, 0, 0,
1121 SND_SOC_DAPM_ADC("FU 113", NULL, SND_SOC_NOPM, 0, 0),
1122 SND_SOC_DAPM_ADC("FU 14", NULL, SND_SOC_NOPM, 0, 0),
1123 SND_SOC_DAPM_PGA_E("FU", SND_SOC_NOPM, 0, 0, NULL, 0,
1127 SND_SOC_DAPM_SWITCH("OT23 L", SND_SOC_NOPM, 0, 0, &rt1320_spk_l_dac),
1128 SND_SOC_DAPM_SWITCH("OT23 R", SND_SOC_NOPM, 0, 0, &rt1320_spk_r_dac),
1133 SND_SOC_DAPM_PGA("AEC Data", SND_SOC_NOPM, 0, 0, NULL, 0),
1162 return 0; in rt1320_set_sdw_stream()
1205 dmic_port_config[0].ch_mask = BIT(0) | BIT(1); in rt1320_sdw_hw_params()
1206 dmic_port_config[0].num = 8; in rt1320_sdw_hw_params()
1207 dmic_port_config[1].ch_mask = BIT(0) | BIT(1); in rt1320_sdw_hw_params()
1255 SDW_SDCA_CTL(FUNC_NUM_AMP, RT1320_SDCA_ENT_CS21, RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), in rt1320_sdw_hw_params()
1259 SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_CS113, RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), in rt1320_sdw_hw_params()
1262 SDW_SDCA_CTL(FUNC_NUM_MIC, RT1320_SDCA_ENT_CS14, RT1320_SDCA_CTL_SAMPLE_FREQ_INDEX, 0), in rt1320_sdw_hw_params()
1266 return 0; in rt1320_sdw_hw_params()
1282 return 0; in rt1320_sdw_pcm_hw_free()
1302 return 0; in rt1320_sdw_component_probe()
1306 if (ret < 0 && ret != -EACCES) in rt1320_sdw_component_probe()
1309 return 0; in rt1320_sdw_component_probe()
1396 rt1320->fu_mixer_mute[0] = rt1320->fu_mixer_mute[1] = in rt1320_sdw_init()
1403 if (ret < 0) in rt1320_sdw_init()
1447 return 0; in rt1320_sdw_remove()
1451 * Version A/B will use the class id 0
1455 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1320, 0x3, 0x0, 0),
1456 SDW_SLAVE_ENTRY_EXT(0x025d, 0x1320, 0x3, 0x1, 0),
1466 return 0; in rt1320_dev_suspend()
1470 return 0; in rt1320_dev_suspend()
1482 return 0; in rt1320_dev_resume()
1495 slave->unattach_request = 0; in rt1320_dev_resume()
1500 return 0; in rt1320_dev_resume()