Lines Matching +full:pwr +full:- +full:reg
1 // SPDX-License-Identifier: GPL-2.0
3 // peb2466.c -- Infineon PEB2466 ALSA SoC driver
32 int reg; member
42 u8 spi_tx_buf[2 + 8]; /* Cannot use stack area for SPI (dma-safe memory) */
43 u8 spi_rx_buf[2 + 8]; /* Cannot use stack area for SPI (dma-safe memory) */
136 .tx_buf = &peb2466->spi_tx_buf, in peb2466_write_byte()
140 peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_W; in peb2466_write_byte()
141 peb2466->spi_tx_buf[1] = val; in peb2466_write_byte()
143 dev_dbg(&peb2466->spi->dev, "write byte (cmd %02x) %02x\n", in peb2466_write_byte()
144 peb2466->spi_tx_buf[0], peb2466->spi_tx_buf[1]); in peb2466_write_byte()
146 return spi_sync_transfer(peb2466->spi, &xfer, 1); in peb2466_write_byte()
152 .tx_buf = &peb2466->spi_tx_buf, in peb2466_read_byte()
153 .rx_buf = &peb2466->spi_rx_buf, in peb2466_read_byte()
158 peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_R; in peb2466_read_byte()
160 ret = spi_sync_transfer(peb2466->spi, &xfer, 1); in peb2466_read_byte()
164 if (peb2466->spi_rx_buf[1] != 0x81) { in peb2466_read_byte()
165 dev_err(&peb2466->spi->dev, in peb2466_read_byte()
167 peb2466->spi_tx_buf[0], peb2466->spi_rx_buf[1]); in peb2466_read_byte()
168 return -EILSEQ; in peb2466_read_byte()
171 *val = peb2466->spi_rx_buf[2]; in peb2466_read_byte()
173 dev_dbg(&peb2466->spi->dev, "read byte (cmd %02x) %02x\n", in peb2466_read_byte()
174 peb2466->spi_tx_buf[0], *val); in peb2466_read_byte()
182 .tx_buf = &peb2466->spi_tx_buf, in peb2466_write_buf()
187 return -EINVAL; in peb2466_write_buf()
189 peb2466->spi_tx_buf[0] = cmd | PEB2466_CMD_W; in peb2466_write_buf()
190 memcpy(&peb2466->spi_tx_buf[1], buf, len); in peb2466_write_buf()
192 dev_dbg(&peb2466->spi->dev, "write buf (cmd %02x, %u) %*ph\n", in peb2466_write_buf()
193 peb2466->spi_tx_buf[0], len, len, &peb2466->spi_tx_buf[1]); in peb2466_write_buf()
195 return spi_sync_transfer(peb2466->spi, &xfer, 1); in peb2466_write_buf()
198 static int peb2466_reg_write(void *context, unsigned int reg, unsigned int val) in peb2466_reg_write() argument
207 switch (reg & PEB2466_CMD_MASK) { in peb2466_reg_write()
210 ret = peb2466_write_byte(peb2466, reg, val); in peb2466_reg_write()
213 dev_err(&peb2466->spi->dev, "Not a XOP or SOP command\n"); in peb2466_reg_write()
214 ret = -EINVAL; in peb2466_reg_write()
220 static int peb2466_reg_read(void *context, unsigned int reg, unsigned int *val) in peb2466_reg_read() argument
227 switch (reg & PEB2466_CMD_MASK) { in peb2466_reg_read()
230 ret = peb2466_read_byte(peb2466, reg, &tmp); in peb2466_reg_read()
235 dev_err(&peb2466->spi->dev, "Not a XOP or SOP command\n"); in peb2466_reg_read()
236 ret = -EINVAL; in peb2466_reg_read()
255 (struct peb2466_lkup_ctrl *)kcontrol->private_value; in peb2466_lkup_ctrl_info()
257 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in peb2466_lkup_ctrl_info()
258 uinfo->count = 1; in peb2466_lkup_ctrl_info()
259 uinfo->value.integer.min = 0; in peb2466_lkup_ctrl_info()
260 uinfo->value.integer.max = lkup_ctrl->lookup->count - 1; in peb2466_lkup_ctrl_info()
268 (struct peb2466_lkup_ctrl *)kcontrol->private_value; in peb2466_lkup_ctrl_get()
270 ucontrol->value.integer.value[0] = lkup_ctrl->index; in peb2466_lkup_ctrl_get()
278 (struct peb2466_lkup_ctrl *)kcontrol->private_value; in peb2466_lkup_ctrl_put()
284 index = ucontrol->value.integer.value[0]; in peb2466_lkup_ctrl_put()
285 if (index >= lkup_ctrl->lookup->count) in peb2466_lkup_ctrl_put()
286 return -EINVAL; in peb2466_lkup_ctrl_put()
288 if (index == lkup_ctrl->index) in peb2466_lkup_ctrl_put()
291 ret = peb2466_write_buf(peb2466, lkup_ctrl->reg, in peb2466_lkup_ctrl_put()
292 lkup_ctrl->lookup->table[index], 4); in peb2466_lkup_ctrl_put()
296 lkup_ctrl->index = index; in peb2466_lkup_ctrl_put()
307 BUILD_BUG_ON(sizeof(lkup_ctrl->tlv_array) < sizeof(tlv_array)); in peb2466_add_lkup_ctrl()
308 memcpy(lkup_ctrl->tlv_array, tlv_array, sizeof(tlv_array)); in peb2466_add_lkup_ctrl()
314 control.tlv.p = lkup_ctrl->tlv_array; in peb2466_add_lkup_ctrl()
382 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in peb2466_tg_freq_get()
384 switch (e->reg) { in peb2466_tg_freq_get()
386 ucontrol->value.enumerated.item[0] = peb2466->ch[0].tg1_freq_item; in peb2466_tg_freq_get()
389 ucontrol->value.enumerated.item[0] = peb2466->ch[0].tg2_freq_item; in peb2466_tg_freq_get()
392 ucontrol->value.enumerated.item[0] = peb2466->ch[1].tg1_freq_item; in peb2466_tg_freq_get()
395 ucontrol->value.enumerated.item[0] = peb2466->ch[1].tg2_freq_item; in peb2466_tg_freq_get()
398 ucontrol->value.enumerated.item[0] = peb2466->ch[2].tg1_freq_item; in peb2466_tg_freq_get()
401 ucontrol->value.enumerated.item[0] = peb2466->ch[2].tg2_freq_item; in peb2466_tg_freq_get()
404 ucontrol->value.enumerated.item[0] = peb2466->ch[3].tg1_freq_item; in peb2466_tg_freq_get()
407 ucontrol->value.enumerated.item[0] = peb2466->ch[3].tg2_freq_item; in peb2466_tg_freq_get()
410 return -EINVAL; in peb2466_tg_freq_get()
420 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; in peb2466_tg_freq_put()
426 index = ucontrol->value.enumerated.item[0]; in peb2466_tg_freq_put()
429 return -EINVAL; in peb2466_tg_freq_put()
431 switch (e->reg) { in peb2466_tg_freq_put()
433 tg_freq_item = &peb2466->ch[0].tg1_freq_item; in peb2466_tg_freq_put()
438 tg_freq_item = &peb2466->ch[0].tg2_freq_item; in peb2466_tg_freq_put()
443 tg_freq_item = &peb2466->ch[1].tg1_freq_item; in peb2466_tg_freq_put()
448 tg_freq_item = &peb2466->ch[1].tg2_freq_item; in peb2466_tg_freq_put()
453 tg_freq_item = &peb2466->ch[2].tg1_freq_item; in peb2466_tg_freq_put()
458 tg_freq_item = &peb2466->ch[2].tg2_freq_item; in peb2466_tg_freq_put()
463 tg_freq_item = &peb2466->ch[3].tg1_freq_item; in peb2466_tg_freq_put()
468 tg_freq_item = &peb2466->ch[3].tg2_freq_item; in peb2466_tg_freq_put()
473 return -EINVAL; in peb2466_tg_freq_put()
480 ret = regmap_update_bits(peb2466->regmap, cr1_reg, cr1_mask, 0); in peb2466_tg_freq_put()
484 ret = peb2466_write_buf(peb2466, e->reg, peb2466_tone_lookup[index], 4); in peb2466_tg_freq_put()
487 ret = regmap_update_bits(peb2466->regmap, cr1_reg, cr1_mask, cr1_mask); in peb2466_tg_freq_put()
522 SOC_SINGLE("DAC0 -6dB Playback Switch", PEB2466_CR3(0), 2, 1, 0),
523 SOC_SINGLE("DAC1 -6dB Playback Switch", PEB2466_CR3(1), 2, 1, 0),
524 SOC_SINGLE("DAC2 -6dB Playback Switch", PEB2466_CR3(2), 2, 1, 0),
525 SOC_SINGLE("DAC3 -6dB Playback Switch", PEB2466_CR3(3), 2, 1, 0),
554 SND_SOC_DAPM_SUPPLY("CH0 PWR", PEB2466_CR1(0), 0, 0, NULL, 0),
555 SND_SOC_DAPM_SUPPLY("CH1 PWR", PEB2466_CR1(1), 0, 0, NULL, 0),
556 SND_SOC_DAPM_SUPPLY("CH2 PWR", PEB2466_CR1(2), 0, 0, NULL, 0),
557 SND_SOC_DAPM_SUPPLY("CH3 PWR", PEB2466_CR1(3), 0, 0, NULL, 0),
609 { "CH0 DIN", NULL, "CH0 PWR" },
610 { "CH1 DIN", NULL, "CH1 PWR" },
611 { "CH2 DIN", NULL, "CH2 PWR" },
612 { "CH3 DIN", NULL, "CH3 PWR" },
614 { "CH0 TG1", NULL, "CH0 PWR" },
615 { "CH1 TG1", NULL, "CH1 PWR" },
616 { "CH2 TG1", NULL, "CH2 PWR" },
617 { "CH3 TG1", NULL, "CH3 PWR" },
619 { "CH0 TG2", NULL, "CH0 PWR" },
620 { "CH1 TG2", NULL, "CH1 PWR" },
621 { "CH2 TG2", NULL, "CH2 PWR" },
622 { "CH3 TG2", NULL, "CH3 PWR" },
659 { "ADC0", NULL, "CH0 PWR" },
660 { "ADC1", NULL, "CH1 PWR" },
661 { "ADC2", NULL, "CH2 PWR" },
662 { "ADC3", NULL, "CH3 PWR" },
668 struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component); in peb2466_dai_set_tdm_slot()
676 /* Not set -> default 8 */ in peb2466_dai_set_tdm_slot()
680 dev_err(dai->dev, "tdm slot width %d not supported\n", width); in peb2466_dai_set_tdm_slot()
681 return -EINVAL; in peb2466_dai_set_tdm_slot()
689 ret = regmap_write(peb2466->regmap, PEB2466_CR5(chan), slot); in peb2466_dai_set_tdm_slot()
691 dev_err(dai->dev, "chan %d set tx tdm slot failed (%d)\n", in peb2466_dai_set_tdm_slot()
701 dev_err(dai->dev, "too much tx slots defined (mask = 0x%x) support max %d\n", in peb2466_dai_set_tdm_slot()
703 return -EINVAL; in peb2466_dai_set_tdm_slot()
705 peb2466->max_chan_playback = chan; in peb2466_dai_set_tdm_slot()
712 ret = regmap_write(peb2466->regmap, PEB2466_CR4(chan), slot); in peb2466_dai_set_tdm_slot()
714 dev_err(dai->dev, "chan %d set rx tdm slot failed (%d)\n", in peb2466_dai_set_tdm_slot()
724 dev_err(dai->dev, "too much rx slots defined (mask = 0x%x) support max %d\n", in peb2466_dai_set_tdm_slot()
726 return -EINVAL; in peb2466_dai_set_tdm_slot()
728 peb2466->max_chan_capture = chan; in peb2466_dai_set_tdm_slot()
735 struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component); in peb2466_dai_set_fmt()
746 dev_err(dai->dev, "Unsupported format 0x%x\n", in peb2466_dai_set_fmt()
748 return -EINVAL; in peb2466_dai_set_fmt()
750 return regmap_write(peb2466->regmap, PEB2466_XR6, xr6); in peb2466_dai_set_fmt()
757 struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component); in peb2466_dai_hw_params()
770 dev_err(&peb2466->spi->dev, "Unsupported format 0x%x\n", in peb2466_dai_hw_params()
772 return -EINVAL; in peb2466_dai_hw_params()
776 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR1(ch), in peb2466_dai_hw_params()
795 struct peb2466 *peb2466 = snd_soc_component_get_drvdata(dai->component); in peb2466_dai_startup()
799 max_ch = (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) ? in peb2466_dai_startup()
800 peb2466->max_chan_playback : peb2466->max_chan_capture; in peb2466_dai_startup()
806 ret = snd_pcm_hw_constraint_minmax(substream->runtime, in peb2466_dai_startup()
812 return snd_pcm_hw_constraint_list(substream->runtime, 0, in peb2466_dai_startup()
853 { .reg = PEB2466_XR6, .def = 0x00 }, in peb2466_reset_audio()
855 { .reg = PEB2466_CR5(0), .def = 0x00 }, in peb2466_reset_audio()
856 { .reg = PEB2466_CR4(0), .def = 0x00 }, in peb2466_reset_audio()
857 { .reg = PEB2466_CR3(0), .def = 0x00 }, in peb2466_reset_audio()
858 { .reg = PEB2466_CR2(0), .def = 0x00 }, in peb2466_reset_audio()
859 { .reg = PEB2466_CR1(0), .def = 0x00 }, in peb2466_reset_audio()
860 { .reg = PEB2466_CR0(0), .def = PEB2466_CR0_IMR1 }, in peb2466_reset_audio()
862 { .reg = PEB2466_CR5(1), .def = 0x00 }, in peb2466_reset_audio()
863 { .reg = PEB2466_CR4(1), .def = 0x00 }, in peb2466_reset_audio()
864 { .reg = PEB2466_CR3(1), .def = 0x00 }, in peb2466_reset_audio()
865 { .reg = PEB2466_CR2(1), .def = 0x00 }, in peb2466_reset_audio()
866 { .reg = PEB2466_CR1(1), .def = 0x00 }, in peb2466_reset_audio()
867 { .reg = PEB2466_CR0(1), .def = PEB2466_CR0_IMR1 }, in peb2466_reset_audio()
869 { .reg = PEB2466_CR5(2), .def = 0x00 }, in peb2466_reset_audio()
870 { .reg = PEB2466_CR4(2), .def = 0x00 }, in peb2466_reset_audio()
871 { .reg = PEB2466_CR3(2), .def = 0x00 }, in peb2466_reset_audio()
872 { .reg = PEB2466_CR2(2), .def = 0x00 }, in peb2466_reset_audio()
873 { .reg = PEB2466_CR1(2), .def = 0x00 }, in peb2466_reset_audio()
874 { .reg = PEB2466_CR0(2), .def = PEB2466_CR0_IMR1 }, in peb2466_reset_audio()
876 { .reg = PEB2466_CR5(3), .def = 0x00 }, in peb2466_reset_audio()
877 { .reg = PEB2466_CR4(3), .def = 0x00 }, in peb2466_reset_audio()
878 { .reg = PEB2466_CR3(3), .def = 0x00 }, in peb2466_reset_audio()
879 { .reg = PEB2466_CR2(3), .def = 0x00 }, in peb2466_reset_audio()
880 { .reg = PEB2466_CR1(3), .def = 0x00 }, in peb2466_reset_audio()
881 { .reg = PEB2466_CR0(3), .def = PEB2466_CR0_IMR1 }, in peb2466_reset_audio()
889 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) { in peb2466_reset_audio()
890 peb2466->ch[i].tg1_freq_item = PEB2466_TONE_1000HZ; in peb2466_reset_audio()
891 peb2466->ch[i].tg2_freq_item = PEB2466_TONE_1000HZ; in peb2466_reset_audio()
931 return regmap_multi_reg_write(peb2466->regmap, reg_reset, ARRAY_SIZE(reg_reset)); in peb2466_reset_audio()
942 dev_info(component->dev, "fw TH filter: mask %x, %*phN\n", *data, in peb2466_fw_parse_thfilter()
943 lng - 1, data + 1); in peb2466_fw_parse_thfilter()
947 * - @0 1 byte: Chan mask (bit set means related channel is concerned) in peb2466_fw_parse_thfilter()
948 * - @1 8 bytes: TH-Filter coefficients part1 in peb2466_fw_parse_thfilter()
949 * - @9 8 bytes: TH-Filter coefficients part2 in peb2466_fw_parse_thfilter()
950 * - @17 8 bytes: TH-Filter coefficients part3 in peb2466_fw_parse_thfilter()
953 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) { in peb2466_fw_parse_thfilter()
957 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_thfilter()
974 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_thfilter()
991 dev_info(component->dev, "fw IM/R1 filter: mask %x, %*phN\n", *data, in peb2466_fw_parse_imr1filter()
992 lng - 1, data + 1); in peb2466_fw_parse_imr1filter()
996 * - @0 1 byte: Chan mask (bit set means related channel is concerned) in peb2466_fw_parse_imr1filter()
997 * - @1 8 bytes: IM/R1-Filter coefficients part1 in peb2466_fw_parse_imr1filter()
998 * - @9 8 bytes: IM/R1-Filter coefficients part2 in peb2466_fw_parse_imr1filter()
1001 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) { in peb2466_fw_parse_imr1filter()
1005 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_imr1filter()
1018 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_imr1filter()
1034 dev_info(component->dev, "fw FRX filter: mask %x, %*phN\n", *data, in peb2466_fw_parse_frxfilter()
1035 lng - 1, data + 1); in peb2466_fw_parse_frxfilter()
1039 * - @0 1 byte: Chan mask (bit set means related channel is concerned) in peb2466_fw_parse_frxfilter()
1040 * - @1 8 bytes: FRX-Filter coefficients in peb2466_fw_parse_frxfilter()
1043 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) { in peb2466_fw_parse_frxfilter()
1047 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_frxfilter()
1056 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_frxfilter()
1072 dev_info(component->dev, "fw FRR filter: mask %x, %*phN\n", *data, in peb2466_fw_parse_frrfilter()
1073 lng - 1, data + 1); in peb2466_fw_parse_frrfilter()
1077 * - @0 1 byte: Chan mask (bit set means related channel is concerned) in peb2466_fw_parse_frrfilter()
1078 * - @1 8 bytes: FRR-Filter coefficients in peb2466_fw_parse_frrfilter()
1081 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) { in peb2466_fw_parse_frrfilter()
1085 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_frrfilter()
1094 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_frrfilter()
1110 dev_info(component->dev, "fw AX filter: mask %x, %*phN\n", *data, in peb2466_fw_parse_axfilter()
1111 lng - 1, data + 1); in peb2466_fw_parse_axfilter()
1115 * - @0 1 byte: Chan mask (bit set means related channel is concerned) in peb2466_fw_parse_axfilter()
1116 * - @1 4 bytes: AX-Filter coefficients in peb2466_fw_parse_axfilter()
1119 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) { in peb2466_fw_parse_axfilter()
1123 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_axfilter()
1132 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_axfilter()
1148 dev_info(component->dev, "fw AR filter: mask %x, %*phN\n", *data, in peb2466_fw_parse_arfilter()
1149 lng - 1, data + 1); in peb2466_fw_parse_arfilter()
1153 * - @0 1 byte: Chan mask (bit set means related channel is concerned) in peb2466_fw_parse_arfilter()
1154 * - @1 4 bytes: AR-Filter coefficients in peb2466_fw_parse_arfilter()
1157 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) { in peb2466_fw_parse_arfilter()
1161 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_arfilter()
1170 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_arfilter()
1202 * - @0 1 byte: Chan mask (bit set means related channel is concerned) in peb2466_fw_parse_axtable()
1203 * - @1 32bits signed: Min table value in centi dB (MinVal) in peb2466_fw_parse_axtable()
1204 * ie -300 means -3.0 dB in peb2466_fw_parse_axtable()
1205 * - @5 32bits signed: Step from on item to other item in centi dB (Step) in peb2466_fw_parse_axtable()
1207 * - @9 32bits unsigned: Item index in the table to use for the initial in peb2466_fw_parse_axtable()
1209 * - @13 N*4 bytes: Table composed of 4 bytes items. in peb2466_fw_parse_axtable()
1213 * dB is: Raw value at index i <-> (MinVal + i * Step) in centi dB. in peb2466_fw_parse_axtable()
1217 if (lng < 13 || ((lng - 13) % 4)) { in peb2466_fw_parse_axtable()
1218 dev_err(component->dev, "fw AX table lng %u invalid\n", lng); in peb2466_fw_parse_axtable()
1219 return -EINVAL; in peb2466_fw_parse_axtable()
1221 table_size = lng - 13; in peb2466_fw_parse_axtable()
1227 dev_err(component->dev, "fw AX table index %u out of table[%u]\n", in peb2466_fw_parse_axtable()
1229 return -EINVAL; in peb2466_fw_parse_axtable()
1232 dev_info(component->dev, in peb2466_fw_parse_axtable()
1238 table = devm_kzalloc(&peb2466->spi->dev, table_size, GFP_KERNEL); in peb2466_fw_parse_axtable()
1240 return -ENOMEM; in peb2466_fw_parse_axtable()
1244 BUILD_BUG_ON(ARRAY_SIZE(peb2466_ax_ctrl_names) != ARRAY_SIZE(peb2466->ch)); in peb2466_fw_parse_axtable()
1245 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) { in peb2466_fw_parse_axtable()
1249 lookup = &peb2466->ch[i].ax_lookup; in peb2466_fw_parse_axtable()
1250 lookup->table = table; in peb2466_fw_parse_axtable()
1251 lookup->count = table_size / 4; in peb2466_fw_parse_axtable()
1253 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_axtable()
1259 lookup->table[init_index], 4); in peb2466_fw_parse_axtable()
1263 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_axtable()
1268 lkup_ctrl = &peb2466->ch[i].ax_lkup_ctrl; in peb2466_fw_parse_axtable()
1269 lkup_ctrl->lookup = lookup; in peb2466_fw_parse_axtable()
1270 lkup_ctrl->reg = PEB2466_AX_FILTER(i); in peb2466_fw_parse_axtable()
1271 lkup_ctrl->index = init_index; in peb2466_fw_parse_axtable()
1306 * - @0 1 byte: Chan mask (bit set means related channel is concerned) in peb2466_fw_parse_artable()
1307 * - @1 32bits signed: Min table value in centi dB (MinVal) in peb2466_fw_parse_artable()
1308 * ie -300 means -3.0 dB in peb2466_fw_parse_artable()
1309 * - @5 32bits signed: Step from on item to other item in centi dB (Step) in peb2466_fw_parse_artable()
1311 * - @9 32bits unsigned: Item index in the table to use for the initial in peb2466_fw_parse_artable()
1313 * - @13 N*4 bytes: Table composed of 4 bytes items. in peb2466_fw_parse_artable()
1317 * dB is: Raw value at index i <-> (MinVal + i * Step) in centi dB. in peb2466_fw_parse_artable()
1321 if (lng < 13 || ((lng - 13) % 4)) { in peb2466_fw_parse_artable()
1322 dev_err(component->dev, "fw AR table lng %u invalid\n", lng); in peb2466_fw_parse_artable()
1323 return -EINVAL; in peb2466_fw_parse_artable()
1325 table_size = lng - 13; in peb2466_fw_parse_artable()
1331 dev_err(component->dev, "fw AR table index %u out of table[%u]\n", in peb2466_fw_parse_artable()
1333 return -EINVAL; in peb2466_fw_parse_artable()
1336 dev_info(component->dev, in peb2466_fw_parse_artable()
1342 table = devm_kzalloc(&peb2466->spi->dev, table_size, GFP_KERNEL); in peb2466_fw_parse_artable()
1344 return -ENOMEM; in peb2466_fw_parse_artable()
1348 BUILD_BUG_ON(ARRAY_SIZE(peb2466_ar_ctrl_names) != ARRAY_SIZE(peb2466->ch)); in peb2466_fw_parse_artable()
1349 for (i = 0; i < ARRAY_SIZE(peb2466->ch); i++) { in peb2466_fw_parse_artable()
1353 lookup = &peb2466->ch[i].ar_lookup; in peb2466_fw_parse_artable()
1354 lookup->table = table; in peb2466_fw_parse_artable()
1355 lookup->count = table_size / 4; in peb2466_fw_parse_artable()
1357 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_artable()
1363 lookup->table[init_index], 4); in peb2466_fw_parse_artable()
1367 ret = regmap_update_bits(peb2466->regmap, PEB2466_CR0(i), in peb2466_fw_parse_artable()
1372 lkup_ctrl = &peb2466->ch[i].ar_lkup_ctrl; in peb2466_fw_parse_artable()
1373 lkup_ctrl->lookup = lookup; in peb2466_fw_parse_artable()
1374 lkup_ctrl->reg = PEB2466_AR_FILTER(i); in peb2466_fw_parse_artable()
1375 lkup_ctrl->index = init_index; in peb2466_fw_parse_artable()
1451 * big-endian values). in peb2466_fw_parse()
1472 dev_err(component->dev, "fw size %zu, exp at least 4\n", left); in peb2466_fw_parse()
1473 return -EINVAL; in peb2466_fw_parse()
1479 dev_err(component->dev, "fw magic 0x%04x exp 0x2466\n", val16); in peb2466_fw_parse()
1480 return -EINVAL; in peb2466_fw_parse()
1483 left -= 2; in peb2466_fw_parse()
1488 dev_err(component->dev, "fw magic 0x%04x exp 0x0100\n", val16); in peb2466_fw_parse()
1489 return -EINVAL; in peb2466_fw_parse()
1492 left -= 2; in peb2466_fw_parse()
1496 dev_err(component->dev, "fw %td/%zu left %zu, exp at least 6\n", in peb2466_fw_parse()
1497 buf - data, size, left); in peb2466_fw_parse()
1498 return -EINVAL; in peb2466_fw_parse()
1505 dev_err(component->dev, "fw %td/%zu tag 0x%04x unknown\n", in peb2466_fw_parse()
1506 buf - data, size, tag); in peb2466_fw_parse()
1507 return -EINVAL; in peb2466_fw_parse()
1509 if (lng < tag_def->lng_min || lng > tag_def->lng_max) { in peb2466_fw_parse()
1510 dev_err(component->dev, "fw %td/%zu tag 0x%04x lng %u, exp [%u;%u]\n", in peb2466_fw_parse()
1511 buf - data, size, tag, lng, tag_def->lng_min, tag_def->lng_max); in peb2466_fw_parse()
1512 return -EINVAL; in peb2466_fw_parse()
1515 left -= 6; in peb2466_fw_parse()
1517 dev_err(component->dev, "fw %td/%zu tag 0x%04x lng %u, left %zu\n", in peb2466_fw_parse()
1518 buf - data, size, tag, lng, left); in peb2466_fw_parse()
1519 return -EINVAL; in peb2466_fw_parse()
1522 /* TLV block is valid -> parse the data part */ in peb2466_fw_parse()
1523 ret = tag_def->parse(component, tag, lng, buf); in peb2466_fw_parse()
1525 dev_err(component->dev, "fw %td/%zu tag 0x%04x lng %u parse failed\n", in peb2466_fw_parse()
1526 buf - data, size, tag, lng); in peb2466_fw_parse()
1531 left -= lng; in peb2466_fw_parse()
1541 ret = request_firmware(&fw, fw_name, component->dev); in peb2466_load_coeffs()
1545 ret = peb2466_fw_parse(component, fw->data, fw->size); in peb2466_load_coeffs()
1562 ret = of_property_read_string(peb2466->spi->dev.of_node, in peb2466_component_probe()
1563 "firmware-name", &firmware_name); in peb2466_component_probe()
1565 return (ret == -EINVAL) ? 0 : ret; in peb2466_component_probe()
1633 *mask = (1 << (offset - 16)); in peb2466_chip_gpio_offset_to_data_regmask()
1639 *mask = (1 << (offset - 24 + 4)); in peb2466_chip_gpio_offset_to_data_regmask()
1642 return -EINVAL; in peb2466_chip_gpio_offset_to_data_regmask()
1651 return -EINVAL; in peb2466_chip_gpio_offset_to_dir_regmask()
1655 *mask = (1 << (offset - 16)); in peb2466_chip_gpio_offset_to_dir_regmask()
1660 *mask = (1 << (offset - 24)); in peb2466_chip_gpio_offset_to_dir_regmask()
1663 return -EINVAL; in peb2466_chip_gpio_offset_to_dir_regmask()
1673 cache = &peb2466->gpio.cache.xr0; in peb2466_chip_gpio_get_cache()
1676 cache = &peb2466->gpio.cache.xr1; in peb2466_chip_gpio_get_cache()
1679 cache = &peb2466->gpio.cache.xr2; in peb2466_chip_gpio_get_cache()
1682 cache = &peb2466->gpio.cache.xr3; in peb2466_chip_gpio_get_cache()
1705 mutex_lock(&peb2466->gpio.lock); in peb2466_chip_gpio_update_bits()
1709 ret = -EINVAL; in peb2466_chip_gpio_update_bits()
1717 ret = regmap_write(peb2466->regmap, xr_reg, tmp); in peb2466_chip_gpio_update_bits()
1725 mutex_unlock(&peb2466->gpio.lock); in peb2466_chip_gpio_update_bits()
1741 dev_warn(&peb2466->spi->dev, "cannot set gpio %d (read-only)\n", in peb2466_chip_gpio_set()
1748 dev_err(&peb2466->spi->dev, "cannot set gpio %d (%d)\n", in peb2466_chip_gpio_set()
1755 dev_err(&peb2466->spi->dev, "set gpio %d (0x%x, 0x%x) failed (%d)\n", in peb2466_chip_gpio_set()
1781 dev_err(&peb2466->spi->dev, "cannot get gpio %d (%d)\n", in peb2466_chip_gpio_get()
1783 return -EINVAL; in peb2466_chip_gpio_get()
1789 return -EINVAL; in peb2466_chip_gpio_get()
1792 ret = regmap_read(peb2466->regmap, xr_reg, &val); in peb2466_chip_gpio_get()
1794 dev_err(&peb2466->spi->dev, "get gpio %d (0x%x, 0x%x) failed (%d)\n", in peb2466_chip_gpio_get()
1822 dev_err(&peb2466->spi->dev, "cannot get gpio %d direction (%d)\n", in peb2466_chip_get_direction()
1827 ret = regmap_read(peb2466->regmap, xr_reg, &val); in peb2466_chip_get_direction()
1829 dev_err(&peb2466->spi->dev, "get dir gpio %d (0x%x, 0x%x) failed (%d)\n", in peb2466_chip_get_direction()
1850 return -EINVAL; in peb2466_chip_direction_input()
1855 dev_err(&peb2466->spi->dev, "cannot set gpio %d direction (%d)\n", in peb2466_chip_direction_input()
1862 dev_err(&peb2466->spi->dev, "Set dir in gpio %d (0x%x, 0x%x) failed (%d)\n", in peb2466_chip_direction_input()
1879 return -EINVAL; in peb2466_chip_direction_output()
1891 dev_err(&peb2466->spi->dev, "cannot set gpio %d direction (%d)\n", in peb2466_chip_direction_output()
1898 dev_err(&peb2466->spi->dev, "Set dir in gpio %d (0x%x, 0x%x) failed (%d)\n", in peb2466_chip_direction_output()
1910 { .reg = PEB2466_XR0, .def = 0 }, in peb2466_reset_gpio()
1911 { .reg = PEB2466_XR1, .def = 0 }, in peb2466_reset_gpio()
1912 { .reg = PEB2466_XR2, .def = 0 }, in peb2466_reset_gpio()
1913 { .reg = PEB2466_XR3, .def = 0 }, in peb2466_reset_gpio()
1916 peb2466->gpio.cache.xr0 = 0; in peb2466_reset_gpio()
1917 peb2466->gpio.cache.xr1 = 0; in peb2466_reset_gpio()
1918 peb2466->gpio.cache.xr2 = 0; in peb2466_reset_gpio()
1919 peb2466->gpio.cache.xr3 = 0; in peb2466_reset_gpio()
1921 return regmap_multi_reg_write(peb2466->regmap, reg_reset, ARRAY_SIZE(reg_reset)); in peb2466_reset_gpio()
1928 mutex_init(&peb2466->gpio.lock); in peb2466_gpio_init()
1934 peb2466->gpio.gpio_chip.owner = THIS_MODULE; in peb2466_gpio_init()
1935 peb2466->gpio.gpio_chip.label = dev_name(&peb2466->spi->dev); in peb2466_gpio_init()
1936 peb2466->gpio.gpio_chip.parent = &peb2466->spi->dev; in peb2466_gpio_init()
1937 peb2466->gpio.gpio_chip.base = -1; in peb2466_gpio_init()
1938 peb2466->gpio.gpio_chip.ngpio = 28; in peb2466_gpio_init()
1939 peb2466->gpio.gpio_chip.get_direction = peb2466_chip_get_direction; in peb2466_gpio_init()
1940 peb2466->gpio.gpio_chip.direction_input = peb2466_chip_direction_input; in peb2466_gpio_init()
1941 peb2466->gpio.gpio_chip.direction_output = peb2466_chip_direction_output; in peb2466_gpio_init()
1942 peb2466->gpio.gpio_chip.get = peb2466_chip_gpio_get; in peb2466_gpio_init()
1943 peb2466->gpio.gpio_chip.set = peb2466_chip_gpio_set; in peb2466_gpio_init()
1944 peb2466->gpio.gpio_chip.can_sleep = true; in peb2466_gpio_init()
1946 return devm_gpiochip_add_data(&peb2466->spi->dev, &peb2466->gpio.gpio_chip, in peb2466_gpio_init()
1957 spi->bits_per_word = 8; in peb2466_spi_probe()
1962 peb2466 = devm_kzalloc(&spi->dev, sizeof(*peb2466), GFP_KERNEL); in peb2466_spi_probe()
1964 return -ENOMEM; in peb2466_spi_probe()
1966 peb2466->spi = spi; in peb2466_spi_probe()
1968 peb2466->regmap = devm_regmap_init(&peb2466->spi->dev, NULL, peb2466, in peb2466_spi_probe()
1970 if (IS_ERR(peb2466->regmap)) in peb2466_spi_probe()
1971 return PTR_ERR(peb2466->regmap); in peb2466_spi_probe()
1973 peb2466->reset_gpio = devm_gpiod_get_optional(&peb2466->spi->dev, in peb2466_spi_probe()
1975 if (IS_ERR(peb2466->reset_gpio)) in peb2466_spi_probe()
1976 return PTR_ERR(peb2466->reset_gpio); in peb2466_spi_probe()
1978 peb2466->mclk = devm_clk_get_enabled(&peb2466->spi->dev, "mclk"); in peb2466_spi_probe()
1979 if (IS_ERR(peb2466->mclk)) in peb2466_spi_probe()
1980 return PTR_ERR(peb2466->mclk); in peb2466_spi_probe()
1982 if (peb2466->reset_gpio) { in peb2466_spi_probe()
1983 gpiod_set_value_cansleep(peb2466->reset_gpio, 1); in peb2466_spi_probe()
1985 gpiod_set_value_cansleep(peb2466->reset_gpio, 0); in peb2466_spi_probe()
1991 mclk_rate = clk_get_rate(peb2466->mclk); in peb2466_spi_probe()
2006 dev_err(&peb2466->spi->dev, "Unsupported clock rate %lu\n", in peb2466_spi_probe()
2008 ret = -EINVAL; in peb2466_spi_probe()
2011 ret = regmap_write(peb2466->regmap, PEB2466_XR5, xr5); in peb2466_spi_probe()
2013 dev_err(&peb2466->spi->dev, "Setting MCLK failed (%d)\n", ret); in peb2466_spi_probe()
2017 ret = devm_snd_soc_register_component(&spi->dev, &peb2466_component_driver, in peb2466_spi_probe()