Lines Matching +full:asrc +full:- +full:clk +full:- +full:map
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Author: Lars-Peter Clausen <[email protected]>
9 #include <linux/clk.h>
25 #include "adau-utils.h"
37 struct clk *mclk;
126 static const DECLARE_TLV_DB_MINMAX(adau1372_digital_tlv, -9563, 0);
127 static const DECLARE_TLV_DB_SCALE(adau1372_pga_tlv, -1200, 75, 0);
190 SOC_ENUM("ADC 0+1 High-Pass-Filter", adau1372_hpf0_1_enum),
191 SOC_ENUM("ADC 2+3 High-Pass-Filter", adau1372_hpf2_3_enum),
340 SOC_DAPM_ENUM("Input ASRC Playback Mux", adau1372_asrci_mux_enum);
434 SND_SOC_DAPM_SUPPLY("Output ASRC Supply", ADAU1372_REG_ASRC_MODE, 1, 0, NULL, 0),
435 SND_SOC_DAPM_SUPPLY("Input ASRC Supply", ADAU1372_REG_ASRC_MODE, 0, 0, NULL, 0),
477 { "Output ASRC" #x " Mux", "Decimator0", "Decimator0 Mux" }, \
478 { "Output ASRC" #x " Mux", "Decimator1", "Decimator1 Mux" }, \
479 { "Output ASRC" #x " Mux", "Decimator2", "Decimator2 Mux" }, \
480 { "Output ASRC" #x " Mux", "Decimator3", "Decimator3 Mux" }
508 { "Output ASRC0 Mux", NULL, "Output ASRC Supply" },
509 { "Output ASRC1 Mux", NULL, "Output ASRC Supply" },
510 { "Output ASRC2 Mux", NULL, "Output ASRC Supply" },
511 { "Output ASRC3 Mux", NULL, "Output ASRC Supply" },
548 { "Input ASRC0 Mux", NULL, "Input ASRC Supply" },
549 { "Input ASRC1 Mux", NULL, "Input ASRC Supply" },
582 adau1372->clock_provider = true; in adau1372_set_dai_fmt()
586 adau1372->clock_provider = false; in adau1372_set_dai_fmt()
589 return -EINVAL; in adau1372_set_dai_fmt()
630 regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI0, ADAU1372_SAI0_DELAY_MASK, sai0); in adau1372_set_dai_fmt()
631 regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI1, in adau1372_set_dai_fmt()
653 return -EINVAL; in adau1372_hw_params()
657 slot_width = adau1372->slot_width; in adau1372_hw_params()
670 return -EINVAL; in adau1372_hw_params()
673 regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI0, ADAU1372_SAI0_FS_MASK, sai0); in adau1372_hw_params()
674 regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI1, ADAU1372_SAI1_BCLKRATE, sai1); in adau1372_hw_params()
688 regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI0, in adau1372_set_tdm_slot()
690 adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM2; in adau1372_set_tdm_slot()
691 adau1372->slot_width = 0; in adau1372_set_tdm_slot()
697 return -EINVAL; in adau1372_set_tdm_slot()
708 return -EINVAL; in adau1372_set_tdm_slot()
714 adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM2; in adau1372_set_tdm_slot()
718 if (adau1372->clock_provider) in adau1372_set_tdm_slot()
719 adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM4_MASTER; in adau1372_set_tdm_slot()
721 adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM4; in adau1372_set_tdm_slot()
725 adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM8; in adau1372_set_tdm_slot()
728 return -EINVAL; in adau1372_set_tdm_slot()
731 adau1372->slot_width = width; in adau1372_set_tdm_slot()
733 regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI0, ADAU1372_SAI0_SAI_MASK, sai0); in adau1372_set_tdm_slot()
734 regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI1, ADAU1372_SAI1_BCLK_TDMC, sai1); in adau1372_set_tdm_slot()
737 regmap_write(adau1372->regmap, ADAU1372_REG_SOUT_CTRL, ~tx_mask); in adau1372_set_tdm_slot()
752 return regmap_update_bits(adau1372->regmap, ADAU1372_REG_SAI1, ADAU1372_SAI1_TDM_TS, sai1); in adau1372_set_tristate()
759 snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_RATE, in adau1372_startup()
760 &adau1372->rate_constraints); in adau1372_startup()
770 regmap_update_bits(adau1372->regmap, ADAU1372_REG_CLK_CTRL, in adau1372_enable_pll()
775 ret = regmap_read(adau1372->regmap, ADAU1372_REG_PLL(5), &val); in adau1372_enable_pll()
782 dev_err(adau1372->dev, "Failed to lock PLL\n"); in adau1372_enable_pll()
787 if (adau1372->enabled == enable) in adau1372_set_power()
793 clk_prepare_enable(adau1372->mclk); in adau1372_set_power()
794 if (adau1372->pd_gpio) in adau1372_set_power()
795 gpiod_set_value(adau1372->pd_gpio, 0); in adau1372_set_power()
797 if (adau1372->switch_mode) in adau1372_set_power()
798 adau1372->switch_mode(adau1372->dev); in adau1372_set_power()
800 regcache_cache_only(adau1372->regmap, false); in adau1372_set_power()
806 if (adau1372->use_pll) { in adau1372_set_power()
811 regmap_update_bits(adau1372->regmap, ADAU1372_REG_CLK_CTRL, in adau1372_set_power()
813 regcache_sync(adau1372->regmap); in adau1372_set_power()
815 if (adau1372->pd_gpio) { in adau1372_set_power()
818 * map. No need to do any register writes to manually in adau1372_set_power()
821 gpiod_set_value(adau1372->pd_gpio, 1); in adau1372_set_power()
822 regcache_mark_dirty(adau1372->regmap); in adau1372_set_power()
824 regmap_update_bits(adau1372->regmap, ADAU1372_REG_CLK_CTRL, in adau1372_set_power()
827 clk_disable_unprepare(adau1372->mclk); in adau1372_set_power()
828 regcache_cache_only(adau1372->regmap, true); in adau1372_set_power()
831 adau1372->enabled = enable; in adau1372_set_power()
911 regmap_write(adau1372->regmap, ADAU1372_REG_PLL(i), regs[i]); in adau1372_setup_pll()
929 return -ENOMEM; in adau1372_probe()
931 adau1372->mclk = devm_clk_get(dev, "mclk"); in adau1372_probe()
932 if (IS_ERR(adau1372->mclk)) in adau1372_probe()
933 return PTR_ERR(adau1372->mclk); in adau1372_probe()
935 adau1372->pd_gpio = devm_gpiod_get_optional(dev, "powerdown", GPIOD_OUT_HIGH); in adau1372_probe()
936 if (IS_ERR(adau1372->pd_gpio)) in adau1372_probe()
937 return PTR_ERR(adau1372->pd_gpio); in adau1372_probe()
939 adau1372->regmap = regmap; in adau1372_probe()
940 adau1372->switch_mode = switch_mode; in adau1372_probe()
941 adau1372->dev = dev; in adau1372_probe()
942 adau1372->rate_constraints.list = adau1372_rates; in adau1372_probe()
943 adau1372->rate_constraints.count = ARRAY_SIZE(adau1372_rates); in adau1372_probe()
944 adau1372->rate_constraints.mask = ADAU1372_RATE_MASK_TDM2; in adau1372_probe()
953 rate = clk_get_rate(adau1372->mclk); in adau1372_probe()
967 adau1372->use_pll = true; in adau1372_probe()
980 * No pinctrl support yet, put the multi-purpose pins in the most in adau1372_probe()
1072 MODULE_AUTHOR("Lars-Peter Clausen <[email protected]>");