1 // SPDX-License-Identifier: GPL-2.0-or-later
37 #define FLOAT_ZERO	0x00000000
38 #define FLOAT_ONE	0x3f800000
39 #define FLOAT_TWO	0x40000000
40 #define FLOAT_THREE     0x40400000
41 #define FLOAT_FIVE	0x40a00000
42 #define FLOAT_SIX       0x40c00000
43 #define FLOAT_EIGHT     0x41000000
44 #define FLOAT_MINUS_5	0xc0a00000
46 #define UNSOL_TAG_DSP	0x16
55 #define MASTERCONTROL				0x80
59 #define WIDGET_CHIP_CTRL      0x15
60 #define WIDGET_DSP_CTRL       0x16
70 #define SCP_SET    0
74 #define DESKTOP_EFX_FILE   "ctefx-desktop.bin"
75 #define R3DI_EFX_FILE  "ctefx-r3di.bin"
107 #define VNODE_START_NID    0x80
115 #define VNODES_COUNT  (VNODE_END_NID - VNODE_START_NID)
117 #define EFFECT_START_NID    0x90
126 #define OUT_EFFECTS_COUNT  (OUT_EFFECT_END_NID - OUT_EFFECT_START_NID)
134 #define IN_EFFECTS_COUNT  (IN_EFFECT_END_NID - IN_EFFECT_START_NID)
154 #define EFFECTS_COUNT  (EFFECT_END_NID - EFFECT_START_NID)
163  * X-bass.
170 #define DSP_CAPTURE_INIT_LATENCY        0
181 	int direct; /* 0:output; 1:input*/
182 	int params; /* number of default non-on/off params */
187 #define EFX_DIR_OUT 0
193 	  .mid = 0x96,
194 	  .reqs = {0, 1},
197 	  .def_vals = {0x3F800000, 0x3F2B851F}
201 	  .mid = 0x96,
205 	  .def_vals = {0x3F800000, 0x3F266666}
209 	  .mid = 0x96,
213 	  .def_vals = {0x00000000, 0x3F000000}
217 	  .mid = 0x96,
221 	  .def_vals = {0x3F800000, 0x3F3D70A4, 0x00000000}
223 	{ .name = "X-Bass",
225 	  .mid = 0x96,
229 	  .def_vals = {0x3F800000, 0x42A00000, 0x3F000000}
233 	  .mid = 0x96,
238 	  .def_vals = {0x00000000, 0x00000000, 0x00000000, 0x00000000,
239 		       0x00000000, 0x00000000, 0x00000000, 0x00000000,
240 		       0x00000000, 0x00000000, 0x00000000, 0x00000000}
244 	  .mid = 0x95,
245 	  .reqs = {0, 1, 2, 3},
248 	  .def_vals = {0x00000000, 0x3F3A9692, 0x00000000, 0x00000000}
252 	  .mid = 0x95,
256 	  .def_vals = {0x3F800000, 0x3D7DF3B6, 0x41F00000, 0x41F00000}
260 	  .mid = 0x95,
264 	  .def_vals = {0x00000000, 0x3F3D70A4}
268 	  .mid = 0x95,
272 	  .def_vals = {0x3F800000, 0x3F000000}
276 	  .mid = 0x95,
280 	  .def_vals = {0x00000000, 0x43C80000, 0x44AF0000, 0x44FA0000,
281 		       0x3F800000, 0x3F800000, 0x3F800000, 0x00000000,
282 		       0x00000000}
290 #define TUNING_CTL_START_NID  0xC0
304 #define TUNING_CTLS_COUNT  (TUNING_CTL_END_NID - TUNING_CTL_START_NID)
313 	int direct; /* 0:output; 1:input*/
321 	  .mid = 0x95,
324 	  .def_val = 0x41F00000
329 	  .mid = 0x95,
332 	  .def_val = 0x3F3D70A4
337 	  .mid = 0x96,
340 	  .def_val = 0x00000000
345 	  .mid = 0x96,
348 	  .def_val = 0x00000000
353 	  .mid = 0x96,
356 	  .def_val = 0x00000000
361 	  .mid = 0x96,
364 	  .def_val = 0x00000000
369 	  .mid = 0x96,
372 	  .def_val = 0x00000000
377 	  .mid = 0x96,
380 	  .def_val = 0x00000000
385 	  .mid = 0x96,
388 	  .def_val = 0x00000000
393 	  .mid = 0x96,
396 	  .def_val = 0x00000000
401 	  .mid = 0x96,
404 	  .def_val = 0x00000000
409 	  .mid = 0x96,
412 	  .def_val = 0x00000000
435 	.mid = 0x95,
441 	  .vals = { 0x00000000, 0x43C80000, 0x44AF0000,
442 		    0x44FA0000, 0x3F800000, 0x3F800000,
443 		    0x3F800000, 0x00000000, 0x00000000 }
446 	  .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
447 		    0x44FA0000, 0x3F19999A, 0x3F866666,
448 		    0x3F800000, 0x00000000, 0x00000000 }
451 	  .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
452 		    0x450AC000, 0x4017AE14, 0x3F6B851F,
453 		    0x3F800000, 0x00000000, 0x00000000 }
456 	  .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
457 		    0x44FA0000, 0x40400000, 0x3F28F5C3,
458 		    0x3F800000, 0x00000000, 0x00000000 }
461 	  .vals = { 0x3F800000, 0x44324000, 0x44BB8000,
462 		    0x44E10000, 0x3FB33333, 0x3FB9999A,
463 		    0x3F800000, 0x3E3A2E43, 0x00000000 }
466 	  .vals = { 0x3F800000, 0x43EA0000, 0x44A52000,
467 		    0x45098000, 0x3F266666, 0x3FC00000,
468 		    0x3F800000, 0x00000000, 0x00000000 }
471 	  .vals = { 0x3F800000, 0x43C70000, 0x44AE6000,
472 		    0x45193000, 0x3F8E147B, 0x3F75C28F,
473 		    0x3F800000, 0x00000000, 0x00000000 }
476 	  .vals = { 0x3F800000, 0x43930000, 0x44BEE000,
477 		    0x45007000, 0x3F451EB8, 0x3F7851EC,
478 		    0x3F800000, 0x00000000, 0x00000000 }
481 	  .vals = { 0x3F800000, 0x43BFC5AC, 0x44B28FDF,
482 		    0x451F6000, 0x3F266666, 0x3FA7D945,
483 		    0x3F800000, 0x3CF5C28F, 0x00000000 }
486 	  .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
487 		    0x44FA0000, 0x3FB2718B, 0x3F800000,
488 		    0xBC07010E, 0x00000000, 0x00000000 }
491 	  .vals = { 0x3F800000, 0x43C20000, 0x44906000,
492 		    0x44E70000, 0x3F4CCCCD, 0x3F8A3D71,
493 		    0x3F0A3D71, 0x00000000, 0x00000000 }
496 	  .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
497 		    0x44FA0000, 0x3F800000, 0x3F800000,
498 		    0x3E4CCCCD, 0x00000000, 0x00000000 }
501 	  .vals = { 0x3F800000, 0x43A9C5AC, 0x44AA4FDF,
502 		    0x44FFC000, 0x3EDBB56F, 0x3F99C4CA,
503 		    0x3F800000, 0x00000000, 0x00000000 }
506 	  .vals = { 0x3F800000, 0x43C80000, 0x44AF0000,
507 		    0x44FA0000, 0x3F800000, 0x3F1A043C,
508 		    0x3F800000, 0x00000000, 0x00000000 }
531 	.mid = 0x96,
538 	 .vals = { 0x00000000, 0x00000000, 0x00000000,
539 		   0x00000000, 0x00000000, 0x00000000,
540 		   0x00000000, 0x00000000, 0x00000000,
541 		   0x00000000, 0x00000000	     }
544 	 .vals = { 0x00000000, 0x00000000, 0x3F8CCCCD,
545 		   0x40000000, 0x00000000, 0x00000000,
546 		   0x00000000, 0x00000000, 0x40000000,
547 		   0x40000000, 0x40000000	     }
550 	 .vals = { 0x00000000, 0x00000000, 0x40C00000,
551 		   0x40C00000, 0x40466666, 0x00000000,
552 		   0x00000000, 0x00000000, 0x00000000,
553 		   0x40466666, 0x40466666	     }
556 	 .vals = { 0x00000000, 0xBF99999A, 0x00000000,
557 		   0x3FA66666, 0x3FA66666, 0x3F8CCCCD,
558 		   0x00000000, 0x00000000, 0x40000000,
559 		   0x40466666, 0x40800000	     }
562 	 .vals = { 0x00000000, 0xBF99999A, 0x40000000,
563 		   0x40466666, 0x40866666, 0xBF99999A,
564 		   0xBF99999A, 0x00000000, 0x00000000,
565 		   0x40800000, 0x40800000	     }
568 	 .vals = { 0x00000000, 0x00000000, 0x00000000,
569 		   0x3F8CCCCD, 0x40800000, 0x40800000,
570 		   0x40800000, 0x00000000, 0x3F8CCCCD,
571 		   0x40466666, 0x40466666	     }
574 	 .vals = { 0x00000000, 0x00000000, 0x40000000,
575 		   0x40000000, 0x00000000, 0x00000000,
576 		   0x00000000, 0x3F8CCCCD, 0x40000000,
577 		   0x40000000, 0x40000000	     }
580 	 .vals = { 0x00000000, 0xBFCCCCCD, 0x00000000,
581 		   0x40000000, 0x40000000, 0x00000000,
582 		   0xBF99999A, 0xBF99999A, 0x00000000,
583 		   0x40466666, 0x40C00000	     }
586 	 .vals = { 0x00000000, 0xBF99999A, 0xBF99999A,
587 		   0x3F8CCCCD, 0x40000000, 0xBF99999A,
588 		   0xBF99999A, 0x00000000, 0x00000000,
589 		   0x40800000, 0x40800000	     }
592 	 .vals = { 0x00000000, 0xC0000000, 0xBF99999A,
593 		   0xBF99999A, 0x00000000, 0x40466666,
594 		   0x40800000, 0x40466666, 0x00000000,
595 		   0x00000000, 0x3F8CCCCD	     }
600  * DSP reqs for handling full-range speakers/bass redirection. If a speaker is
604  * enabled. X-Bass must be disabled when using these.
607 	SPEAKER_BASS_REDIRECT            = 0x15,
608 	SPEAKER_BASS_REDIRECT_XOVER_FREQ = 0x16,
609 	/* Between 0x16-0x1a are the X-Bass reqs. */
610 	SPEAKER_FULL_RANGE_FRONT_L_R     = 0x1a,
611 	SPEAKER_FULL_RANGE_CENTER_LFE    = 0x1b,
612 	SPEAKER_FULL_RANGE_REAR_L_R      = 0x1c,
613 	SPEAKER_FULL_RANGE_SURROUND_L_R  = 0x1d,
614 	SPEAKER_BASS_REDIRECT_SUB_GAIN   = 0x1e,
619  * module ID 0x96, the output effects module.
625 	 * connect software, the QUERY_SPEAKER_EQ_ADDRESS req on mid 0x80 is
635 	SPEAKER_TUNING_USE_SPEAKER_EQ           = 0x1f,
636 	SPEAKER_TUNING_ENABLE_CENTER_EQ         = 0x20,
637 	SPEAKER_TUNING_FRONT_LEFT_VOL_LEVEL     = 0x21,
638 	SPEAKER_TUNING_FRONT_RIGHT_VOL_LEVEL    = 0x22,
639 	SPEAKER_TUNING_CENTER_VOL_LEVEL         = 0x23,
640 	SPEAKER_TUNING_LFE_VOL_LEVEL            = 0x24,
641 	SPEAKER_TUNING_REAR_LEFT_VOL_LEVEL      = 0x25,
642 	SPEAKER_TUNING_REAR_RIGHT_VOL_LEVEL     = 0x26,
643 	SPEAKER_TUNING_SURROUND_LEFT_VOL_LEVEL  = 0x27,
644 	SPEAKER_TUNING_SURROUND_RIGHT_VOL_LEVEL = 0x28,
649 	SPEAKER_TUNING_FRONT_LEFT_INVERT        = 0x29,
650 	SPEAKER_TUNING_FRONT_RIGHT_INVERT       = 0x2a,
651 	SPEAKER_TUNING_CENTER_INVERT            = 0x2b,
652 	SPEAKER_TUNING_LFE_INVERT               = 0x2c,
653 	SPEAKER_TUNING_REAR_LEFT_INVERT         = 0x2d,
654 	SPEAKER_TUNING_REAR_RIGHT_INVERT        = 0x2e,
655 	SPEAKER_TUNING_SURROUND_LEFT_INVERT     = 0x2f,
656 	SPEAKER_TUNING_SURROUND_RIGHT_INVERT    = 0x30,
658 	SPEAKER_TUNING_FRONT_LEFT_DELAY         = 0x31,
659 	SPEAKER_TUNING_FRONT_RIGHT_DELAY        = 0x32,
660 	SPEAKER_TUNING_CENTER_DELAY             = 0x33,
661 	SPEAKER_TUNING_LFE_DELAY                = 0x34,
662 	SPEAKER_TUNING_REAR_LEFT_DELAY          = 0x35,
663 	SPEAKER_TUNING_REAR_RIGHT_DELAY         = 0x36,
664 	SPEAKER_TUNING_SURROUND_LEFT_DELAY      = 0x37,
665 	SPEAKER_TUNING_SURROUND_RIGHT_DELAY     = 0x38,
667 	SPEAKER_TUNING_MAIN_VOLUME              = 0x39,
668 	SPEAKER_TUNING_MUTE                     = 0x3a,
709 #define DSP_VOL_OUT 0
720 	  .mid = 0x32,
724 	  .mid = 0x37,
738 	.group =  { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
739 	.target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
741 	.vals =   { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
743 		    { 0x3f, 0x3f, 0x00, 0x00, 0x00, 0x00 } },
747 	.group  = { 0x30, 0x30, 0x48, 0x48, 0x48, 0x30 },
748 	.target = { 0x2e, 0x30, 0x0d, 0x17, 0x19, 0x32 },
750 	.vals   = { { 0x00, 0x00, 0x40, 0x00, 0x00, 0x3f },
752 		    { 0x3f, 0x3f, 0x00, 0x00, 0x02, 0x00 } },
763 	{ .name = "Low (16-31",
764 	  .vals = { 0xff, 0x2c, 0xf5, 0x32 }
766 	{ .name = "Medium (32-149",
767 	  .vals = { 0x38, 0xa8, 0x3e, 0x4c }
769 	{ .name = "High (150-600",
770 	  .vals = { 0xff, 0xff, 0xff, 0x7f }
781 	  .val = 0xa0
784 	  .val = 0xc0
787 	  .val = 0x80
804 	{ .stream_id = 0x14,
805 	  .count     = 0x04,
806 	  .offset    = { 0x00, 0x04, 0x08, 0x0c },
807 	  .value     = { 0x0001f8c0, 0x0001f9c1, 0x0001fac6, 0x0001fbc7 },
809 	{ .stream_id = 0x0c,
810 	  .count     = 0x0c,
811 	  .offset    = { 0x00, 0x04, 0x08, 0x0c, 0x10, 0x14, 0x18, 0x1c,
812 			 0x20, 0x24, 0x28, 0x2c },
813 	  .value     = { 0x0001e0c0, 0x0001e1c1, 0x0001e4c2, 0x0001e5c3,
814 			 0x0001e2c4, 0x0001e3c5, 0x0001e8c6, 0x0001e9c7,
815 			 0x0001ecc8, 0x0001edc9, 0x0001eaca, 0x0001ebcb },
817 	{ .stream_id = 0x0c,
818 	  .count     = 0x08,
819 	  .offset    = { 0x08, 0x0c, 0x10, 0x14, 0x20, 0x24, 0x28, 0x2c },
820 	  .value     = { 0x000140c2, 0x000141c3, 0x000150c4, 0x000151c5,
821 			 0x000142c8, 0x000143c9, 0x000152ca, 0x000153cb },
827 	VENDOR_DSPIO_SCP_WRITE_DATA_LOW      = 0x000,
828 	VENDOR_DSPIO_SCP_WRITE_DATA_HIGH     = 0x100,
830 	VENDOR_DSPIO_STATUS                  = 0xF01,
831 	VENDOR_DSPIO_SCP_POST_READ_DATA      = 0x702,
832 	VENDOR_DSPIO_SCP_READ_DATA           = 0xF02,
833 	VENDOR_DSPIO_DSP_INIT                = 0x703,
834 	VENDOR_DSPIO_SCP_POST_COUNT_QUERY    = 0x704,
835 	VENDOR_DSPIO_SCP_READ_COUNT          = 0xF04,
838 	VENDOR_CHIPIO_ADDRESS_LOW            = 0x000,
839 	VENDOR_CHIPIO_ADDRESS_HIGH           = 0x100,
840 	VENDOR_CHIPIO_STREAM_FORMAT          = 0x200,
841 	VENDOR_CHIPIO_DATA_LOW               = 0x300,
842 	VENDOR_CHIPIO_DATA_HIGH              = 0x400,
844 	VENDOR_CHIPIO_8051_WRITE_DIRECT      = 0x500,
845 	VENDOR_CHIPIO_8051_READ_DIRECT       = 0xD00,
847 	VENDOR_CHIPIO_GET_PARAMETER          = 0xF00,
848 	VENDOR_CHIPIO_STATUS                 = 0xF01,
849 	VENDOR_CHIPIO_HIC_POST_READ          = 0x702,
850 	VENDOR_CHIPIO_HIC_READ_DATA          = 0xF03,
852 	VENDOR_CHIPIO_8051_DATA_WRITE        = 0x707,
853 	VENDOR_CHIPIO_8051_DATA_READ         = 0xF07,
854 	VENDOR_CHIPIO_8051_PMEM_READ         = 0xF08,
855 	VENDOR_CHIPIO_8051_IRAM_WRITE        = 0x709,
856 	VENDOR_CHIPIO_8051_IRAM_READ         = 0xF09,
858 	VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE   = 0x70A,
859 	VENDOR_CHIPIO_CT_EXTENSIONS_GET      = 0xF0A,
861 	VENDOR_CHIPIO_PLL_PMU_WRITE          = 0x70C,
862 	VENDOR_CHIPIO_PLL_PMU_READ           = 0xF0C,
863 	VENDOR_CHIPIO_8051_ADDRESS_LOW       = 0x70D,
864 	VENDOR_CHIPIO_8051_ADDRESS_HIGH      = 0x70E,
865 	VENDOR_CHIPIO_FLAG_SET               = 0x70F,
866 	VENDOR_CHIPIO_FLAGS_GET              = 0xF0F,
867 	VENDOR_CHIPIO_PARAM_SET              = 0x710,
868 	VENDOR_CHIPIO_PARAM_GET              = 0xF10,
870 	VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET  = 0x711,
871 	VENDOR_CHIPIO_PORT_ALLOC_SET         = 0x712,
872 	VENDOR_CHIPIO_PORT_ALLOC_GET         = 0xF12,
873 	VENDOR_CHIPIO_PORT_FREE_SET          = 0x713,
875 	VENDOR_CHIPIO_PARAM_EX_ID_GET        = 0xF17,
876 	VENDOR_CHIPIO_PARAM_EX_ID_SET        = 0x717,
877 	VENDOR_CHIPIO_PARAM_EX_VALUE_GET     = 0xF18,
878 	VENDOR_CHIPIO_PARAM_EX_VALUE_SET     = 0x718,
880 	VENDOR_CHIPIO_DMIC_CTL_SET           = 0x788,
881 	VENDOR_CHIPIO_DMIC_CTL_GET           = 0xF88,
882 	VENDOR_CHIPIO_DMIC_PIN_SET           = 0x789,
883 	VENDOR_CHIPIO_DMIC_PIN_GET           = 0xF89,
884 	VENDOR_CHIPIO_DMIC_MCLK_SET          = 0x78A,
885 	VENDOR_CHIPIO_DMIC_MCLK_GET          = 0xF8A,
887 	VENDOR_CHIPIO_EAPD_SEL_SET           = 0x78D
895 	CONTROL_FLAG_C_MGR                  = 0,
900 	/* Tracker for the SPDIF-in path is bypassed/enabled */
918 	/* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
920 	/* De-emphasis filter on DAC-1 disabled/enabled */
922 	/* De-emphasis filter on DAC-2 disabled/enabled */
924 	/* De-emphasis filter on DAC-3 disabled/enabled */
926 	/* High-pass filter on ADC_B disabled/enabled */
928 	/* High-pass filter on ADC_C disabled/enabled */
952 	/* 0: None, 1: Mic1In*/
954 	/* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
965 	 * sense given the fact the AE-5 uses it and has the ASI flag set.
1000 	VENDOR_STATUS_DSPIO_OK                       = 0x00,
1002 	VENDOR_STATUS_DSPIO_BUSY                     = 0x01,
1004 	VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL   = 0x02,
1006 	VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
1014 	VENDOR_STATUS_CHIPIO_OK   = 0x00,
1016 	VENDOR_STATUS_CHIPIO_BUSY = 0x01
1023 	SR_6_000        = 0x00,
1024 	SR_8_000        = 0x01,
1025 	SR_9_600        = 0x02,
1026 	SR_11_025       = 0x03,
1027 	SR_16_000       = 0x04,
1028 	SR_22_050       = 0x05,
1029 	SR_24_000       = 0x06,
1030 	SR_32_000       = 0x07,
1031 	SR_44_100       = 0x08,
1032 	SR_48_000       = 0x09,
1033 	SR_88_200       = 0x0A,
1034 	SR_96_000       = 0x0B,
1035 	SR_144_000      = 0x0C,
1036 	SR_176_400      = 0x0D,
1037 	SR_192_000      = 0x0E,
1038 	SR_384_000      = 0x0F,
1040 	SR_COUNT        = 0x10,
1042 	SR_RATE_UNKNOWN = 0x1F
1046 	DSP_DOWNLOAD_FAILED = -1,
1047 	DSP_DOWNLOAD_INIT   = 0,
1053 #define get_hdafmt_chs(fmt)	(fmt & 0xf)
1054 #define get_hdafmt_bits(fmt)	((fmt >> 4) & 0x7)
1055 #define get_hdafmt_rate(fmt)	((fmt >> 8) & 0x7f)
1056 #define get_hdafmt_type(fmt)	((fmt >> 15) & 0x1)
1129 	/* AE-5 Control values */
1135 	struct hda_codec *codec;  member
1143 	 * AE-5 all use PCI region 2 to toggle GPIO and other currently unknown
1181 #define ca0132_quirk(spec)		((spec)->codec->fixup_id)
1182 #define ca0132_use_pci_mmio(spec)	((spec)->use_pci_mmio)
1183 #define ca0132_use_alt_functions(spec)	((spec)->use_alt_functions)
1184 #define ca0132_use_alt_controls(spec)	((spec)->use_alt_controls)
1193 	{ 0x0b, 0x90170110 }, /* Builtin Speaker */
1194 	{ 0x0c, 0x411111f0 }, /* N/A */
1195 	{ 0x0d, 0x411111f0 }, /* N/A */
1196 	{ 0x0e, 0x411111f0 }, /* N/A */
1197 	{ 0x0f, 0x0321101f }, /* HP */
1198 	{ 0x10, 0x411111f0 }, /* Headset?  disabled for now */
1199 	{ 0x11, 0x03a11021 }, /* Mic */
1200 	{ 0x12, 0xd5a30140 }, /* Builtin Mic */
1201 	{ 0x13, 0x411111f0 }, /* N/A */
1202 	{ 0x18, 0x411111f0 }, /* N/A */
1208 	{ 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1209 	{ 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1210 	{ 0x0d, 0x014510f0 }, /* Digital Out */
1211 	{ 0x0e, 0x01c510f0 }, /* SPDIF In */
1212 	{ 0x0f, 0x0221701f }, /* Port A -- BackPanel HP */
1213 	{ 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1214 	{ 0x11, 0x01017014 }, /* Port B -- LineMicIn2 / Rear L/R */
1215 	{ 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1216 	{ 0x13, 0x908700f0 }, /* What U Hear In*/
1217 	{ 0x18, 0x50d000f0 }, /* N/A */
1223 	{ 0x0b, 0x01047110 }, /* Port G -- Lineout FRONT L/R */
1224 	{ 0x0c, 0x414510f0 }, /* SPDIF Out 1 - Disabled*/
1225 	{ 0x0d, 0x014510f0 }, /* Digital Out */
1226 	{ 0x0e, 0x41c520f0 }, /* SPDIF In - Disabled*/
1227 	{ 0x0f, 0x0122711f }, /* Port A -- BackPanel HP */
1228 	{ 0x10, 0x01017111 }, /* Port D -- Center/LFE */
1229 	{ 0x11, 0x01017114 }, /* Port B -- LineMicIn2 / Rear L/R */
1230 	{ 0x12, 0x01a271f0 }, /* Port C -- LineIn1 */
1231 	{ 0x13, 0x908700f0 }, /* What U Hear In*/
1232 	{ 0x18, 0x50d000f0 }, /* N/A */
1238 	{ 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1239 	{ 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1240 	{ 0x0d, 0x014510f0 }, /* Digital Out */
1241 	{ 0x0e, 0x01c520f0 }, /* SPDIF In */
1242 	{ 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1243 	{ 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1244 	{ 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1245 	{ 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1246 	{ 0x13, 0x908700f0 }, /* What U Hear In*/
1247 	{ 0x18, 0x50d000f0 }, /* N/A */
1251 /* Sound Blaster AE-5 pin configs taken from Windows Driver */
1253 	{ 0x0b, 0x01017010 }, /* Port G -- Lineout FRONT L/R */
1254 	{ 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1255 	{ 0x0d, 0x014510f0 }, /* Digital Out */
1256 	{ 0x0e, 0x01c510f0 }, /* SPDIF In */
1257 	{ 0x0f, 0x01017114 }, /* Port A -- Rear L/R. */
1258 	{ 0x10, 0x01017012 }, /* Port D -- Center/LFE or FP Hp */
1259 	{ 0x11, 0x012170ff }, /* Port B -- LineMicIn2 / Rear Headphone */
1260 	{ 0x12, 0x01a170f0 }, /* Port C -- LineIn1 */
1261 	{ 0x13, 0x908700f0 }, /* What U Hear In*/
1262 	{ 0x18, 0x50d000f0 }, /* N/A */
1268 	{ 0x0b, 0x01014110 }, /* Port G -- Lineout FRONT L/R */
1269 	{ 0x0c, 0x014510f0 }, /* SPDIF Out 1 */
1270 	{ 0x0d, 0x014510f0 }, /* Digital Out */
1271 	{ 0x0e, 0x41c520f0 }, /* SPDIF In */
1272 	{ 0x0f, 0x0221401f }, /* Port A -- BackPanel HP */
1273 	{ 0x10, 0x01016011 }, /* Port D -- Center/LFE or FP Hp */
1274 	{ 0x11, 0x01011014 }, /* Port B -- LineMicIn2 / Rear L/R */
1275 	{ 0x12, 0x02a090f0 }, /* Port C -- LineIn1 */
1276 	{ 0x13, 0x908700f0 }, /* What U Hear In*/
1277 	{ 0x18, 0x500000f0 }, /* N/A */
1282 	{ 0x0b, 0x01017010 },
1283 	{ 0x0c, 0x014510f0 },
1284 	{ 0x0d, 0x414510f0 },
1285 	{ 0x0e, 0x01c520f0 },
1286 	{ 0x0f, 0x01017114 },
1287 	{ 0x10, 0x01017011 },
1288 	{ 0x11, 0x018170ff },
1289 	{ 0x12, 0x01a170f0 },
1290 	{ 0x13, 0x908700f0 },
1291 	{ 0x18, 0x500000f0 },
1296 	SND_PCI_QUIRK(0x1028, 0x057b, "Alienware M17x R4", QUIRK_ALIENWARE_M17XR4),
1297 	SND_PCI_QUIRK(0x1028, 0x0685, "Alienware 15 2015", QUIRK_ALIENWARE),
1298 	SND_PCI_QUIRK(0x1028, 0x0688, "Alienware 17 2015", QUIRK_ALIENWARE),
1299 	SND_PCI_QUIRK(0x1028, 0x0708, "Alienware 15 R2 2016", QUIRK_ALIENWARE),
1300 	SND_PCI_QUIRK(0x1102, 0x0010, "Sound Blaster Z", QUIRK_SBZ),
1301 	SND_PCI_QUIRK(0x1102, 0x0023, "Sound Blaster Z", QUIRK_SBZ),
1302 	SND_PCI_QUIRK(0x1102, 0x0027, "Sound Blaster Z", QUIRK_SBZ),
1303 	SND_PCI_QUIRK(0x1102, 0x0033, "Sound Blaster ZxR", QUIRK_SBZ),
1304 	SND_PCI_QUIRK(0x1458, 0xA016, "Recon3Di", QUIRK_R3DI),
1305 	SND_PCI_QUIRK(0x1458, 0xA026, "Gigabyte G1.Sniper Z97", QUIRK_R3DI),
1306 	SND_PCI_QUIRK(0x1458, 0xA036, "Gigabyte GA-Z170X-Gaming 7", QUIRK_R3DI),
1307 	SND_PCI_QUIRK(0x3842, 0x1038, "EVGA X99 Classified", QUIRK_R3DI),
1308 	SND_PCI_QUIRK(0x3842, 0x104b, "EVGA X299 Dark", QUIRK_R3DI),
1309 	SND_PCI_QUIRK(0x3842, 0x1055, "EVGA Z390 DARK", QUIRK_R3DI),
1310 	SND_PCI_QUIRK(0x1102, 0x0013, "Recon3D", QUIRK_R3D),
1311 	SND_PCI_QUIRK(0x1102, 0x0018, "Recon3D", QUIRK_R3D),
1312 	SND_PCI_QUIRK(0x1102, 0x0051, "Sound Blaster AE-5", QUIRK_AE5),
1313 	SND_PCI_QUIRK(0x1102, 0x0191, "Sound Blaster AE-5 Plus", QUIRK_AE5),
1314 	SND_PCI_QUIRK(0x1102, 0x0081, "Sound Blaster AE-7", QUIRK_AE7),
1320 	{ .id = QUIRK_ALIENWARE_M17XR4, .name = "alienware-m17xr4" },
1323 	{ .id = QUIRK_ZXR_DBPRO, .name = "zxr-dbpro" },
1335 	unsigned int dac2port; /* ParamID 0x0d value. */
1370 		{ .dac2port         = 0x24,
1374 		  .mmio_gpio_count  = 0,
1375 		  .scp_cmds_count   = 0,
1379 		{ .dac2port         = 0x21,
1382 		  .hda_gpio_set     = 0,
1383 		  .mmio_gpio_count  = 0,
1384 		  .scp_cmds_count   = 0,
1393 		{ .dac2port         = 0x24,
1398 		  .scp_cmds_count   = 0,
1402 		{ .dac2port         = 0x21,
1406 		  .mmio_gpio_set    = { 0 },
1407 		  .scp_cmds_count   = 0,
1416 		{ .dac2port         = 0x18,
1420 		  .mmio_gpio_set    = { 0, 1, 1 },
1421 		  .scp_cmds_count   = 0,
1424 		{ .dac2port         = 0x12,
1428 		  .mmio_gpio_set    = { 1, 1, 0 },
1429 		  .scp_cmds_count   = 0,
1438 		{ .dac2port         = 0x24,
1442 		  .mmio_gpio_set    = { 1, 1, 0 },
1443 		  .scp_cmds_count   = 0,
1447 		{ .dac2port         = 0x21,
1451 		  .mmio_gpio_set    = { 0, 1, 1 },
1452 		  .scp_cmds_count   = 0,
1461 		{ .dac2port          = 0xa4,
1463 		  .mmio_gpio_count   = 0,
1465 		  .scp_cmd_mid       = { 0x96, 0x96 },
1470 		  .chipio_write_addr = 0x0018b03c,
1471 		  .chipio_write_data = 0x00000012
1474 		{ .dac2port          = 0xa1,
1476 		  .mmio_gpio_count   = 0,
1478 		  .scp_cmd_mid       = { 0x96, 0x96 },
1483 		  .chipio_write_addr = 0x0018b03c,
1484 		  .chipio_write_data = 0x00000012
1492 		{ .dac2port          = 0x58,
1495 		  .mmio_gpio_pin     = { 0 },
1498 		  .scp_cmd_mid       = { 0x96, 0x96 },
1503 		  .chipio_write_addr = 0x0018b03c,
1504 		  .chipio_write_data = 0x00000000
1507 		{ .dac2port          = 0x58,
1510 		  .mmio_gpio_pin     = { 0 },
1513 		  .scp_cmd_mid       = { 0x96, 0x96 },
1518 		  .chipio_write_addr = 0x0018b03c,
1519 		  .chipio_write_data = 0x00000010
1525  * CA0132 codec access
1527 static unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid,  in codec_send_command()  argument
1531 	response = snd_hda_codec_read(codec, nid, 0, verb, parm);  in codec_send_command()
1534 	return ((response == -1) ? -1 : 0);  in codec_send_command()
1537 static int codec_set_converter_format(struct hda_codec *codec, hda_nid_t nid,  in codec_set_converter_format()  argument
1540 	return codec_send_command(codec, nid, VENDOR_CHIPIO_STREAM_FORMAT,  in codec_set_converter_format()
1541 				converter_format & 0xffff, res);  in codec_set_converter_format()
1544 static int codec_set_converter_stream_channel(struct hda_codec *codec,  in codec_set_converter_stream_channel()  argument
1548 	unsigned char converter_stream_channel = 0;  in codec_set_converter_stream_channel()
1550 	converter_stream_channel = (stream << 4) | (channel & 0x0f);  in codec_set_converter_stream_channel()
1551 	return codec_send_command(codec, nid, AC_VERB_SET_CHANNEL_STREAMID,  in codec_set_converter_stream_channel()
1556 static int chipio_send(struct hda_codec *codec,  in chipio_send()  argument
1565 		res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,  in chipio_send()
1568 			return 0;  in chipio_send()
1572 	return -EIO;  in chipio_send()
1576  * Write chip address through the vendor widget -- NOT protected by the Mutex!
1578 static int chipio_write_address(struct hda_codec *codec,  in chipio_write_address()  argument
1581 	struct ca0132_spec *spec = codec->spec;  in chipio_write_address()
1584 	if (spec->curr_chip_addx == chip_addx)  in chipio_write_address()
1585 			return 0;  in chipio_write_address()
1588 	res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW,  in chipio_write_address()
1589 			  chip_addx & 0xffff);  in chipio_write_address()
1591 	if (res != -EIO) {  in chipio_write_address()
1593 		res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH,  in chipio_write_address()
1597 	spec->curr_chip_addx = (res < 0) ? ~0U : chip_addx;  in chipio_write_address()
1603  * Write data through the vendor widget -- NOT protected by the Mutex!
1605 static int chipio_write_data(struct hda_codec *codec, unsigned int data)  in chipio_write_data()  argument
1607 	struct ca0132_spec *spec = codec->spec;  in chipio_write_data()
1611 	res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff);  in chipio_write_data()
1613 	if (res != -EIO) {  in chipio_write_data()
1615 		res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH,  in chipio_write_data()
1621 	spec->curr_chip_addx = (res != -EIO) ?  in chipio_write_data()
1622 					(spec->curr_chip_addx + 4) : ~0U;  in chipio_write_data()
1627  * Write multiple data through the vendor widget -- NOT protected by the Mutex!
1629 static int chipio_write_data_multiple(struct hda_codec *codec,  in chipio_write_data_multiple()  argument
1633 	int status = 0;  in chipio_write_data_multiple()
1636 		codec_dbg(codec, "chipio_write_data null ptr\n");  in chipio_write_data_multiple()
1637 		return -EINVAL;  in chipio_write_data_multiple()
1640 	while ((count-- != 0) && (status == 0))  in chipio_write_data_multiple()
1641 		status = chipio_write_data(codec, *data++);  in chipio_write_data_multiple()
1648  * Read data through the vendor widget -- NOT protected by the Mutex!
1650 static int chipio_read_data(struct hda_codec *codec, unsigned int *data)  in chipio_read_data()  argument
1652 	struct ca0132_spec *spec = codec->spec;  in chipio_read_data()
1656 	res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0);  in chipio_read_data()
1658 	if (res != -EIO) {  in chipio_read_data()
1660 		res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);  in chipio_read_data()
1663 	if (res != -EIO) {  in chipio_read_data()
1665 		*data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,  in chipio_read_data()
1667 					   0);  in chipio_read_data()
1672 	spec->curr_chip_addx = (res != -EIO) ?  in chipio_read_data()
1673 					(spec->curr_chip_addx + 4) : ~0U;  in chipio_read_data()
1681 static int chipio_write(struct hda_codec *codec,  in chipio_write()  argument
1684 	struct ca0132_spec *spec = codec->spec;  in chipio_write()
1687 	mutex_lock(&spec->chipio_mutex);  in chipio_write()
1690 	err = chipio_write_address(codec, chip_addx);  in chipio_write()
1691 	if (err < 0)  in chipio_write()
1694 	err = chipio_write_data(codec, data);  in chipio_write()
1695 	if (err < 0)  in chipio_write()
1699 	mutex_unlock(&spec->chipio_mutex);  in chipio_write()
1707 static int chipio_write_no_mutex(struct hda_codec *codec,  in chipio_write_no_mutex()  argument
1714 	err = chipio_write_address(codec, chip_addx);  in chipio_write_no_mutex()
1715 	if (err < 0)  in chipio_write_no_mutex()
1718 	err = chipio_write_data(codec, data);  in chipio_write_no_mutex()
1719 	if (err < 0)  in chipio_write_no_mutex()
1730 static int chipio_write_multiple(struct hda_codec *codec,  in chipio_write_multiple()  argument
1735 	struct ca0132_spec *spec = codec->spec;  in chipio_write_multiple()
1738 	mutex_lock(&spec->chipio_mutex);  in chipio_write_multiple()
1739 	status = chipio_write_address(codec, chip_addx);  in chipio_write_multiple()
1740 	if (status < 0)  in chipio_write_multiple()
1743 	status = chipio_write_data_multiple(codec, data, count);  in chipio_write_multiple()
1745 	mutex_unlock(&spec->chipio_mutex);  in chipio_write_multiple()
1754 static int chipio_read(struct hda_codec *codec,  in chipio_read()  argument
1757 	struct ca0132_spec *spec = codec->spec;  in chipio_read()
1760 	mutex_lock(&spec->chipio_mutex);  in chipio_read()
1763 	err = chipio_write_address(codec, chip_addx);  in chipio_read()
1764 	if (err < 0)  in chipio_read()
1767 	err = chipio_read_data(codec, data);  in chipio_read()
1768 	if (err < 0)  in chipio_read()
1772 	mutex_unlock(&spec->chipio_mutex);  in chipio_read()
1779 static void chipio_set_control_flag(struct hda_codec *codec,  in chipio_set_control_flag()  argument
1786 	flag_bit = (flag_state ? 1 : 0);  in chipio_set_control_flag()
1788 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in chipio_set_control_flag()
1795 static void chipio_set_control_param(struct hda_codec *codec,  in chipio_set_control_param()  argument
1798 	struct ca0132_spec *spec = codec->spec;  in chipio_set_control_param()
1803 		snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in chipio_set_control_param()
1806 		mutex_lock(&spec->chipio_mutex);  in chipio_set_control_param()
1807 		if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) {  in chipio_set_control_param()
1808 			snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in chipio_set_control_param()
1811 			snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in chipio_set_control_param()
1815 		mutex_unlock(&spec->chipio_mutex);  in chipio_set_control_param()
1822 static void chipio_set_control_param_no_mutex(struct hda_codec *codec,  in chipio_set_control_param_no_mutex()  argument
1829 		snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in chipio_set_control_param_no_mutex()
1832 		if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == 0) {  in chipio_set_control_param_no_mutex()
1833 			snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in chipio_set_control_param_no_mutex()
1836 			snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in chipio_set_control_param_no_mutex()
1846 static void chipio_set_stream_source_dest(struct hda_codec *codec,  in chipio_set_stream_source_dest()  argument
1849 	chipio_set_control_param_no_mutex(codec,  in chipio_set_stream_source_dest()
1851 	chipio_set_control_param_no_mutex(codec,  in chipio_set_stream_source_dest()
1853 	chipio_set_control_param_no_mutex(codec,  in chipio_set_stream_source_dest()
1860 static void chipio_set_stream_channels(struct hda_codec *codec,  in chipio_set_stream_channels()  argument
1863 	chipio_set_control_param_no_mutex(codec,  in chipio_set_stream_channels()
1865 	chipio_set_control_param_no_mutex(codec,  in chipio_set_stream_channels()
1872 static void chipio_set_stream_control(struct hda_codec *codec,  in chipio_set_stream_control()  argument
1875 	chipio_set_control_param_no_mutex(codec,  in chipio_set_stream_control()
1877 	chipio_set_control_param_no_mutex(codec,  in chipio_set_stream_control()
1884 static void chipio_get_stream_control(struct hda_codec *codec,  in chipio_get_stream_control()  argument
1887 	chipio_set_control_param_no_mutex(codec,  in chipio_get_stream_control()
1889 	*enable = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,  in chipio_get_stream_control()
1897 static void chipio_set_conn_rate_no_mutex(struct hda_codec *codec,  in chipio_set_conn_rate_no_mutex()  argument
1900 	chipio_set_control_param_no_mutex(codec,  in chipio_set_conn_rate_no_mutex()
1902 	chipio_set_control_param_no_mutex(codec,  in chipio_set_conn_rate_no_mutex()
1909 static void chipio_set_conn_rate(struct hda_codec *codec,  in chipio_set_conn_rate()  argument
1912 	chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_ID, connid);  in chipio_set_conn_rate()
1913 	chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE,  in chipio_set_conn_rate()
1920  * 0x80-0xFF.
1922 static void chipio_8051_write_direct(struct hda_codec *codec,  in chipio_8051_write_direct()  argument
1928 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, verb, addr);  in chipio_8051_write_direct()
1932  * Writes to the 8051's exram, which has 16-bits of address space.
1933  * Data at addresses 0x2000-0x7fff is mirrored to 0x8000-0xdfff.
1934  * Data at 0x8000-0xdfff can also be used as program memory for the 8051 by
1936  * 0xe000-0xffff is always mapped as program memory, with only 0xf000-0xffff
1939 static void chipio_8051_set_address(struct hda_codec *codec, unsigned int addr)  in chipio_8051_set_address()  argument
1943 	/* Lower 8-bits. */  in chipio_8051_set_address()
1944 	tmp = addr & 0xff;  in chipio_8051_set_address()
1945 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in chipio_8051_set_address()
1948 	/* Upper 8-bits. */  in chipio_8051_set_address()
1949 	tmp = (addr >> 8) & 0xff;  in chipio_8051_set_address()
1950 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in chipio_8051_set_address()
1954 static void chipio_8051_set_data(struct hda_codec *codec, unsigned int data)  in chipio_8051_set_data()  argument
1956 	/* 8-bits of data. */  in chipio_8051_set_data()
1957 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in chipio_8051_set_data()
1958 			    VENDOR_CHIPIO_8051_DATA_WRITE, data & 0xff);  in chipio_8051_set_data()
1961 static unsigned int chipio_8051_get_data(struct hda_codec *codec)  in chipio_8051_get_data()  argument
1963 	return snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,  in chipio_8051_get_data()
1964 				   VENDOR_CHIPIO_8051_DATA_READ, 0);  in chipio_8051_get_data()
1968 static void chipio_8051_set_data_pll(struct hda_codec *codec, unsigned int data)  in chipio_8051_set_data_pll()  argument
1970 	/* 8-bits of data. */  in chipio_8051_set_data_pll()
1971 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in chipio_8051_set_data_pll()
1972 			    VENDOR_CHIPIO_PLL_PMU_WRITE, data & 0xff);  in chipio_8051_set_data_pll()
1975 static void chipio_8051_write_exram(struct hda_codec *codec,  in chipio_8051_write_exram()  argument
1978 	struct ca0132_spec *spec = codec->spec;  in chipio_8051_write_exram()
1980 	mutex_lock(&spec->chipio_mutex);  in chipio_8051_write_exram()
1982 	chipio_8051_set_address(codec, addr);  in chipio_8051_write_exram()
1983 	chipio_8051_set_data(codec, data);  in chipio_8051_write_exram()
1985 	mutex_unlock(&spec->chipio_mutex);  in chipio_8051_write_exram()
1988 static void chipio_8051_write_exram_no_mutex(struct hda_codec *codec,  in chipio_8051_write_exram_no_mutex()  argument
1991 	chipio_8051_set_address(codec, addr);  in chipio_8051_write_exram_no_mutex()
1992 	chipio_8051_set_data(codec, data);  in chipio_8051_write_exram_no_mutex()
1996 static void chipio_8051_read_exram(struct hda_codec *codec,  in chipio_8051_read_exram()  argument
1999 	chipio_8051_set_address(codec, addr);  in chipio_8051_read_exram()
2000 	*data = chipio_8051_get_data(codec);  in chipio_8051_read_exram()
2003 static void chipio_8051_write_pll_pmu(struct hda_codec *codec,  in chipio_8051_write_pll_pmu()  argument
2006 	struct ca0132_spec *spec = codec->spec;  in chipio_8051_write_pll_pmu()
2008 	mutex_lock(&spec->chipio_mutex);  in chipio_8051_write_pll_pmu()
2010 	chipio_8051_set_address(codec, addr & 0xff);  in chipio_8051_write_pll_pmu()
2011 	chipio_8051_set_data_pll(codec, data);  in chipio_8051_write_pll_pmu()
2013 	mutex_unlock(&spec->chipio_mutex);  in chipio_8051_write_pll_pmu()
2016 static void chipio_8051_write_pll_pmu_no_mutex(struct hda_codec *codec,  in chipio_8051_write_pll_pmu_no_mutex()  argument
2019 	chipio_8051_set_address(codec, addr & 0xff);  in chipio_8051_write_pll_pmu_no_mutex()
2020 	chipio_8051_set_data_pll(codec, data);  in chipio_8051_write_pll_pmu_no_mutex()
2026 static void chipio_enable_clocks(struct hda_codec *codec)  in chipio_enable_clocks()  argument
2028 	struct ca0132_spec *spec = codec->spec;  in chipio_enable_clocks()
2030 	mutex_lock(&spec->chipio_mutex);  in chipio_enable_clocks()
2032 	chipio_8051_write_pll_pmu_no_mutex(codec, 0x00, 0xff);  in chipio_enable_clocks()
2033 	chipio_8051_write_pll_pmu_no_mutex(codec, 0x05, 0x0b);  in chipio_enable_clocks()
2034 	chipio_8051_write_pll_pmu_no_mutex(codec, 0x06, 0xff);  in chipio_enable_clocks()
2036 	mutex_unlock(&spec->chipio_mutex);  in chipio_enable_clocks()
2042 static int dspio_send(struct hda_codec *codec, unsigned int reg,  in dspio_send()  argument
2050 		res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data);  in dspio_send()
2051 		if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY))  in dspio_send()
2056 	return -EIO;  in dspio_send()
2062 static void dspio_write_wait(struct hda_codec *codec)  in dspio_write_wait()  argument
2068 		status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,  in dspio_write_wait()
2069 						VENDOR_DSPIO_STATUS, 0);  in dspio_write_wait()
2080 static int dspio_write(struct hda_codec *codec, unsigned int scp_data)  in dspio_write()  argument
2082 	struct ca0132_spec *spec = codec->spec;  in dspio_write()
2085 	dspio_write_wait(codec);  in dspio_write()
2087 	mutex_lock(&spec->chipio_mutex);  in dspio_write()
2088 	status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_LOW,  in dspio_write()
2089 			    scp_data & 0xffff);  in dspio_write()
2090 	if (status < 0)  in dspio_write()
2093 	status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH,  in dspio_write()
2095 	if (status < 0)  in dspio_write()
2099 	status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,  in dspio_write()
2100 				    VENDOR_DSPIO_STATUS, 0);  in dspio_write()
2102 	mutex_unlock(&spec->chipio_mutex);  in dspio_write()
2105 			-EIO : 0;  in dspio_write()
2111 static int dspio_write_multiple(struct hda_codec *codec,  in dspio_write_multiple()  argument
2114 	int status = 0;  in dspio_write_multiple()
2118 		return -EINVAL;  in dspio_write_multiple()
2120 	count = 0;  in dspio_write_multiple()
2122 		status = dspio_write(codec, *buffer++);  in dspio_write_multiple()
2123 		if (status != 0)  in dspio_write_multiple()
2131 static int dspio_read(struct hda_codec *codec, unsigned int *data)  in dspio_read()  argument
2135 	status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0);  in dspio_read()
2136 	if (status == -EIO)  in dspio_read()
2139 	status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0);  in dspio_read()
2140 	if (status == -EIO ||  in dspio_read()
2142 		return -EIO;  in dspio_read()
2144 	*data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,  in dspio_read()
2145 				   VENDOR_DSPIO_SCP_READ_DATA, 0);  in dspio_read()
2147 	return 0;  in dspio_read()
2150 static int dspio_read_multiple(struct hda_codec *codec, unsigned int *buffer,  in dspio_read_multiple()  argument
2153 	int status = 0;  in dspio_read_multiple()
2160 		return -1;  in dspio_read_multiple()
2162 	count = 0;  in dspio_read_multiple()
2164 		status = dspio_read(codec, buffer++);  in dspio_read_multiple()
2165 		if (status != 0)  in dspio_read_multiple()
2171 	if (status == 0) {  in dspio_read_multiple()
2173 			status = dspio_read(codec, &dummy);  in dspio_read_multiple()
2174 			if (status != 0)  in dspio_read_multiple()
2193 	unsigned int header = 0;  in make_scp_header()
2195 	header = (data_size & 0x1f) << 27;  in make_scp_header()
2196 	header |= (error_flag & 0x01) << 26;  in make_scp_header()
2197 	header |= (resp_flag & 0x01) << 25;  in make_scp_header()
2198 	header |= (device_flag & 0x01) << 24;  in make_scp_header()
2199 	header |= (req & 0x7f) << 17;  in make_scp_header()
2200 	header |= (get_flag & 0x01) << 16;  in make_scp_header()
2201 	header |= (source_id & 0xff) << 8;  in make_scp_header()
2202 	header |= target_id & 0xff;  in make_scp_header()
2218 		*data_size = (header >> 27) & 0x1f;  in extract_scp_header()
2220 		*error_flag = (header >> 26) & 0x01;  in extract_scp_header()
2222 		*resp_flag = (header >> 25) & 0x01;  in extract_scp_header()
2224 		*device_flag = (header >> 24) & 0x01;  in extract_scp_header()
2226 		*req = (header >> 17) & 0x7f;  in extract_scp_header()
2228 		*get_flag = (header >> 16) & 0x01;  in extract_scp_header()
2230 		*source_id = (header >> 8) & 0xff;  in extract_scp_header()
2232 		*target_id = header & 0xff;  in extract_scp_header()
2243 static void dspio_clear_response_queue(struct hda_codec *codec)  in dspio_clear_response_queue()  argument
2246 	unsigned int dummy = 0;  in dspio_clear_response_queue()
2251 		status = dspio_read(codec, &dummy);  in dspio_clear_response_queue()
2252 	} while (status == 0 && time_before(jiffies, timeout));  in dspio_clear_response_queue()
2255 static int dspio_get_response_data(struct hda_codec *codec)  in dspio_get_response_data()  argument
2257 	struct ca0132_spec *spec = codec->spec;  in dspio_get_response_data()
2258 	unsigned int data = 0;  in dspio_get_response_data()
2261 	if (dspio_read(codec, &data) < 0)  in dspio_get_response_data()
2262 		return -EIO;  in dspio_get_response_data()
2264 	if ((data & 0x00ffffff) == spec->wait_scp_header) {  in dspio_get_response_data()
2265 		spec->scp_resp_header = data;  in dspio_get_response_data()
2266 		spec->scp_resp_count = data >> 27;  in dspio_get_response_data()
2267 		count = spec->wait_num_data;  in dspio_get_response_data()
2268 		dspio_read_multiple(codec, spec->scp_resp_data,  in dspio_get_response_data()
2269 				    &spec->scp_resp_count, count);  in dspio_get_response_data()
2270 		return 0;  in dspio_get_response_data()
2273 	return -EIO;  in dspio_get_response_data()
2279 static int dspio_send_scp_message(struct hda_codec *codec,  in dspio_send_scp_message()  argument
2286 	struct ca0132_spec *spec = codec->spec;  in dspio_send_scp_message()
2288 	unsigned int scp_send_size = 0;  in dspio_send_scp_message()
2297 		*bytes_returned = 0;  in dspio_send_scp_message()
2307 		return -EINVAL;  in dspio_send_scp_message()
2311 			return -EINVAL;  in dspio_send_scp_message()
2313 		spec->wait_scp_header = *((unsigned int *)send_buf);  in dspio_send_scp_message()
2318 		spec->wait_scp_header &= 0xffff0000;  in dspio_send_scp_message()
2319 		spec->wait_scp_header |= (resp_src_id << 8) | (resp_target_id);  in dspio_send_scp_message()
2320 		spec->wait_num_data = return_buf_size/sizeof(unsigned int) - 1;  in dspio_send_scp_message()
2321 		spec->wait_scp = 1;  in dspio_send_scp_message()
2325 	status = dspio_write_multiple(codec, (unsigned int *)send_buf,  in dspio_send_scp_message()
2327 	if (status < 0) {  in dspio_send_scp_message()
2328 		spec->wait_scp = 0;  in dspio_send_scp_message()
2334 		memset(return_buf, 0, return_buf_size);  in dspio_send_scp_message()
2337 		} while (spec->wait_scp && time_before(jiffies, timeout));  in dspio_send_scp_message()
2339 		if (!spec->wait_scp) {  in dspio_send_scp_message()
2341 			memcpy(&ret_msg->hdr, &spec->scp_resp_header, 4);  in dspio_send_scp_message()
2342 			memcpy(&ret_msg->data, spec->scp_resp_data,  in dspio_send_scp_message()
2343 			       spec->wait_num_data);  in dspio_send_scp_message()
2344 			*bytes_returned = (spec->scp_resp_count + 1) * 4;  in dspio_send_scp_message()
2345 			status = 0;  in dspio_send_scp_message()
2347 			status = -EIO;  in dspio_send_scp_message()
2349 		spec->wait_scp = 0;  in dspio_send_scp_message()
2356  * dspio_scp - Prepare and send the SCP message to DSP
2357  * @codec: the HDA codec
2369 static int dspio_scp(struct hda_codec *codec,  in dspio_scp()  argument
2373 	int status = 0;  in dspio_scp()
2379 	memset(&scp_send, 0, sizeof(scp_send));  in dspio_scp()
2380 	memset(&scp_reply, 0, sizeof(scp_reply));  in dspio_scp()
2382 	if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS))  in dspio_scp()
2383 		return -EINVAL;  in dspio_scp()
2386 		codec_dbg(codec, "dspio_scp get but has no buffer\n");  in dspio_scp()
2387 		return -EINVAL;  in dspio_scp()
2390 	if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) {  in dspio_scp()
2391 		codec_dbg(codec, "dspio_scp bad resp buf len parms\n");  in dspio_scp()
2392 		return -EINVAL;  in dspio_scp()
2396 				       0, 0, 0, len/sizeof(unsigned int));  in dspio_scp()
2397 	if (data != NULL && len > 0) {  in dspio_scp()
2402 	ret_bytes = 0;  in dspio_scp()
2404 	status = dspio_send_scp_message(codec, (unsigned char *)&scp_send,  in dspio_scp()
2408 	if (status < 0) {  in dspio_scp()
2409 		codec_dbg(codec, "dspio_scp: send scp msg failed\n");  in dspio_scp()
2421 		return 0;  in dspio_scp()
2424 		ret_size = (ret_bytes - sizeof(scp_reply.hdr))  in dspio_scp()
2428 			codec_dbg(codec, "reply too long for buf\n");  in dspio_scp()
2429 			return -EINVAL;  in dspio_scp()
2431 			codec_dbg(codec, "RetLen and HdrLen .NE.\n");  in dspio_scp()
2432 			return -EINVAL;  in dspio_scp()
2434 			codec_dbg(codec, "NULL reply\n");  in dspio_scp()
2435 			return -EINVAL;  in dspio_scp()
2441 		codec_dbg(codec, "reply ill-formed or errflag set\n");  in dspio_scp()
2442 		return -EIO;  in dspio_scp()
2451 static int dspio_set_param(struct hda_codec *codec, int mod_id,  in dspio_set_param()  argument
2454 	return dspio_scp(codec, mod_id, src_id, req, SCP_SET, data, len, NULL,  in dspio_set_param()
2458 static int dspio_set_uint_param(struct hda_codec *codec, int mod_id,  in dspio_set_uint_param()  argument
2461 	return dspio_set_param(codec, mod_id, 0x20, req, &data,  in dspio_set_uint_param()
2468 static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan)  in dspio_alloc_dma_chan()  argument
2470 	int status = 0;  in dspio_alloc_dma_chan()
2473 	codec_dbg(codec, "     dspio_alloc_dma_chan() -- begin\n");  in dspio_alloc_dma_chan()
2474 	status = dspio_scp(codec, MASTERCONTROL, 0x20,  in dspio_alloc_dma_chan()
2475 			MASTERCONTROL_ALLOC_DMA_CHAN, SCP_GET, NULL, 0,  in dspio_alloc_dma_chan()
2478 	if (status < 0) {  in dspio_alloc_dma_chan()
2479 		codec_dbg(codec, "dspio_alloc_dma_chan: SCP Failed\n");  in dspio_alloc_dma_chan()
2483 	if ((*dma_chan + 1) == 0) {  in dspio_alloc_dma_chan()
2484 		codec_dbg(codec, "no free dma channels to allocate\n");  in dspio_alloc_dma_chan()
2485 		return -EBUSY;  in dspio_alloc_dma_chan()
2488 	codec_dbg(codec, "dspio_alloc_dma_chan: chan=%d\n", *dma_chan);  in dspio_alloc_dma_chan()
2489 	codec_dbg(codec, "     dspio_alloc_dma_chan() -- complete\n");  in dspio_alloc_dma_chan()
2497 static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan)  in dspio_free_dma_chan()  argument
2499 	int status = 0;  in dspio_free_dma_chan()
2500 	unsigned int dummy = 0;  in dspio_free_dma_chan()
2502 	codec_dbg(codec, "     dspio_free_dma_chan() -- begin\n");  in dspio_free_dma_chan()
2503 	codec_dbg(codec, "dspio_free_dma_chan: chan=%d\n", dma_chan);  in dspio_free_dma_chan()
2505 	status = dspio_scp(codec, MASTERCONTROL, 0x20,  in dspio_free_dma_chan()
2509 	if (status < 0) {  in dspio_free_dma_chan()
2510 		codec_dbg(codec, "dspio_free_dma_chan: SCP Failed\n");  in dspio_free_dma_chan()
2514 	codec_dbg(codec, "     dspio_free_dma_chan() -- complete\n");  in dspio_free_dma_chan()
2522 static int dsp_set_run_state(struct hda_codec *codec)  in dsp_set_run_state()  argument
2528 	err = chipio_read(codec, DSP_DBGCNTL_INST_OFFSET, &dbg_ctrl_reg);  in dsp_set_run_state()
2529 	if (err < 0)  in dsp_set_run_state()
2535 	if (halt_state != 0) {  in dsp_set_run_state()
2538 		err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET,  in dsp_set_run_state()
2540 		if (err < 0)  in dsp_set_run_state()
2545 		err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET,  in dsp_set_run_state()
2547 		if (err < 0)  in dsp_set_run_state()
2551 	return 0;  in dsp_set_run_state()
2557 static int dsp_reset(struct hda_codec *codec)  in dsp_reset()  argument
2562 	codec_dbg(codec, "dsp_reset\n");  in dsp_reset()
2564 		res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0);  in dsp_reset()
2565 		retry--;  in dsp_reset()
2566 	} while (res == -EIO && retry);  in dsp_reset()
2569 		codec_dbg(codec, "dsp_reset timeout\n");  in dsp_reset()
2570 		return -EIO;  in dsp_reset()
2573 	return 0;  in dsp_reset()
2600 static bool dsp_is_dma_active(struct hda_codec *codec, unsigned int dma_chan)  in dsp_is_dma_active()  argument
2604 	chipio_read(codec, DSPDMAC_CHNLSTART_INST_OFFSET, &dma_chnlstart_reg);  in dsp_is_dma_active()
2607 			(DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0);  in dsp_is_dma_active()
2610 static int dsp_dma_setup_common(struct hda_codec *codec,  in dsp_dma_setup_common()  argument
2616 	int status = 0;  in dsp_dma_setup_common()
2622 	codec_dbg(codec, "-- dsp_dma_setup_common() -- Begin ---------\n");  in dsp_dma_setup_common()
2625 		codec_dbg(codec, "dma chan num invalid\n");  in dsp_dma_setup_common()
2626 		return -EINVAL;  in dsp_dma_setup_common()
2629 	if (dsp_is_dma_active(codec, dma_chan)) {  in dsp_dma_setup_common()
2630 		codec_dbg(codec, "dma already active\n");  in dsp_dma_setup_common()
2631 		return -EBUSY;  in dsp_dma_setup_common()
2637 		codec_dbg(codec, "invalid chip addr\n");  in dsp_dma_setup_common()
2638 		return -ENXIO;  in dsp_dma_setup_common()
2642 	active = 0;  in dsp_dma_setup_common()
2644 	codec_dbg(codec, "   dsp_dma_setup_common()    start reg pgm\n");  in dsp_dma_setup_common()
2647 		status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET,  in dsp_dma_setup_common()
2650 		if (status < 0) {  in dsp_dma_setup_common()
2651 			codec_dbg(codec, "read CHNLPROP Reg fail\n");  in dsp_dma_setup_common()
2654 		codec_dbg(codec, "dsp_dma_setup_common() Read CHNLPROP\n");  in dsp_dma_setup_common()
2664 	status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop);  in dsp_dma_setup_common()
2665 	if (status < 0) {  in dsp_dma_setup_common()
2666 		codec_dbg(codec, "write CHNLPROP Reg fail\n");  in dsp_dma_setup_common()
2669 	codec_dbg(codec, "   dsp_dma_setup_common()    Write CHNLPROP\n");  in dsp_dma_setup_common()
2672 		status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET,  in dsp_dma_setup_common()
2675 		if (status < 0) {  in dsp_dma_setup_common()
2676 			codec_dbg(codec, "read ACTIVE Reg fail\n");  in dsp_dma_setup_common()
2679 		codec_dbg(codec, "dsp_dma_setup_common() Read ACTIVE\n");  in dsp_dma_setup_common()
2685 	status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active);  in dsp_dma_setup_common()
2686 	if (status < 0) {  in dsp_dma_setup_common()
2687 		codec_dbg(codec, "write ACTIVE Reg fail\n");  in dsp_dma_setup_common()
2691 	codec_dbg(codec, "   dsp_dma_setup_common()    Write ACTIVE\n");  in dsp_dma_setup_common()
2693 	status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan),  in dsp_dma_setup_common()
2695 	if (status < 0) {  in dsp_dma_setup_common()
2696 		codec_dbg(codec, "write AUDCHSEL Reg fail\n");  in dsp_dma_setup_common()
2699 	codec_dbg(codec, "   dsp_dma_setup_common()    Write AUDCHSEL\n");  in dsp_dma_setup_common()
2701 	status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan),  in dsp_dma_setup_common()
2703 	if (status < 0) {  in dsp_dma_setup_common()
2704 		codec_dbg(codec, "write IRQCNT Reg fail\n");  in dsp_dma_setup_common()
2707 	codec_dbg(codec, "   dsp_dma_setup_common()    Write IRQCNT\n");  in dsp_dma_setup_common()
2709 	codec_dbg(codec,  in dsp_dma_setup_common()
2710 		   "ChipA=0x%x,DspA=0x%x,dmaCh=%u, "  in dsp_dma_setup_common()
2711 		   "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n",  in dsp_dma_setup_common()
2715 	codec_dbg(codec, "-- dsp_dma_setup_common() -- Complete ------\n");  in dsp_dma_setup_common()
2717 	return 0;  in dsp_dma_setup_common()
2721  * Setup the DSP DMA per-transfer-specific registers
2723 static int dsp_dma_setup(struct hda_codec *codec,  in dsp_dma_setup()  argument
2728 	int status = 0;  in dsp_dma_setup()
2735 	unsigned int dma_cfg = 0;  in dsp_dma_setup()
2736 	unsigned int adr_ofs = 0;  in dsp_dma_setup()
2737 	unsigned int xfr_cnt = 0;  in dsp_dma_setup()
2738 	const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT -  in dsp_dma_setup()
2741 	codec_dbg(codec, "-- dsp_dma_setup() -- Begin ---------\n");  in dsp_dma_setup()
2744 		codec_dbg(codec, "count too big\n");  in dsp_dma_setup()
2745 		return -EINVAL;  in dsp_dma_setup()
2750 		codec_dbg(codec, "invalid chip addr\n");  in dsp_dma_setup()
2751 		return -ENXIO;  in dsp_dma_setup()
2754 	codec_dbg(codec, "   dsp_dma_setup()    start reg pgm\n");  in dsp_dma_setup()
2757 	incr_field   = 0;  in dsp_dma_setup()
2768 	status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan),  in dsp_dma_setup()
2770 	if (status < 0) {  in dsp_dma_setup()
2771 		codec_dbg(codec, "write DMACFG Reg fail\n");  in dsp_dma_setup()
2774 	codec_dbg(codec, "   dsp_dma_setup()    Write DMACFG\n");  in dsp_dma_setup()
2776 	adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT +  in dsp_dma_setup()
2777 							(code ? 0 : 1));  in dsp_dma_setup()
2779 	status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan),  in dsp_dma_setup()
2781 	if (status < 0) {  in dsp_dma_setup()
2782 		codec_dbg(codec, "write DSPADROFS Reg fail\n");  in dsp_dma_setup()
2785 	codec_dbg(codec, "   dsp_dma_setup()    Write DSPADROFS\n");  in dsp_dma_setup()
2787 	base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT;  in dsp_dma_setup()
2789 	cur_cnt  = (count - 1) << DSPDMAC_XFRCNT_CCNT_LOBIT;  in dsp_dma_setup()
2793 	status = chipio_write(codec,  in dsp_dma_setup()
2795 	if (status < 0) {  in dsp_dma_setup()
2796 		codec_dbg(codec, "write XFRCNT Reg fail\n");  in dsp_dma_setup()
2799 	codec_dbg(codec, "   dsp_dma_setup()    Write XFRCNT\n");  in dsp_dma_setup()
2801 	codec_dbg(codec,  in dsp_dma_setup()
2802 		   "ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, "  in dsp_dma_setup()
2803 		   "ADROFS=0x%x, XFRCNT=0x%x\n",  in dsp_dma_setup()
2806 	codec_dbg(codec, "-- dsp_dma_setup() -- Complete ---------\n");  in dsp_dma_setup()
2808 	return 0;  in dsp_dma_setup()
2814 static int dsp_dma_start(struct hda_codec *codec,  in dsp_dma_start()  argument
2817 	unsigned int reg = 0;  in dsp_dma_start()
2818 	int status = 0;  in dsp_dma_start()
2820 	codec_dbg(codec, "-- dsp_dma_start() -- Begin ---------\n");  in dsp_dma_start()
2823 		status = chipio_read(codec,  in dsp_dma_start()
2826 		if (status < 0) {  in dsp_dma_start()
2827 			codec_dbg(codec, "read CHNLSTART reg fail\n");  in dsp_dma_start()
2830 		codec_dbg(codec, "-- dsp_dma_start()    Read CHNLSTART\n");  in dsp_dma_start()
2836 	status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,  in dsp_dma_start()
2838 	if (status < 0) {  in dsp_dma_start()
2839 		codec_dbg(codec, "write CHNLSTART reg fail\n");  in dsp_dma_start()
2842 	codec_dbg(codec, "-- dsp_dma_start() -- Complete ---------\n");  in dsp_dma_start()
2850 static int dsp_dma_stop(struct hda_codec *codec,  in dsp_dma_stop()  argument
2853 	unsigned int reg = 0;  in dsp_dma_stop()
2854 	int status = 0;  in dsp_dma_stop()
2856 	codec_dbg(codec, "-- dsp_dma_stop() -- Begin ---------\n");  in dsp_dma_stop()
2859 		status = chipio_read(codec,  in dsp_dma_stop()
2862 		if (status < 0) {  in dsp_dma_stop()
2863 			codec_dbg(codec, "read CHNLSTART reg fail\n");  in dsp_dma_stop()
2866 		codec_dbg(codec, "-- dsp_dma_stop()    Read CHNLSTART\n");  in dsp_dma_stop()
2871 	status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,  in dsp_dma_stop()
2873 	if (status < 0) {  in dsp_dma_stop()
2874 		codec_dbg(codec, "write CHNLSTART reg fail\n");  in dsp_dma_stop()
2877 	codec_dbg(codec, "-- dsp_dma_stop() -- Complete ---------\n");  in dsp_dma_stop()
2883  * dsp_allocate_router_ports - Allocate router ports
2885  * @codec: the HDA codec
2893 static int dsp_allocate_router_ports(struct hda_codec *codec,  in dsp_allocate_router_ports()  argument
2899 	int status = 0;  in dsp_allocate_router_ports()
2903 	status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);  in dsp_allocate_router_ports()
2904 	if (status < 0)  in dsp_allocate_router_ports()
2908 	val |= (ports_per_channel - 1) << 4;  in dsp_allocate_router_ports()
2909 	val |= num_chans - 1;  in dsp_allocate_router_ports()
2911 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in dsp_allocate_router_ports()
2915 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in dsp_allocate_router_ports()
2919 	status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);  in dsp_allocate_router_ports()
2920 	if (status < 0)  in dsp_allocate_router_ports()
2923 	res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,  in dsp_allocate_router_ports()
2924 				VENDOR_CHIPIO_PORT_ALLOC_GET, 0);  in dsp_allocate_router_ports()
2928 	return (res < 0) ? res : 0;  in dsp_allocate_router_ports()
2934 static int dsp_free_router_ports(struct hda_codec *codec)  in dsp_free_router_ports()  argument
2936 	int status = 0;  in dsp_free_router_ports()
2938 	status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);  in dsp_free_router_ports()
2939 	if (status < 0)  in dsp_free_router_ports()
2942 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in dsp_free_router_ports()
2946 	status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);  in dsp_free_router_ports()
2954 static int dsp_allocate_ports(struct hda_codec *codec,  in dsp_allocate_ports()  argument
2960 	codec_dbg(codec, "     dsp_allocate_ports() -- begin\n");  in dsp_allocate_ports()
2963 		codec_dbg(codec, "bad rate multiple\n");  in dsp_allocate_ports()
2964 		return -EINVAL;  in dsp_allocate_ports()
2967 	status = dsp_allocate_router_ports(codec, num_chans,  in dsp_allocate_ports()
2968 					   rate_multi, 0, port_map);  in dsp_allocate_ports()
2970 	codec_dbg(codec, "     dsp_allocate_ports() -- complete\n");  in dsp_allocate_ports()
2975 static int dsp_allocate_ports_format(struct hda_codec *codec,  in dsp_allocate_ports_format()  argument
2981 	unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1;  in dsp_allocate_ports_format()
2986 		codec_dbg(codec, "bad rate multiple\n");  in dsp_allocate_ports_format()
2987 		return -EINVAL;  in dsp_allocate_ports_format()
2992 	return dsp_allocate_ports(codec, num_chans, rate_multi, port_map);  in dsp_allocate_ports_format()
2998 static int dsp_free_ports(struct hda_codec *codec)  in dsp_free_ports()  argument
3002 	codec_dbg(codec, "     dsp_free_ports() -- begin\n");  in dsp_free_ports()
3004 	status = dsp_free_router_ports(codec);  in dsp_free_ports()
3005 	if (status < 0) {  in dsp_free_ports()
3006 		codec_dbg(codec, "free router ports fail\n");  in dsp_free_ports()
3009 	codec_dbg(codec, "     dsp_free_ports() -- complete\n");  in dsp_free_ports()
3018 	struct hda_codec *codec;  member
3026 	DMA_STATE_STOP  = 0,
3030 static int dma_convert_to_hda_format(struct hda_codec *codec,  in dma_convert_to_hda_format()  argument
3042 	return 0;  in dma_convert_to_hda_format()
3050 	struct hda_codec *codec = dma->codec;  in dma_reset()  local
3051 	struct ca0132_spec *spec = codec->spec;  in dma_reset()
3054 	if (dma->dmab->area)  in dma_reset()
3055 		snd_hda_codec_load_dsp_cleanup(codec, dma->dmab);  in dma_reset()
3057 	status = snd_hda_codec_load_dsp_prepare(codec,  in dma_reset()
3058 			dma->m_converter_format,  in dma_reset()
3059 			dma->buf_size,  in dma_reset()
3060 			dma->dmab);  in dma_reset()
3061 	if (status < 0)  in dma_reset()
3063 	spec->dsp_stream_id = status;  in dma_reset()
3064 	return 0;  in dma_reset()
3079 		return 0;  in dma_set_state()
3082 	snd_hda_codec_load_dsp_trigger(dma->codec, cmd);  in dma_set_state()
3083 	return 0;  in dma_set_state()
3088 	return dma->dmab->bytes;  in dma_get_buffer_size()
3093 	return dma->dmab->area;  in dma_get_buffer_addr()
3100 	memcpy(dma->dmab->area, data, count);  in dma_xfer()
3101 	return 0;  in dma_xfer()
3109 		*format = dma->m_converter_format;  in dma_get_converter_format()
3114 	struct ca0132_spec *spec = dma->codec->spec;  in dma_get_stream_id()
3116 	return spec->dsp_stream_id;  in dma_get_stream_id()
3126 static const u32 g_magic_value = 0x4c46584d;
3127 static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
3131 	return p->magic == g_magic_value;  in is_valid()
3136 	return g_chip_addr_magic_value == p->chip_addr;  in is_hci_prog_list_seg()
3141 	return p->count == 0;  in is_last()
3146 	return struct_size(p, data, p->count);  in dsp_sizeof()
3158 #define INVALID_DMA_CHANNEL (~0U)
3165 static int dspxfr_hci_write(struct hda_codec *codec,  in dspxfr_hci_write()  argument
3172 	if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value) {  in dspxfr_hci_write()
3173 		codec_dbg(codec, "hci_write invalid params\n");  in dspxfr_hci_write()
3174 		return -EINVAL;  in dspxfr_hci_write()
3177 	count = fls->count;  in dspxfr_hci_write()
3178 	data = (u32 *)(fls->data);  in dspxfr_hci_write()
3180 		status = chipio_write(codec, data[0], data[1]);  in dspxfr_hci_write()
3181 		if (status < 0) {  in dspxfr_hci_write()
3182 			codec_dbg(codec, "hci_write chipio failed\n");  in dspxfr_hci_write()
3185 		count -= 2;  in dspxfr_hci_write()
3188 	return 0;  in dspxfr_hci_write()
3192  * dspxfr_one_seg - Write a block of data into DSP code or data RAM using pre-allocated DMA engine.
3194  * @codec: the HDA codec
3196  * @reloc: Relocation address for loading single-segment overlays, or 0 for
3205 static int dspxfr_one_seg(struct hda_codec *codec,  in dspxfr_one_seg()  argument
3213 	int status = 0;  in dspxfr_one_seg()
3234 		return -EINVAL;  in dspxfr_one_seg()
3241 		codec_dbg(codec, "hci_write\n");  in dspxfr_one_seg()
3242 		return dspxfr_hci_write(codec, hci_write);  in dspxfr_one_seg()
3245 	if (fls == NULL || dma_engine == NULL || port_map_mask == 0) {  in dspxfr_one_seg()
3246 		codec_dbg(codec, "Invalid Params\n");  in dspxfr_one_seg()
3247 		return -EINVAL;  in dspxfr_one_seg()
3250 	data = fls->data;  in dspxfr_one_seg()
3251 	chip_addx = fls->chip_addr;  in dspxfr_one_seg()
3252 	words_to_write = fls->count;  in dspxfr_one_seg()
3255 		return hci_write ? dspxfr_hci_write(codec, hci_write) : 0;  in dspxfr_one_seg()
3257 		chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2);  in dspxfr_one_seg()
3262 		codec_dbg(codec, "Invalid chip_addx Params\n");  in dspxfr_one_seg()
3263 		return -EINVAL;  in dspxfr_one_seg()
3272 		codec_dbg(codec, "dma_engine buffer NULL\n");  in dspxfr_one_seg()
3273 		return -EINVAL;  in dspxfr_one_seg()
3277 	sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1;  in dspxfr_one_seg()
3281 	hda_frame_size_words = ((sample_rate_div == 0) ? 0 :  in dspxfr_one_seg()
3284 	if (hda_frame_size_words == 0) {  in dspxfr_one_seg()
3285 		codec_dbg(codec, "frmsz zero\n");  in dspxfr_one_seg()
3286 		return -EINVAL;  in dspxfr_one_seg()
3292 	buffer_size_words -= buffer_size_words % hda_frame_size_words;  in dspxfr_one_seg()
3293 	codec_dbg(codec,  in dspxfr_one_seg()
3294 		   "chpadr=0x%08x frmsz=%u nchan=%u "  in dspxfr_one_seg()
3300 		codec_dbg(codec, "dspxfr_one_seg:failed\n");  in dspxfr_one_seg()
3301 		return -EINVAL;  in dspxfr_one_seg()
3310 	words_to_write -= remainder_words;  in dspxfr_one_seg()
3312 	while (words_to_write != 0) {  in dspxfr_one_seg()
3314 		codec_dbg(codec, "dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n",  in dspxfr_one_seg()
3318 			status = dsp_dma_stop(codec, dma_chan, ovly);  in dspxfr_one_seg()
3319 			if (status < 0)  in dspxfr_one_seg()
3321 			status = dsp_dma_setup_common(codec, chip_addx,  in dspxfr_one_seg()
3323 			if (status < 0)  in dspxfr_one_seg()
3328 		status = dsp_dma_setup(codec, chip_addx,  in dspxfr_one_seg()
3330 		if (status < 0)  in dspxfr_one_seg()
3332 		status = dsp_dma_start(codec, dma_chan, ovly);  in dspxfr_one_seg()
3333 		if (status < 0)  in dspxfr_one_seg()
3335 		if (!dsp_is_dma_active(codec, dma_chan)) {  in dspxfr_one_seg()
3336 			codec_dbg(codec, "dspxfr:DMA did not start\n");  in dspxfr_one_seg()
3337 			return -EIO;  in dspxfr_one_seg()
3340 		if (status < 0)  in dspxfr_one_seg()
3342 		if (remainder_words != 0) {  in dspxfr_one_seg()
3343 			status = chipio_write_multiple(codec,  in dspxfr_one_seg()
3347 			if (status < 0)  in dspxfr_one_seg()
3349 			remainder_words = 0;  in dspxfr_one_seg()
3352 			status = dspxfr_hci_write(codec, hci_write);  in dspxfr_one_seg()
3353 			if (status < 0)  in dspxfr_one_seg()
3360 			dma_active = dsp_is_dma_active(codec, dma_chan);  in dspxfr_one_seg()
3368 		codec_dbg(codec, "+++++ DMA complete\n");  in dspxfr_one_seg()
3372 		if (status < 0)  in dspxfr_one_seg()
3377 		words_to_write -= run_size_words;  in dspxfr_one_seg()
3380 	if (remainder_words != 0) {  in dspxfr_one_seg()
3381 		status = chipio_write_multiple(codec, chip_addx_remainder,  in dspxfr_one_seg()
3389  * dspxfr_image - Write the entire DSP image of a DSP code/data overlay to DSP memories
3391  * @codec: the HDA codec
3393  * @reloc: Relocation address for loading single-segment overlays, or 0 for
3401 static int dspxfr_image(struct hda_codec *codec,  in dspxfr_image()  argument
3408 	struct ca0132_spec *spec = codec->spec;  in dspxfr_image()
3410 	unsigned short hda_format = 0;  in dspxfr_image()
3412 	unsigned char stream_id = 0;  in dspxfr_image()
3418 		return -EINVAL;  in dspxfr_image()
3422 		return -ENOMEM;  in dspxfr_image()
3424 	dma_engine->dmab = kzalloc(sizeof(*dma_engine->dmab), GFP_KERNEL);  in dspxfr_image()
3425 	if (!dma_engine->dmab) {  in dspxfr_image()
3427 		return -ENOMEM;  in dspxfr_image()
3430 	dma_engine->codec = codec;  in dspxfr_image()
3431 	dma_convert_to_hda_format(codec, sample_rate, channels, &hda_format);  in dspxfr_image()
3432 	dma_engine->m_converter_format = hda_format;  in dspxfr_image()
3433 	dma_engine->buf_size = (ovly ? DSP_DMA_WRITE_BUFLEN_OVLY :  in dspxfr_image()
3436 	dma_chan = ovly ? INVALID_DMA_CHANNEL : 0;  in dspxfr_image()
3438 	status = codec_set_converter_format(codec, WIDGET_CHIP_CTRL,  in dspxfr_image()
3441 	if (status < 0) {  in dspxfr_image()
3442 		codec_dbg(codec, "set converter format fail\n");  in dspxfr_image()
3446 	status = snd_hda_codec_load_dsp_prepare(codec,  in dspxfr_image()
3447 				dma_engine->m_converter_format,  in dspxfr_image()
3448 				dma_engine->buf_size,  in dspxfr_image()
3449 				dma_engine->dmab);  in dspxfr_image()
3450 	if (status < 0)  in dspxfr_image()
3452 	spec->dsp_stream_id = status;  in dspxfr_image()
3455 		status = dspio_alloc_dma_chan(codec, &dma_chan);  in dspxfr_image()
3456 		if (status < 0) {  in dspxfr_image()
3457 			codec_dbg(codec, "alloc dmachan fail\n");  in dspxfr_image()
3463 	port_map_mask = 0;  in dspxfr_image()
3464 	status = dsp_allocate_ports_format(codec, hda_format,  in dspxfr_image()
3466 	if (status < 0) {  in dspxfr_image()
3467 		codec_dbg(codec, "alloc ports fail\n");  in dspxfr_image()
3472 	status = codec_set_converter_stream_channel(codec,  in dspxfr_image()
3473 			WIDGET_CHIP_CTRL, stream_id, 0, &response);  in dspxfr_image()
3474 	if (status < 0) {  in dspxfr_image()
3475 		codec_dbg(codec, "set stream chan fail\n");  in dspxfr_image()
3481 			codec_dbg(codec, "FLS check fail\n");  in dspxfr_image()
3482 			status = -EINVAL;  in dspxfr_image()
3485 		status = dspxfr_one_seg(codec, fls_data, reloc,  in dspxfr_image()
3488 		if (status < 0)  in dspxfr_image()
3498 	if (port_map_mask != 0)  in dspxfr_image()
3499 		status = dsp_free_ports(codec);  in dspxfr_image()
3501 	if (status < 0)  in dspxfr_image()
3504 	status = codec_set_converter_stream_channel(codec,  in dspxfr_image()
3505 				WIDGET_CHIP_CTRL, 0, 0, &response);  in dspxfr_image()
3509 		dspio_free_dma_chan(codec, dma_chan);  in dspxfr_image()
3511 	if (dma_engine->dmab->area)  in dspxfr_image()
3512 		snd_hda_codec_load_dsp_cleanup(codec, dma_engine->dmab);  in dspxfr_image()
3513 	kfree(dma_engine->dmab);  in dspxfr_image()
3522 static void dspload_post_setup(struct hda_codec *codec)  in dspload_post_setup()  argument
3524 	struct ca0132_spec *spec = codec->spec;  in dspload_post_setup()
3525 	codec_dbg(codec, "---- dspload_post_setup ------\n");  in dspload_post_setup()
3528 		chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080);  in dspload_post_setup()
3529 		chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000);  in dspload_post_setup()
3532 		chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002);  in dspload_post_setup()
3537  * dspload_image - Download DSP from a DSP Image Fast Load structure.
3539  * @codec: the HDA codec
3542  * @reloc: Relocation address for loading single-segment overlays, or 0 for
3545  * @router_chans: number of audio router channels to be allocated (0 means use
3549  * linear, non-constant sized element array of structures, each of which
3554 static int dspload_image(struct hda_codec *codec,  in dspload_image()  argument
3561 	int status = 0;  in dspload_image()
3565 	codec_dbg(codec, "---- dspload_image begin ------\n");  in dspload_image()
3566 	if (router_chans == 0) {  in dspload_image()
3582 		codec_dbg(codec, "Ready to program DMA\n");  in dspload_image()
3584 			status = dsp_reset(codec);  in dspload_image()
3586 		if (status < 0)  in dspload_image()
3589 		codec_dbg(codec, "dsp_reset() complete\n");  in dspload_image()
3590 		status = dspxfr_image(codec, fls, reloc, sample_rate, channels,  in dspload_image()
3593 		if (status < 0)  in dspload_image()
3596 		codec_dbg(codec, "dspxfr_image() complete\n");  in dspload_image()
3598 			dspload_post_setup(codec);  in dspload_image()
3599 			status = dsp_set_run_state(codec);  in dspload_image()
3602 		codec_dbg(codec, "LOAD FINISHED\n");  in dspload_image()
3603 	} while (0);  in dspload_image()
3609 static bool dspload_is_loaded(struct hda_codec *codec)  in dspload_is_loaded()  argument
3611 	unsigned int data = 0;  in dspload_is_loaded()
3612 	int status = 0;  in dspload_is_loaded()
3614 	status = chipio_read(codec, 0x40004, &data);  in dspload_is_loaded()
3615 	if ((status < 0) || (data != 1))  in dspload_is_loaded()
3621 #define dspload_is_loaded(codec)	false  argument
3624 static bool dspload_wait_loaded(struct hda_codec *codec)  in dspload_wait_loaded()  argument
3629 		if (dspload_is_loaded(codec)) {  in dspload_wait_loaded()
3630 			codec_info(codec, "ca0132 DSP downloaded and running\n");  in dspload_wait_loaded()
3636 	codec_err(codec, "ca0132 failed to download DSP\n");  in dspload_wait_loaded()
3641  * ca0113 related functions. The ca0113 acts as the HDA bus for the pci-e
3647  * For cards with PCI-E region2 (Sound Blaster Z/ZxR, Recon3D, and AE-5)
3648  * the mmio address 0x320 is used to set GPIO pins. The format for the data
3651  * AE-5 note: The AE-5 seems to use pins 2 and 3 to somehow set the color value
3652  * of the on-card LED. It seems to use pin 2 for data, then toggles 3 to on and
3655 static void ca0113_mmio_gpio_set(struct hda_codec *codec, unsigned int gpio_pin,  in ca0113_mmio_gpio_set()  argument
3658 	struct ca0132_spec *spec = codec->spec;  in ca0113_mmio_gpio_set()
3661 	gpio_data = gpio_pin & 0xF;  in ca0113_mmio_gpio_set()
3662 	gpio_data |= ((enable << 8) & 0x100);  in ca0113_mmio_gpio_set()
3664 	writew(gpio_data, spec->mem_base + 0x320);  in ca0113_mmio_gpio_set()
3668  * Special pci region2 commands that are only used by the AE-5. They follow
3673  * target-id, and value.
3675 static void ca0113_mmio_command_set(struct hda_codec *codec, unsigned int group,  in ca0113_mmio_command_set()  argument
3678 	struct ca0132_spec *spec = codec->spec;  in ca0113_mmio_command_set()
3681 	writel(0x0000007e, spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3682 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3683 	writel(0x0000005a, spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3684 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3685 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3687 	writel(0x00800005, spec->mem_base + 0x20c);  in ca0113_mmio_command_set()
3688 	writel(group, spec->mem_base + 0x804);  in ca0113_mmio_command_set()
3690 	writel(0x00800005, spec->mem_base + 0x20c);  in ca0113_mmio_command_set()
3691 	write_val = (target & 0xff);  in ca0113_mmio_command_set()
3695 	writel(write_val, spec->mem_base + 0x204);  in ca0113_mmio_command_set()
3701 	readl(spec->mem_base + 0x860);  in ca0113_mmio_command_set()
3702 	readl(spec->mem_base + 0x854);  in ca0113_mmio_command_set()
3703 	readl(spec->mem_base + 0x840);  in ca0113_mmio_command_set()
3705 	writel(0x00800004, spec->mem_base + 0x20c);  in ca0113_mmio_command_set()
3706 	writel(0x00000000, spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3707 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3708 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set()
3714 static void ca0113_mmio_command_set_type2(struct hda_codec *codec,  in ca0113_mmio_command_set_type2()  argument
3717 	struct ca0132_spec *spec = codec->spec;  in ca0113_mmio_command_set_type2()
3720 	writel(0x0000007e, spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3721 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3722 	writel(0x0000005a, spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3723 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3724 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3726 	writel(0x00800003, spec->mem_base + 0x20c);  in ca0113_mmio_command_set_type2()
3727 	writel(group, spec->mem_base + 0x804);  in ca0113_mmio_command_set_type2()
3729 	writel(0x00800005, spec->mem_base + 0x20c);  in ca0113_mmio_command_set_type2()
3730 	write_val = (target & 0xff);  in ca0113_mmio_command_set_type2()
3734 	writel(write_val, spec->mem_base + 0x204);  in ca0113_mmio_command_set_type2()
3736 	readl(spec->mem_base + 0x860);  in ca0113_mmio_command_set_type2()
3737 	readl(spec->mem_base + 0x854);  in ca0113_mmio_command_set_type2()
3738 	readl(spec->mem_base + 0x840);  in ca0113_mmio_command_set_type2()
3740 	writel(0x00800004, spec->mem_base + 0x20c);  in ca0113_mmio_command_set_type2()
3741 	writel(0x00000000, spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3742 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3743 	readl(spec->mem_base + 0x210);  in ca0113_mmio_command_set_type2()
3754 static void ca0132_gpio_init(struct hda_codec *codec)  in ca0132_gpio_init()  argument
3756 	struct ca0132_spec *spec = codec->spec;  in ca0132_gpio_init()
3762 		snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);  in ca0132_gpio_init()
3763 		snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);  in ca0132_gpio_init()
3764 		snd_hda_codec_write(codec, 0x01, 0, 0x790, 0x23);  in ca0132_gpio_init()
3767 		snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);  in ca0132_gpio_init()
3768 		snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5B);  in ca0132_gpio_init()
3777 static void ca0132_gpio_setup(struct hda_codec *codec)  in ca0132_gpio_setup()  argument
3779 	struct ca0132_spec *spec = codec->spec;  in ca0132_gpio_setup()
3783 		snd_hda_codec_write(codec, 0x01, 0,  in ca0132_gpio_setup()
3784 				AC_VERB_SET_GPIO_DIRECTION, 0x07);  in ca0132_gpio_setup()
3785 		snd_hda_codec_write(codec, 0x01, 0,  in ca0132_gpio_setup()
3786 				AC_VERB_SET_GPIO_MASK, 0x07);  in ca0132_gpio_setup()
3787 		snd_hda_codec_write(codec, 0x01, 0,  in ca0132_gpio_setup()
3788 				AC_VERB_SET_GPIO_DATA, 0x04);  in ca0132_gpio_setup()
3789 		snd_hda_codec_write(codec, 0x01, 0,  in ca0132_gpio_setup()
3790 				AC_VERB_SET_GPIO_DATA, 0x06);  in ca0132_gpio_setup()
3793 		snd_hda_codec_write(codec, 0x01, 0,  in ca0132_gpio_setup()
3794 				AC_VERB_SET_GPIO_DIRECTION, 0x1E);  in ca0132_gpio_setup()
3795 		snd_hda_codec_write(codec, 0x01, 0,  in ca0132_gpio_setup()
3796 				AC_VERB_SET_GPIO_MASK, 0x1F);  in ca0132_gpio_setup()
3797 		snd_hda_codec_write(codec, 0x01, 0,  in ca0132_gpio_setup()
3798 				AC_VERB_SET_GPIO_DATA, 0x0C);  in ca0132_gpio_setup()
3810 	/* Bit 1 - Switch between front/rear mic. 0 = rear, 1 = front */
3812 	/* Bit 2 - Switch between headphone/line out. 0 = Headphone, 1 = Line */
3827 	/* Set GPIO bit 1 to 0 for rear mic */
3828 	R3DI_REAR_MIC = 0,
3834 	/* Set GPIO bit 2 to 0 for headphone */
3835 	R3DI_HEADPHONE_OUT = 0,
3841 	R3DI_DSP_DOWNLOADING = 0,
3847 static void r3di_gpio_mic_set(struct hda_codec *codec,  in r3di_gpio_mic_set()  argument
3853 	cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0);  in r3di_gpio_mic_set()
3863 	snd_hda_codec_write(codec, codec->core.afg, 0,  in r3di_gpio_mic_set()
3867 static void r3di_gpio_dsp_status_set(struct hda_codec *codec,  in r3di_gpio_dsp_status_set()  argument
3873 	cur_gpio = snd_hda_codec_read(codec, 0x01, 0, AC_VERB_GET_GPIO_DATA, 0);  in r3di_gpio_dsp_status_set()
3878 		snd_hda_codec_write(codec, codec->core.afg, 0,  in r3di_gpio_dsp_status_set()
3882 		/* Set DOWNLOADING bit to 0. */  in r3di_gpio_dsp_status_set()
3885 		snd_hda_codec_write(codec, codec->core.afg, 0,  in r3di_gpio_dsp_status_set()
3892 	snd_hda_codec_write(codec, codec->core.afg, 0,  in r3di_gpio_dsp_status_set()
3900 			struct hda_codec *codec,  in ca0132_playback_pcm_prepare()  argument
3905 	struct ca0132_spec *spec = codec->spec;  in ca0132_playback_pcm_prepare()
3907 	snd_hda_codec_setup_stream(codec, spec->dacs[0], stream_tag, 0, format);  in ca0132_playback_pcm_prepare()
3909 	return 0;  in ca0132_playback_pcm_prepare()
3913 			struct hda_codec *codec,  in ca0132_playback_pcm_cleanup()  argument
3916 	struct ca0132_spec *spec = codec->spec;  in ca0132_playback_pcm_cleanup()
3918 	if (spec->dsp_state == DSP_DOWNLOADING)  in ca0132_playback_pcm_cleanup()
3919 		return 0;  in ca0132_playback_pcm_cleanup()
3923 	if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID])  in ca0132_playback_pcm_cleanup()
3926 	snd_hda_codec_cleanup_stream(codec, spec->dacs[0]);  in ca0132_playback_pcm_cleanup()
3928 	return 0;  in ca0132_playback_pcm_cleanup()
3932 			struct hda_codec *codec,  in ca0132_playback_pcm_delay()  argument
3935 	struct ca0132_spec *spec = codec->spec;  in ca0132_playback_pcm_delay()
3937 	struct snd_pcm_runtime *runtime = substream->runtime;  in ca0132_playback_pcm_delay()
3939 	if (spec->dsp_state != DSP_DOWNLOADED)  in ca0132_playback_pcm_delay()
3940 		return 0;  in ca0132_playback_pcm_delay()
3943 	if (spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) {  in ca0132_playback_pcm_delay()
3944 		if ((spec->effects_switch[SURROUND - EFFECT_START_NID]) ||  in ca0132_playback_pcm_delay()
3945 		    (spec->effects_switch[DIALOG_PLUS - EFFECT_START_NID]))  in ca0132_playback_pcm_delay()
3950 	if (spec->cur_out_type == SPEAKER_OUT)  in ca0132_playback_pcm_delay()
3953 	return (latency * runtime->rate) / 1000;  in ca0132_playback_pcm_delay()
3960 					struct hda_codec *codec,  in ca0132_dig_playback_pcm_open()  argument
3963 	struct ca0132_spec *spec = codec->spec;  in ca0132_dig_playback_pcm_open()
3964 	return snd_hda_multi_out_dig_open(codec, &spec->multiout);  in ca0132_dig_playback_pcm_open()
3968 			struct hda_codec *codec,  in ca0132_dig_playback_pcm_prepare()  argument
3973 	struct ca0132_spec *spec = codec->spec;  in ca0132_dig_playback_pcm_prepare()
3974 	return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,  in ca0132_dig_playback_pcm_prepare()
3979 			struct hda_codec *codec,  in ca0132_dig_playback_pcm_cleanup()  argument
3982 	struct ca0132_spec *spec = codec->spec;  in ca0132_dig_playback_pcm_cleanup()
3983 	return snd_hda_multi_out_dig_cleanup(codec, &spec->multiout);  in ca0132_dig_playback_pcm_cleanup()
3987 					 struct hda_codec *codec,  in ca0132_dig_playback_pcm_close()  argument
3990 	struct ca0132_spec *spec = codec->spec;  in ca0132_dig_playback_pcm_close()
3991 	return snd_hda_multi_out_dig_close(codec, &spec->multiout);  in ca0132_dig_playback_pcm_close()
3998 					struct hda_codec *codec,  in ca0132_capture_pcm_prepare()  argument
4003 	snd_hda_codec_setup_stream(codec, hinfo->nid,  in ca0132_capture_pcm_prepare()
4004 				   stream_tag, 0, format);  in ca0132_capture_pcm_prepare()
4006 	return 0;  in ca0132_capture_pcm_prepare()
4010 			struct hda_codec *codec,  in ca0132_capture_pcm_cleanup()  argument
4013 	struct ca0132_spec *spec = codec->spec;  in ca0132_capture_pcm_cleanup()
4015 	if (spec->dsp_state == DSP_DOWNLOADING)  in ca0132_capture_pcm_cleanup()
4016 		return 0;  in ca0132_capture_pcm_cleanup()
4018 	snd_hda_codec_cleanup_stream(codec, hinfo->nid);  in ca0132_capture_pcm_cleanup()
4019 	return 0;  in ca0132_capture_pcm_cleanup()
4023 			struct hda_codec *codec,  in ca0132_capture_pcm_delay()  argument
4026 	struct ca0132_spec *spec = codec->spec;  in ca0132_capture_pcm_delay()
4028 	struct snd_pcm_runtime *runtime = substream->runtime;  in ca0132_capture_pcm_delay()
4030 	if (spec->dsp_state != DSP_DOWNLOADED)  in ca0132_capture_pcm_delay()
4031 		return 0;  in ca0132_capture_pcm_delay()
4033 	if (spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID])  in ca0132_capture_pcm_delay()
4036 	return (latency * runtime->rate) / 1000;  in ca0132_capture_pcm_delay()
4057 	  .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4075 	  .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4084 	  .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
4100  * values -90 to 9. -90 is the lowest decibel value for both the ADC's and the
4104 0xC2B40000, 0xC2B20000, 0xC2B00000, 0xC2AE0000, 0xC2AC0000, 0xC2AA0000,
4105 0xC2A80000, 0xC2A60000, 0xC2A40000, 0xC2A20000, 0xC2A00000, 0xC29E0000,
4106 0xC29C0000, 0xC29A0000, 0xC2980000, 0xC2960000, 0xC2940000, 0xC2920000,
4107 0xC2900000, 0xC28E0000, 0xC28C0000, 0xC28A0000, 0xC2880000, 0xC2860000,
4108 0xC2840000, 0xC2820000, 0xC2800000, 0xC27C0000, 0xC2780000, 0xC2740000,
4109 0xC2700000, 0xC26C0000, 0xC2680000, 0xC2640000, 0xC2600000, 0xC25C0000,
4110 0xC2580000, 0xC2540000, 0xC2500000, 0xC24C0000, 0xC2480000, 0xC2440000,
4111 0xC2400000, 0xC23C0000, 0xC2380000, 0xC2340000, 0xC2300000, 0xC22C0000,
4112 0xC2280000, 0xC2240000, 0xC2200000, 0xC21C0000, 0xC2180000, 0xC2140000,
4113 0xC2100000, 0xC20C0000, 0xC2080000, 0xC2040000, 0xC2000000, 0xC1F80000,
4114 0xC1F00000, 0xC1E80000, 0xC1E00000, 0xC1D80000, 0xC1D00000, 0xC1C80000,
4115 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4116 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4117 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4118 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4119 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4120 0x40C00000, 0x40E00000, 0x41000000, 0x41100000
4124  * This table counts from float 0 to 1 in increments of .01, which is
4128 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4129 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4130 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4131 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4132 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4133 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4134 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4135 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4136 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4137 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4138 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4139 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4140 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4141 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4142 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4143 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4144 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4148  * This table counts from float 10 to 1000, which is the range of the x-bass
4152 0x41200000, 0x41A00000, 0x41F00000, 0x42200000, 0x42480000, 0x42700000,
4153 0x428C0000, 0x42A00000, 0x42B40000, 0x42C80000, 0x42DC0000, 0x42F00000,
4154 0x43020000, 0x430C0000, 0x43160000, 0x43200000, 0x432A0000, 0x43340000,
4155 0x433E0000, 0x43480000, 0x43520000, 0x435C0000, 0x43660000, 0x43700000,
4156 0x437A0000, 0x43820000, 0x43870000, 0x438C0000, 0x43910000, 0x43960000,
4157 0x439B0000, 0x43A00000, 0x43A50000, 0x43AA0000, 0x43AF0000, 0x43B40000,
4158 0x43B90000, 0x43BE0000, 0x43C30000, 0x43C80000, 0x43CD0000, 0x43D20000,
4159 0x43D70000, 0x43DC0000, 0x43E10000, 0x43E60000, 0x43EB0000, 0x43F00000,
4160 0x43F50000, 0x43FA0000, 0x43FF0000, 0x44020000, 0x44048000, 0x44070000,
4161 0x44098000, 0x440C0000, 0x440E8000, 0x44110000, 0x44138000, 0x44160000,
4162 0x44188000, 0x441B0000, 0x441D8000, 0x44200000, 0x44228000, 0x44250000,
4163 0x44278000, 0x442A0000, 0x442C8000, 0x442F0000, 0x44318000, 0x44340000,
4164 0x44368000, 0x44390000, 0x443B8000, 0x443E0000, 0x44408000, 0x44430000,
4165 0x44458000, 0x44480000, 0x444A8000, 0x444D0000, 0x444F8000, 0x44520000,
4166 0x44548000, 0x44570000, 0x44598000, 0x445C0000, 0x445E8000, 0x44610000,
4167 0x44638000, 0x44660000, 0x44688000, 0x446B0000, 0x446D8000, 0x44700000,
4168 0x44728000, 0x44750000, 0x44778000, 0x447A0000
4175 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000, 0x41C00000, 0x41C80000,
4176 0x41D00000, 0x41D80000, 0x41E00000, 0x41E80000, 0x41F00000, 0x41F80000,
4177 0x42000000, 0x42040000, 0x42080000, 0x420C0000, 0x42100000, 0x42140000,
4178 0x42180000, 0x421C0000, 0x42200000, 0x42240000, 0x42280000, 0x422C0000,
4179 0x42300000, 0x42340000, 0x42380000, 0x423C0000, 0x42400000, 0x42440000,
4180 0x42480000, 0x424C0000, 0x42500000, 0x42540000, 0x42580000, 0x425C0000,
4181 0x42600000, 0x42640000, 0x42680000, 0x426C0000, 0x42700000, 0x42740000,
4182 0x42780000, 0x427C0000, 0x42800000, 0x42820000, 0x42840000, 0x42860000,
4183 0x42880000, 0x428A0000, 0x428C0000, 0x428E0000, 0x42900000, 0x42920000,
4184 0x42940000, 0x42960000, 0x42980000, 0x429A0000, 0x429C0000, 0x429E0000,
4185 0x42A00000, 0x42A20000, 0x42A40000, 0x42A60000, 0x42A80000, 0x42AA0000,
4186 0x42AC0000, 0x42AE0000, 0x42B00000, 0x42B20000, 0x42B40000, 0x42B60000,
4187 0x42B80000, 0x42BA0000, 0x42BC0000, 0x42BE0000, 0x42C00000, 0x42C20000,
4188 0x42C40000, 0x42C60000, 0x42C80000, 0x42CA0000, 0x42CC0000, 0x42CE0000,
4189 0x42D00000, 0x42D20000, 0x42D40000, 0x42D60000, 0x42D80000, 0x42DA0000,
4190 0x42DC0000, 0x42DE0000, 0x42E00000, 0x42E20000, 0x42E40000, 0x42E60000,
4191 0x42E80000, 0x42EA0000, 0x42EC0000, 0x42EE0000, 0x42F00000, 0x42F20000,
4192 0x42F40000, 0x42F60000, 0x42F80000, 0x42FA0000, 0x42FC0000, 0x42FE0000,
4193 0x43000000, 0x43010000, 0x43020000, 0x43030000, 0x43040000, 0x43050000,
4194 0x43060000, 0x43070000, 0x43080000, 0x43090000, 0x430A0000, 0x430B0000,
4195 0x430C0000, 0x430D0000, 0x430E0000, 0x430F0000, 0x43100000, 0x43110000,
4196 0x43120000, 0x43130000, 0x43140000, 0x43150000, 0x43160000, 0x43170000,
4197 0x43180000, 0x43190000, 0x431A0000, 0x431B0000, 0x431C0000, 0x431D0000,
4198 0x431E0000, 0x431F0000, 0x43200000, 0x43210000, 0x43220000, 0x43230000,
4199 0x43240000, 0x43250000, 0x43260000, 0x43270000, 0x43280000, 0x43290000,
4200 0x432A0000, 0x432B0000, 0x432C0000, 0x432D0000, 0x432E0000, 0x432F0000,
4201 0x43300000, 0x43310000, 0x43320000, 0x43330000, 0x43340000
4205 0x00000000, 0x3C23D70A, 0x3CA3D70A, 0x3CF5C28F, 0x3D23D70A, 0x3D4CCCCD,
4206 0x3D75C28F, 0x3D8F5C29, 0x3DA3D70A, 0x3DB851EC, 0x3DCCCCCD, 0x3DE147AE,
4207 0x3DF5C28F, 0x3E051EB8, 0x3E0F5C29, 0x3E19999A, 0x3E23D70A, 0x3E2E147B,
4208 0x3E3851EC, 0x3E428F5C, 0x3E4CCCCD, 0x3E570A3D, 0x3E6147AE, 0x3E6B851F,
4209 0x3E75C28F, 0x3E800000, 0x3E851EB8, 0x3E8A3D71, 0x3E8F5C29, 0x3E947AE1,
4210 0x3E99999A, 0x3E9EB852, 0x3EA3D70A, 0x3EA8F5C3, 0x3EAE147B, 0x3EB33333,
4211 0x3EB851EC, 0x3EBD70A4, 0x3EC28F5C, 0x3EC7AE14, 0x3ECCCCCD, 0x3ED1EB85,
4212 0x3ED70A3D, 0x3EDC28F6, 0x3EE147AE, 0x3EE66666, 0x3EEB851F, 0x3EF0A3D7,
4213 0x3EF5C28F, 0x3EFAE148, 0x3F000000, 0x3F028F5C, 0x3F051EB8, 0x3F07AE14,
4214 0x3F0A3D71, 0x3F0CCCCD, 0x3F0F5C29, 0x3F11EB85, 0x3F147AE1, 0x3F170A3D,
4215 0x3F19999A, 0x3F1C28F6, 0x3F1EB852, 0x3F2147AE, 0x3F23D70A, 0x3F266666,
4216 0x3F28F5C3, 0x3F2B851F, 0x3F2E147B, 0x3F30A3D7, 0x3F333333, 0x3F35C28F,
4217 0x3F3851EC, 0x3F3AE148, 0x3F3D70A4, 0x3F400000, 0x3F428F5C, 0x3F451EB8,
4218 0x3F47AE14, 0x3F4A3D71, 0x3F4CCCCD, 0x3F4F5C29, 0x3F51EB85, 0x3F547AE1,
4219 0x3F570A3D, 0x3F59999A, 0x3F5C28F6, 0x3F5EB852, 0x3F6147AE, 0x3F63D70A,
4220 0x3F666666, 0x3F68F5C3, 0x3F6B851F, 0x3F6E147B, 0x3F70A3D7, 0x3F733333,
4221 0x3F75C28F, 0x3F7851EC, 0x3F7AE148, 0x3F7D70A4, 0x3F800000
4225 0xC1C00000, 0xC1B80000, 0xC1B00000, 0xC1A80000, 0xC1A00000, 0xC1980000,
4226 0xC1900000, 0xC1880000, 0xC1800000, 0xC1700000, 0xC1600000, 0xC1500000,
4227 0xC1400000, 0xC1300000, 0xC1200000, 0xC1100000, 0xC1000000, 0xC0E00000,
4228 0xC0C00000, 0xC0A00000, 0xC0800000, 0xC0400000, 0xC0000000, 0xBF800000,
4229 0x00000000, 0x3F800000, 0x40000000, 0x40400000, 0x40800000, 0x40A00000,
4230 0x40C00000, 0x40E00000, 0x41000000, 0x41100000, 0x41200000, 0x41300000,
4231 0x41400000, 0x41500000, 0x41600000, 0x41700000, 0x41800000, 0x41880000,
4232 0x41900000, 0x41980000, 0x41A00000, 0x41A80000, 0x41B00000, 0x41B80000,
4233 0x41C00000
4236 static int tuning_ctl_set(struct hda_codec *codec, hda_nid_t nid,  in tuning_ctl_set()  argument
4239 	int i = 0;  in tuning_ctl_set()
4241 	for (i = 0; i < TUNING_CTLS_COUNT; i++)  in tuning_ctl_set()
4245 	return -EINVAL;  in tuning_ctl_set()
4247 	snd_hda_power_up(codec);  in tuning_ctl_set()
4248 	dspio_set_param(codec, ca0132_tuning_ctls[i].mid, 0x20,  in tuning_ctl_set()
4251 	snd_hda_power_down(codec);  in tuning_ctl_set()
4259 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in tuning_ctl_get()  local
4260 	struct ca0132_spec *spec = codec->spec;  in tuning_ctl_get()
4262 	long *valp = ucontrol->value.integer.value;  in tuning_ctl_get()
4263 	int idx = nid - TUNING_CTL_START_NID;  in tuning_ctl_get()
4265 	*valp = spec->cur_ctl_vals[idx];  in tuning_ctl_get()
4266 	return 0;  in tuning_ctl_get()
4273 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;  in voice_focus_ctl_info()
4274 	uinfo->count = chs == 3 ? 2 : 1;  in voice_focus_ctl_info()
4275 	uinfo->value.integer.min = 20;  in voice_focus_ctl_info()
4276 	uinfo->value.integer.max = 180;  in voice_focus_ctl_info()
4277 	uinfo->value.integer.step = 1;  in voice_focus_ctl_info()
4279 	return 0;  in voice_focus_ctl_info()
4285 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in voice_focus_ctl_put()  local
4286 	struct ca0132_spec *spec = codec->spec;  in voice_focus_ctl_put()
4288 	long *valp = ucontrol->value.integer.value;  in voice_focus_ctl_put()
4291 	idx = nid - TUNING_CTL_START_NID;  in voice_focus_ctl_put()
4293 	if (spec->cur_ctl_vals[idx] == *valp)  in voice_focus_ctl_put()
4294 		return 0;  in voice_focus_ctl_put()
4296 	spec->cur_ctl_vals[idx] = *valp;  in voice_focus_ctl_put()
4298 	idx = *valp - 20;  in voice_focus_ctl_put()
4299 	tuning_ctl_set(codec, nid, voice_focus_vals_lookup, idx);  in voice_focus_ctl_put()
4308 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;  in mic_svm_ctl_info()
4309 	uinfo->count = chs == 3 ? 2 : 1;  in mic_svm_ctl_info()
4310 	uinfo->value.integer.min = 0;  in mic_svm_ctl_info()
4311 	uinfo->value.integer.max = 100;  in mic_svm_ctl_info()
4312 	uinfo->value.integer.step = 1;  in mic_svm_ctl_info()
4314 	return 0;  in mic_svm_ctl_info()
4320 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in mic_svm_ctl_put()  local
4321 	struct ca0132_spec *spec = codec->spec;  in mic_svm_ctl_put()
4323 	long *valp = ucontrol->value.integer.value;  in mic_svm_ctl_put()
4326 	idx = nid - TUNING_CTL_START_NID;  in mic_svm_ctl_put()
4328 	if (spec->cur_ctl_vals[idx] == *valp)  in mic_svm_ctl_put()
4329 		return 0;  in mic_svm_ctl_put()
4331 	spec->cur_ctl_vals[idx] = *valp;  in mic_svm_ctl_put()
4334 	tuning_ctl_set(codec, nid, mic_svm_vals_lookup, idx);  in mic_svm_ctl_put()
4336 	return 0;  in mic_svm_ctl_put()
4343 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;  in equalizer_ctl_info()
4344 	uinfo->count = chs == 3 ? 2 : 1;  in equalizer_ctl_info()
4345 	uinfo->value.integer.min = 0;  in equalizer_ctl_info()
4346 	uinfo->value.integer.max = 48;  in equalizer_ctl_info()
4347 	uinfo->value.integer.step = 1;  in equalizer_ctl_info()
4349 	return 0;  in equalizer_ctl_info()
4355 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in equalizer_ctl_put()  local
4356 	struct ca0132_spec *spec = codec->spec;  in equalizer_ctl_put()
4358 	long *valp = ucontrol->value.integer.value;  in equalizer_ctl_put()
4361 	idx = nid - TUNING_CTL_START_NID;  in equalizer_ctl_put()
4363 	if (spec->cur_ctl_vals[idx] == *valp)  in equalizer_ctl_put()
4364 		return 0;  in equalizer_ctl_put()
4366 	spec->cur_ctl_vals[idx] = *valp;  in equalizer_ctl_put()
4369 	tuning_ctl_set(codec, nid, equalizer_vals_lookup, idx);  in equalizer_ctl_put()
4374 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(voice_focus_db_scale, 2000, 100, 0);
4375 static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(eq_db_scale, -2400, 100, 0);
4377 static int add_tuning_control(struct hda_codec *codec,  in add_tuning_control()  argument
4384 		HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type);  in add_tuning_control()
4388 	knew.tlv.c = 0;  in add_tuning_control()
4389 	knew.tlv.p = 0;  in add_tuning_control()
4409 		return 0;  in add_tuning_control()
4412 		HDA_COMPOSE_AMP_VAL(nid, 1, 0, type);  in add_tuning_control()
4414 	return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));  in add_tuning_control()
4417 static int add_tuning_ctls(struct hda_codec *codec)  in add_tuning_ctls()  argument
4422 	for (i = 0; i < TUNING_CTLS_COUNT; i++) {  in add_tuning_ctls()
4423 		err = add_tuning_control(codec,  in add_tuning_ctls()
4428 		if (err < 0)  in add_tuning_ctls()
4432 	return 0;  in add_tuning_ctls()
4435 static void ca0132_init_tuning_defaults(struct hda_codec *codec)  in ca0132_init_tuning_defaults()  argument
4437 	struct ca0132_spec *spec = codec->spec;  in ca0132_init_tuning_defaults()
4440 	/* Wedge Angle defaults to 30.  10 below is 30 - 20.  20 is min. */  in ca0132_init_tuning_defaults()
4441 	spec->cur_ctl_vals[WEDGE_ANGLE - TUNING_CTL_START_NID] = 10;  in ca0132_init_tuning_defaults()
4443 	spec->cur_ctl_vals[SVM_LEVEL - TUNING_CTL_START_NID] = 74;  in ca0132_init_tuning_defaults()
4445 	/* EQ defaults to 0dB. */  in ca0132_init_tuning_defaults()
4447 		spec->cur_ctl_vals[i] = 24;  in ca0132_init_tuning_defaults()
4454  * If jack inserted, headphone will be selected, else built-in speakers
4457 static int ca0132_select_out(struct hda_codec *codec)  in ca0132_select_out()  argument
4459 	struct ca0132_spec *spec = codec->spec;  in ca0132_select_out()
4466 	codec_dbg(codec, "ca0132_select_out\n");  in ca0132_select_out()
4468 	snd_hda_power_up_pm(codec);  in ca0132_select_out()
4470 	auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID];  in ca0132_select_out()
4473 		jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp);  in ca0132_select_out()
4476 			spec->vnode_lswitch[VNID_HP_SEL - VNODE_START_NID];  in ca0132_select_out()
4479 		spec->cur_out_type = HEADPHONE_OUT;  in ca0132_select_out()
4481 		spec->cur_out_type = SPEAKER_OUT;  in ca0132_select_out()
4483 	if (spec->cur_out_type == SPEAKER_OUT) {  in ca0132_select_out()
4484 		codec_dbg(codec, "ca0132_select_out speaker\n");  in ca0132_select_out()
4487 		err = dspio_set_uint_param(codec, 0x80, 0x04, tmp);  in ca0132_select_out()
4488 		if (err < 0)  in ca0132_select_out()
4492 		err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp);  in ca0132_select_out()
4493 		if (err < 0)  in ca0132_select_out()
4497 		snd_hda_codec_write(codec, spec->out_pins[1], 0,  in ca0132_select_out()
4498 				    VENDOR_CHIPIO_EAPD_SEL_SET, 0x02);  in ca0132_select_out()
4499 		snd_hda_codec_write(codec, spec->out_pins[0], 0,  in ca0132_select_out()
4500 				    AC_VERB_SET_EAPD_BTLENABLE, 0x00);  in ca0132_select_out()
4501 		snd_hda_codec_write(codec, spec->out_pins[0], 0,  in ca0132_select_out()
4502 				    VENDOR_CHIPIO_EAPD_SEL_SET, 0x00);  in ca0132_select_out()
4503 		snd_hda_codec_write(codec, spec->out_pins[0], 0,  in ca0132_select_out()
4504 				    AC_VERB_SET_EAPD_BTLENABLE, 0x02);  in ca0132_select_out()
4507 		pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,  in ca0132_select_out()
4508 					AC_VERB_GET_PIN_WIDGET_CONTROL, 0);  in ca0132_select_out()
4509 		snd_hda_set_pin_ctl(codec, spec->out_pins[1],  in ca0132_select_out()
4512 		pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,  in ca0132_select_out()
4513 				AC_VERB_GET_PIN_WIDGET_CONTROL, 0);  in ca0132_select_out()
4514 		snd_hda_set_pin_ctl(codec, spec->out_pins[0],  in ca0132_select_out()
4517 		codec_dbg(codec, "ca0132_select_out hp\n");  in ca0132_select_out()
4520 		err = dspio_set_uint_param(codec, 0x80, 0x04, tmp);  in ca0132_select_out()
4521 		if (err < 0)  in ca0132_select_out()
4525 		err = dspio_set_uint_param(codec, 0x8f, 0x00, tmp);  in ca0132_select_out()
4526 		if (err < 0)  in ca0132_select_out()
4530 		snd_hda_codec_write(codec, spec->out_pins[0], 0,  in ca0132_select_out()
4531 				    VENDOR_CHIPIO_EAPD_SEL_SET, 0x00);  in ca0132_select_out()
4532 		snd_hda_codec_write(codec, spec->out_pins[0], 0,  in ca0132_select_out()
4533 				    AC_VERB_SET_EAPD_BTLENABLE, 0x00);  in ca0132_select_out()
4534 		snd_hda_codec_write(codec, spec->out_pins[1], 0,  in ca0132_select_out()
4535 				    VENDOR_CHIPIO_EAPD_SEL_SET, 0x02);  in ca0132_select_out()
4536 		snd_hda_codec_write(codec, spec->out_pins[0], 0,  in ca0132_select_out()
4537 				    AC_VERB_SET_EAPD_BTLENABLE, 0x02);  in ca0132_select_out()
4540 		pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,  in ca0132_select_out()
4541 					AC_VERB_GET_PIN_WIDGET_CONTROL, 0);  in ca0132_select_out()
4542 		snd_hda_set_pin_ctl(codec, spec->out_pins[0],  in ca0132_select_out()
4545 		pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,  in ca0132_select_out()
4546 					AC_VERB_GET_PIN_WIDGET_CONTROL, 0);  in ca0132_select_out()
4547 		snd_hda_set_pin_ctl(codec, spec->out_pins[1],  in ca0132_select_out()
4552 	snd_hda_power_down_pm(codec);  in ca0132_select_out()
4554 	return err < 0 ? err : 0;  in ca0132_select_out()
4557 static int ae5_headphone_gain_set(struct hda_codec *codec, long val);
4558 static int zxr_headphone_gain_set(struct hda_codec *codec, long val);
4559 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val);
4561 static void ae5_mmio_select_out(struct hda_codec *codec)  in ae5_mmio_select_out()  argument
4563 	struct ca0132_spec *spec = codec->spec;  in ae5_mmio_select_out()
4572 	for (i = 0; i < AE_CA0113_OUT_SET_COMMANDS; i++)  in ae5_mmio_select_out()
4573 		ca0113_mmio_command_set(codec, out_cmds->group[i],  in ae5_mmio_select_out()
4574 				out_cmds->target[i],  in ae5_mmio_select_out()
4575 				out_cmds->vals[spec->cur_out_type][i]);  in ae5_mmio_select_out()
4578 static int ca0132_alt_set_full_range_speaker(struct hda_codec *codec)  in ca0132_alt_set_full_range_speaker()  argument
4580 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_set_full_range_speaker()
4585 	/* 2.0/4.0 setup has no LFE channel, so setting full-range does nothing. */  in ca0132_alt_set_full_range_speaker()
4586 	if (spec->channel_cfg_val == SPEAKER_CHANNELS_4_0  in ca0132_alt_set_full_range_speaker()
4587 			|| spec->channel_cfg_val == SPEAKER_CHANNELS_2_0)  in ca0132_alt_set_full_range_speaker()
4588 		return 0;  in ca0132_alt_set_full_range_speaker()
4590 	/* Set front L/R full range. Zero for full-range, one for redirection. */  in ca0132_alt_set_full_range_speaker()
4591 	tmp = spec->speaker_range_val[0] ? FLOAT_ZERO : FLOAT_ONE;  in ca0132_alt_set_full_range_speaker()
4592 	err = dspio_set_uint_param(codec, 0x96,  in ca0132_alt_set_full_range_speaker()
4594 	if (err < 0)  in ca0132_alt_set_full_range_speaker()
4597 	/* When setting full-range rear, both rear and center/lfe are set. */  in ca0132_alt_set_full_range_speaker()
4598 	tmp = spec->speaker_range_val[1] ? FLOAT_ZERO : FLOAT_ONE;  in ca0132_alt_set_full_range_speaker()
4599 	err = dspio_set_uint_param(codec, 0x96,  in ca0132_alt_set_full_range_speaker()
4601 	if (err < 0)  in ca0132_alt_set_full_range_speaker()
4604 	err = dspio_set_uint_param(codec, 0x96,  in ca0132_alt_set_full_range_speaker()
4606 	if (err < 0)  in ca0132_alt_set_full_range_speaker()
4610 	 * Only the AE series cards set this value when setting full-range,  in ca0132_alt_set_full_range_speaker()
4614 		err = dspio_set_uint_param(codec, 0x96,  in ca0132_alt_set_full_range_speaker()
4616 		if (err < 0)  in ca0132_alt_set_full_range_speaker()
4620 	return 0;  in ca0132_alt_set_full_range_speaker()
4623 static int ca0132_alt_surround_set_bass_redirection(struct hda_codec *codec,  in ca0132_alt_surround_set_bass_redirection()  argument
4626 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_surround_set_bass_redirection()
4630 	if (val && spec->channel_cfg_val != SPEAKER_CHANNELS_4_0 &&  in ca0132_alt_surround_set_bass_redirection()
4631 			spec->channel_cfg_val != SPEAKER_CHANNELS_2_0)  in ca0132_alt_surround_set_bass_redirection()
4636 	err = dspio_set_uint_param(codec, 0x96, SPEAKER_BASS_REDIRECT, tmp);  in ca0132_alt_surround_set_bass_redirection()
4637 	if (err < 0)  in ca0132_alt_surround_set_bass_redirection()
4642 		tmp = float_xbass_xover_lookup[spec->xbass_xover_freq];  in ca0132_alt_surround_set_bass_redirection()
4643 		err = dspio_set_uint_param(codec, 0x96,  in ca0132_alt_surround_set_bass_redirection()
4645 		if (err < 0)  in ca0132_alt_surround_set_bass_redirection()
4649 	return 0;  in ca0132_alt_surround_set_bass_redirection()
4656 static void ca0132_alt_select_out_get_quirk_data(struct hda_codec *codec,  in ca0132_alt_select_out_get_quirk_data()  argument
4659 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_select_out_get_quirk_data()
4664 	for (i = 0; i < ARRAY_SIZE(quirk_out_set_data); i++) {  in ca0132_alt_select_out_get_quirk_data()
4672 static int ca0132_alt_select_out_quirk_set(struct hda_codec *codec)  in ca0132_alt_select_out_quirk_set()  argument
4676 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_select_out_quirk_set()
4680 	ca0132_alt_select_out_get_quirk_data(codec, &quirk_data);  in ca0132_alt_select_out_quirk_set()
4682 		return 0;  in ca0132_alt_select_out_quirk_set()
4684 	out_info = &quirk_data->out_set_info[spec->cur_out_type];  in ca0132_alt_select_out_quirk_set()
4685 	if (quirk_data->is_ae_series)  in ca0132_alt_select_out_quirk_set()
4686 		ae5_mmio_select_out(codec);  in ca0132_alt_select_out_quirk_set()
4688 	if (out_info->has_hda_gpio) {  in ca0132_alt_select_out_quirk_set()
4689 		gpio_data = snd_hda_codec_read(codec, codec->core.afg, 0,  in ca0132_alt_select_out_quirk_set()
4690 				AC_VERB_GET_GPIO_DATA, 0);  in ca0132_alt_select_out_quirk_set()
4692 		if (out_info->hda_gpio_set)  in ca0132_alt_select_out_quirk_set()
4693 			gpio_data |= (1 << out_info->hda_gpio_pin);  in ca0132_alt_select_out_quirk_set()
4695 			gpio_data &= ~(1 << out_info->hda_gpio_pin);  in ca0132_alt_select_out_quirk_set()
4697 		snd_hda_codec_write(codec, codec->core.afg, 0,  in ca0132_alt_select_out_quirk_set()
4701 	if (out_info->mmio_gpio_count) {  in ca0132_alt_select_out_quirk_set()
4702 		for (i = 0; i < out_info->mmio_gpio_count; i++) {  in ca0132_alt_select_out_quirk_set()
4703 			ca0113_mmio_gpio_set(codec, out_info->mmio_gpio_pin[i],  in ca0132_alt_select_out_quirk_set()
4704 					out_info->mmio_gpio_set[i]);  in ca0132_alt_select_out_quirk_set()
4708 	if (out_info->scp_cmds_count) {  in ca0132_alt_select_out_quirk_set()
4709 		for (i = 0; i < out_info->scp_cmds_count; i++) {  in ca0132_alt_select_out_quirk_set()
4710 			err = dspio_set_uint_param(codec,  in ca0132_alt_select_out_quirk_set()
4711 					out_info->scp_cmd_mid[i],  in ca0132_alt_select_out_quirk_set()
4712 					out_info->scp_cmd_req[i],  in ca0132_alt_select_out_quirk_set()
4713 					out_info->scp_cmd_val[i]);  in ca0132_alt_select_out_quirk_set()
4714 			if (err < 0)  in ca0132_alt_select_out_quirk_set()
4719 	chipio_set_control_param(codec, 0x0d, out_info->dac2port);  in ca0132_alt_select_out_quirk_set()
4721 	if (out_info->has_chipio_write) {  in ca0132_alt_select_out_quirk_set()
4722 		chipio_write(codec, out_info->chipio_write_addr,  in ca0132_alt_select_out_quirk_set()
4723 				out_info->chipio_write_data);  in ca0132_alt_select_out_quirk_set()
4726 	if (quirk_data->has_headphone_gain) {  in ca0132_alt_select_out_quirk_set()
4727 		if (spec->cur_out_type != HEADPHONE_OUT) {  in ca0132_alt_select_out_quirk_set()
4728 			if (quirk_data->is_ae_series)  in ca0132_alt_select_out_quirk_set()
4729 				ae5_headphone_gain_set(codec, 2);  in ca0132_alt_select_out_quirk_set()
4731 				zxr_headphone_gain_set(codec, 0);  in ca0132_alt_select_out_quirk_set()
4733 			if (quirk_data->is_ae_series)  in ca0132_alt_select_out_quirk_set()
4734 				ae5_headphone_gain_set(codec,  in ca0132_alt_select_out_quirk_set()
4735 						spec->ae5_headphone_gain_val);  in ca0132_alt_select_out_quirk_set()
4737 				zxr_headphone_gain_set(codec,  in ca0132_alt_select_out_quirk_set()
4738 						spec->zxr_gain_set);  in ca0132_alt_select_out_quirk_set()
4742 	return 0;  in ca0132_alt_select_out_quirk_set()
4745 static void ca0132_set_out_node_pincfg(struct hda_codec *codec, hda_nid_t nid,  in ca0132_set_out_node_pincfg()  argument
4750 	pin_ctl = snd_hda_codec_read(codec, nid, 0,  in ca0132_set_out_node_pincfg()
4751 			AC_VERB_GET_PIN_WIDGET_CONTROL, 0);  in ca0132_set_out_node_pincfg()
4755 	snd_hda_set_pin_ctl(codec, nid, pin_ctl);  in ca0132_set_out_node_pincfg()
4764  * It also adds the ability to auto-detect the front headphone port.
4766 static int ca0132_alt_select_out(struct hda_codec *codec)  in ca0132_alt_select_out()  argument
4768 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_select_out()
4774 	hda_nid_t headphone_nid = spec->out_pins[1];  in ca0132_alt_select_out()
4776 	codec_dbg(codec, "%s\n", __func__);  in ca0132_alt_select_out()
4778 	snd_hda_power_up_pm(codec);  in ca0132_alt_select_out()
4780 	auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID];  in ca0132_alt_select_out()
4788 		jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_hp) ||  in ca0132_alt_select_out()
4789 			   snd_hda_jack_detect(codec, spec->unsol_tag_front_hp);  in ca0132_alt_select_out()
4792 			spec->cur_out_type = HEADPHONE_OUT;  in ca0132_alt_select_out()
4794 			spec->cur_out_type = SPEAKER_OUT;  in ca0132_alt_select_out()
4796 		spec->cur_out_type = spec->out_enum_val;  in ca0132_alt_select_out()
4798 	outfx_set = spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID];  in ca0132_alt_select_out()
4801 	err = dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_MUTE, FLOAT_ONE);  in ca0132_alt_select_out()
4802 	if (err < 0)  in ca0132_alt_select_out()
4805 	if (ca0132_alt_select_out_quirk_set(codec) < 0)  in ca0132_alt_select_out()
4808 	switch (spec->cur_out_type) {  in ca0132_alt_select_out()
4810 		codec_dbg(codec, "%s speaker\n", __func__);  in ca0132_alt_select_out()
4813 		snd_hda_codec_write(codec, spec->out_pins[0], 0,  in ca0132_alt_select_out()
4814 			AC_VERB_SET_EAPD_BTLENABLE, 0x01);  in ca0132_alt_select_out()
4817 		ca0132_set_out_node_pincfg(codec, spec->out_pins[1], 0, 0);  in ca0132_alt_select_out()
4818 		/* Set front L-R to output. */  in ca0132_alt_select_out()
4819 		ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 1, 0);  in ca0132_alt_select_out()
4821 		ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 1, 0);  in ca0132_alt_select_out()
4823 		ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 1, 0);  in ca0132_alt_select_out()
4830 		if (!outfx_set && spec->channel_cfg_val == SPEAKER_CHANNELS_2_0)  in ca0132_alt_select_out()
4833 			tmp = speaker_channel_cfgs[spec->channel_cfg_val].val;  in ca0132_alt_select_out()
4835 		err = dspio_set_uint_param(codec, 0x80, 0x04, tmp);  in ca0132_alt_select_out()
4836 		if (err < 0)  in ca0132_alt_select_out()
4841 		codec_dbg(codec, "%s hp\n", __func__);  in ca0132_alt_select_out()
4842 		snd_hda_codec_write(codec, spec->out_pins[0], 0,  in ca0132_alt_select_out()
4843 			AC_VERB_SET_EAPD_BTLENABLE, 0x00);  in ca0132_alt_select_out()
4846 		ca0132_set_out_node_pincfg(codec, spec->out_pins[0], 0, 0);  in ca0132_alt_select_out()
4847 		ca0132_set_out_node_pincfg(codec, spec->out_pins[2], 0, 0);  in ca0132_alt_select_out()
4848 		ca0132_set_out_node_pincfg(codec, spec->out_pins[3], 0, 0);  in ca0132_alt_select_out()
4851 		if (snd_hda_jack_detect(codec, spec->unsol_tag_front_hp))  in ca0132_alt_select_out()
4852 			headphone_nid = spec->out_pins[2];  in ca0132_alt_select_out()
4853 		else if (snd_hda_jack_detect(codec, spec->unsol_tag_hp))  in ca0132_alt_select_out()
4854 			headphone_nid = spec->out_pins[1];  in ca0132_alt_select_out()
4856 		ca0132_set_out_node_pincfg(codec, headphone_nid, 1, 1);  in ca0132_alt_select_out()
4859 			err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ONE);  in ca0132_alt_select_out()
4861 			err = dspio_set_uint_param(codec, 0x80, 0x04, FLOAT_ZERO);  in ca0132_alt_select_out()
4863 		if (err < 0)  in ca0132_alt_select_out()
4868 	 * If output effects are enabled, set the X-Bass effect value again to  in ca0132_alt_select_out()
4873 		ca0132_effects_set(codec, X_BASS,  in ca0132_alt_select_out()
4874 			spec->effects_switch[X_BASS - EFFECT_START_NID]);  in ca0132_alt_select_out()
4876 	/* Set speaker EQ bypass attenuation to 0. */  in ca0132_alt_select_out()
4877 	err = dspio_set_uint_param(codec, 0x8f, 0x01, FLOAT_ZERO);  in ca0132_alt_select_out()
4878 	if (err < 0)  in ca0132_alt_select_out()
4885 	err = dspio_set_uint_param(codec, 0x96,  in ca0132_alt_select_out()
4887 	if (err < 0)  in ca0132_alt_select_out()
4890 	if (spec->cur_out_type == SPEAKER_OUT)  in ca0132_alt_select_out()
4891 		err = ca0132_alt_surround_set_bass_redirection(codec,  in ca0132_alt_select_out()
4892 				spec->bass_redirection_val);  in ca0132_alt_select_out()
4894 		err = ca0132_alt_surround_set_bass_redirection(codec, 0);  in ca0132_alt_select_out()
4897 	err = dspio_set_uint_param(codec, 0x96,  in ca0132_alt_select_out()
4899 	if (err < 0)  in ca0132_alt_select_out()
4902 	if (spec->cur_out_type == SPEAKER_OUT) {  in ca0132_alt_select_out()
4903 		err = ca0132_alt_set_full_range_speaker(codec);  in ca0132_alt_select_out()
4904 		if (err < 0)  in ca0132_alt_select_out()
4909 	snd_hda_power_down_pm(codec);  in ca0132_alt_select_out()
4911 	return err < 0 ? err : 0;  in ca0132_alt_select_out()
4921 		ca0132_alt_select_out(spec->codec);  in ca0132_unsol_hp_delayed()
4923 		ca0132_select_out(spec->codec);  in ca0132_unsol_hp_delayed()
4925 	jack = snd_hda_jack_tbl_get(spec->codec, spec->unsol_tag_hp);  in ca0132_unsol_hp_delayed()
4927 		jack->block_report = 0;  in ca0132_unsol_hp_delayed()
4928 		snd_hda_jack_report_sync(spec->codec);  in ca0132_unsol_hp_delayed()
4932 static void ca0132_set_dmic(struct hda_codec *codec, int enable);
4933 static int ca0132_mic_boost_set(struct hda_codec *codec, long val);
4934 static void resume_mic1(struct hda_codec *codec, unsigned int oldval);
4935 static int stop_mic1(struct hda_codec *codec);
4936 static int ca0132_cvoice_switch_set(struct hda_codec *codec);
4937 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val);
4942 static int ca0132_set_vipsource(struct hda_codec *codec, int val)  in ca0132_set_vipsource()  argument
4944 	struct ca0132_spec *spec = codec->spec;  in ca0132_set_vipsource()
4947 	if (spec->dsp_state != DSP_DOWNLOADED)  in ca0132_set_vipsource()
4948 		return 0;  in ca0132_set_vipsource()
4950 	/* if CrystalVoice if off, vipsource should be 0 */  in ca0132_set_vipsource()
4951 	if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ||  in ca0132_set_vipsource()
4952 	    (val == 0)) {  in ca0132_set_vipsource()
4953 		chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);  in ca0132_set_vipsource()
4954 		chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);  in ca0132_set_vipsource()
4955 		chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);  in ca0132_set_vipsource()
4956 		if (spec->cur_mic_type == DIGITAL_MIC)  in ca0132_set_vipsource()
4960 		dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_set_vipsource()
4962 		dspio_set_uint_param(codec, 0x80, 0x05, tmp);  in ca0132_set_vipsource()
4964 		chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000);  in ca0132_set_vipsource()
4965 		chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000);  in ca0132_set_vipsource()
4966 		if (spec->cur_mic_type == DIGITAL_MIC)  in ca0132_set_vipsource()
4970 		dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_set_vipsource()
4972 		dspio_set_uint_param(codec, 0x80, 0x05, tmp);  in ca0132_set_vipsource()
4974 		chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val);  in ca0132_set_vipsource()
4980 static int ca0132_alt_set_vipsource(struct hda_codec *codec, int val)  in ca0132_alt_set_vipsource()  argument
4982 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_set_vipsource()
4985 	if (spec->dsp_state != DSP_DOWNLOADED)  in ca0132_alt_set_vipsource()
4986 		return 0;  in ca0132_alt_set_vipsource()
4988 	codec_dbg(codec, "%s\n", __func__);  in ca0132_alt_set_vipsource()
4990 	chipio_set_stream_control(codec, 0x03, 0);  in ca0132_alt_set_vipsource()
4991 	chipio_set_stream_control(codec, 0x04, 0);  in ca0132_alt_set_vipsource()
4993 	/* if CrystalVoice is off, vipsource should be 0 */  in ca0132_alt_set_vipsource()
4994 	if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ||  in ca0132_alt_set_vipsource()
4995 	    (val == 0) || spec->in_enum_val == REAR_LINE_IN) {  in ca0132_alt_set_vipsource()
4996 		codec_dbg(codec, "%s: off.", __func__);  in ca0132_alt_set_vipsource()
4997 		chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);  in ca0132_alt_set_vipsource()
5000 		dspio_set_uint_param(codec, 0x80, 0x05, tmp);  in ca0132_alt_set_vipsource()
5002 		chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);  in ca0132_alt_set_vipsource()
5003 		chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);  in ca0132_alt_set_vipsource()
5005 			chipio_set_conn_rate(codec, 0x0F, SR_96_000);  in ca0132_alt_set_vipsource()
5008 		if (spec->in_enum_val == REAR_LINE_IN)  in ca0132_alt_set_vipsource()
5017 		dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_alt_set_vipsource()
5020 		codec_dbg(codec, "%s: on.", __func__);  in ca0132_alt_set_vipsource()
5021 		chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000);  in ca0132_alt_set_vipsource()
5022 		chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000);  in ca0132_alt_set_vipsource()
5024 			chipio_set_conn_rate(codec, 0x0F, SR_16_000);  in ca0132_alt_set_vipsource()
5026 		if (spec->effects_switch[VOICE_FOCUS - EFFECT_START_NID])  in ca0132_alt_set_vipsource()
5030 		dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_alt_set_vipsource()
5033 		dspio_set_uint_param(codec, 0x80, 0x05, tmp);  in ca0132_alt_set_vipsource()
5036 		chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, val);  in ca0132_alt_set_vipsource()
5039 	chipio_set_stream_control(codec, 0x03, 1);  in ca0132_alt_set_vipsource()
5040 	chipio_set_stream_control(codec, 0x04, 1);  in ca0132_alt_set_vipsource()
5048  * If jack inserted, ext.mic will be selected, else built-in mic
5051 static int ca0132_select_mic(struct hda_codec *codec)  in ca0132_select_mic()  argument
5053 	struct ca0132_spec *spec = codec->spec;  in ca0132_select_mic()
5057 	codec_dbg(codec, "ca0132_select_mic\n");  in ca0132_select_mic()
5059 	snd_hda_power_up_pm(codec);  in ca0132_select_mic()
5061 	auto_jack = spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID];  in ca0132_select_mic()
5064 		jack_present = snd_hda_jack_detect(codec, spec->unsol_tag_amic1);  in ca0132_select_mic()
5067 			spec->vnode_lswitch[VNID_AMIC1_SEL - VNODE_START_NID];  in ca0132_select_mic()
5070 		spec->cur_mic_type = LINE_MIC_IN;  in ca0132_select_mic()
5072 		spec->cur_mic_type = DIGITAL_MIC;  in ca0132_select_mic()
5074 	if (spec->cur_mic_type == DIGITAL_MIC) {  in ca0132_select_mic()
5076 		chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_32_000);  in ca0132_select_mic()
5077 		ca0132_set_dmic(codec, 1);  in ca0132_select_mic()
5078 		ca0132_mic_boost_set(codec, 0);  in ca0132_select_mic()
5080 		ca0132_effects_set(codec, VOICE_FOCUS,  in ca0132_select_mic()
5081 				   spec->effects_switch  in ca0132_select_mic()
5082 				   [VOICE_FOCUS - EFFECT_START_NID]);  in ca0132_select_mic()
5085 		chipio_set_conn_rate(codec, MEM_CONNID_DMIC, SR_96_000);  in ca0132_select_mic()
5086 		ca0132_set_dmic(codec, 0);  in ca0132_select_mic()
5087 		ca0132_mic_boost_set(codec, spec->cur_mic_boost);  in ca0132_select_mic()
5089 		ca0132_effects_set(codec, VOICE_FOCUS, 0);  in ca0132_select_mic()
5092 	snd_hda_power_down_pm(codec);  in ca0132_select_mic()
5094 	return 0;  in ca0132_select_mic()
5100  * The front mic has no jack-detection, so the only way to switch to it
5103 static int ca0132_alt_select_in(struct hda_codec *codec)  in ca0132_alt_select_in()  argument
5105 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_select_in()
5108 	codec_dbg(codec, "%s\n", __func__);  in ca0132_alt_select_in()
5110 	snd_hda_power_up_pm(codec);  in ca0132_alt_select_in()
5112 	chipio_set_stream_control(codec, 0x03, 0);  in ca0132_alt_select_in()
5113 	chipio_set_stream_control(codec, 0x04, 0);  in ca0132_alt_select_in()
5115 	spec->cur_mic_type = spec->in_enum_val;  in ca0132_alt_select_in()
5117 	switch (spec->cur_mic_type) {  in ca0132_alt_select_in()
5122 			ca0113_mmio_gpio_set(codec, 0, false);  in ca0132_alt_select_in()
5129 			r3di_gpio_mic_set(codec, R3DI_REAR_MIC);  in ca0132_alt_select_in()
5133 			ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);  in ca0132_alt_select_in()
5137 			ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);  in ca0132_alt_select_in()
5139 			chipio_set_conn_rate(codec, MEM_CONNID_MICIN2,  in ca0132_alt_select_in()
5141 			chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2,  in ca0132_alt_select_in()
5143 			dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO);  in ca0132_alt_select_in()
5150 		chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);  in ca0132_alt_select_in()
5151 		chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);  in ca0132_alt_select_in()
5153 			chipio_set_conn_rate(codec, 0x0F, SR_96_000);  in ca0132_alt_select_in()
5155 		dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_alt_select_in()
5157 		chipio_set_stream_control(codec, 0x03, 1);  in ca0132_alt_select_in()
5158 		chipio_set_stream_control(codec, 0x04, 1);  in ca0132_alt_select_in()
5161 			chipio_write(codec, 0x18B098, 0x0000000C);  in ca0132_alt_select_in()
5162 			chipio_write(codec, 0x18B09C, 0x0000000C);  in ca0132_alt_select_in()
5165 			chipio_write(codec, 0x18B098, 0x0000000C);  in ca0132_alt_select_in()
5166 			chipio_write(codec, 0x18B09C, 0x000000CC);  in ca0132_alt_select_in()
5169 			chipio_write(codec, 0x18B098, 0x0000000C);  in ca0132_alt_select_in()
5170 			chipio_write(codec, 0x18B09C, 0x0000004C);  in ca0132_alt_select_in()
5175 		ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);  in ca0132_alt_select_in()
5178 		ca0132_mic_boost_set(codec, 0);  in ca0132_alt_select_in()
5182 			ca0113_mmio_gpio_set(codec, 0, false);  in ca0132_alt_select_in()
5185 			r3di_gpio_mic_set(codec, R3DI_REAR_MIC);  in ca0132_alt_select_in()
5188 			ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);  in ca0132_alt_select_in()
5191 			ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f);  in ca0132_alt_select_in()
5192 			chipio_set_conn_rate(codec, MEM_CONNID_MICIN2,  in ca0132_alt_select_in()
5194 			chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2,  in ca0132_alt_select_in()
5196 			dspio_set_uint_param(codec, 0x80, 0x01, FLOAT_ZERO);  in ca0132_alt_select_in()
5202 		chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);  in ca0132_alt_select_in()
5203 		chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);  in ca0132_alt_select_in()
5205 			chipio_set_conn_rate(codec, 0x0F, SR_96_000);  in ca0132_alt_select_in()
5211 		dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_alt_select_in()
5216 			chipio_write(codec, 0x18B098, 0x00000000);  in ca0132_alt_select_in()
5217 			chipio_write(codec, 0x18B09C, 0x00000000);  in ca0132_alt_select_in()
5222 		chipio_set_stream_control(codec, 0x03, 1);  in ca0132_alt_select_in()
5223 		chipio_set_stream_control(codec, 0x04, 1);  in ca0132_alt_select_in()
5229 			ca0113_mmio_gpio_set(codec, 0, true);  in ca0132_alt_select_in()
5230 			ca0113_mmio_gpio_set(codec, 5, false);  in ca0132_alt_select_in()
5234 			r3di_gpio_mic_set(codec, R3DI_FRONT_MIC);  in ca0132_alt_select_in()
5238 			ca0113_mmio_command_set(codec, 0x30, 0x28, 0x3f);  in ca0132_alt_select_in()
5246 		chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);  in ca0132_alt_select_in()
5247 		chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);  in ca0132_alt_select_in()
5249 			chipio_set_conn_rate(codec, 0x0F, SR_96_000);  in ca0132_alt_select_in()
5251 		dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_alt_select_in()
5253 		chipio_set_stream_control(codec, 0x03, 1);  in ca0132_alt_select_in()
5254 		chipio_set_stream_control(codec, 0x04, 1);  in ca0132_alt_select_in()
5258 			chipio_write(codec, 0x18B098, 0x0000000C);  in ca0132_alt_select_in()
5259 			chipio_write(codec, 0x18B09C, 0x000000CC);  in ca0132_alt_select_in()
5262 			chipio_write(codec, 0x18B098, 0x0000000C);  in ca0132_alt_select_in()
5263 			chipio_write(codec, 0x18B09C, 0x0000004C);  in ca0132_alt_select_in()
5268 		ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);  in ca0132_alt_select_in()
5271 	ca0132_cvoice_switch_set(codec);  in ca0132_alt_select_in()
5273 	snd_hda_power_down_pm(codec);  in ca0132_alt_select_in()
5274 	return 0;  in ca0132_alt_select_in()
5280 static bool ca0132_is_vnode_effective(struct hda_codec *codec,  in ca0132_is_vnode_effective()  argument
5284 	struct ca0132_spec *spec = codec->spec;  in ca0132_is_vnode_effective()
5289 		nid = spec->shared_out_nid;  in ca0132_is_vnode_effective()
5292 		nid = spec->shared_mic_nid;  in ca0132_is_vnode_effective()
5306 * They return 0 if no changed.  Return 1 if changed.
5308 static int ca0132_voicefx_set(struct hda_codec *codec, int enable)  in ca0132_voicefx_set()  argument
5310 	struct ca0132_spec *spec = codec->spec;  in ca0132_voicefx_set()
5315 		tmp = spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ?  in ca0132_voicefx_set()
5321 	dspio_set_uint_param(codec, ca0132_voicefx.mid,  in ca0132_voicefx_set()
5322 			     ca0132_voicefx.reqs[0], tmp);  in ca0132_voicefx_set()
5330 static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val)  in ca0132_effects_set()  argument
5332 	struct ca0132_spec *spec = codec->spec;  in ca0132_effects_set()
5335 	int err = 0;  in ca0132_effects_set()
5336 	int idx = nid - EFFECT_START_NID;  in ca0132_effects_set()
5338 	if ((idx < 0) || (idx >= num_fx))  in ca0132_effects_set()
5339 		return 0; /* no changed */  in ca0132_effects_set()
5344 		if (!spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID])  in ca0132_effects_set()
5345 			val = 0;  in ca0132_effects_set()
5346 		if (spec->cur_out_type == SPEAKER_OUT && nid == X_BASS) {  in ca0132_effects_set()
5347 			channel_cfg = spec->channel_cfg_val;  in ca0132_effects_set()
5350 				val = 0;  in ca0132_effects_set()
5357 		if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID])  in ca0132_effects_set()
5358 			val = 0;  in ca0132_effects_set()
5360 		/* Voice Focus applies to 2-ch Mic, Digital Mic */  in ca0132_effects_set()
5361 		if ((nid == VOICE_FOCUS) && (spec->cur_mic_type != DIGITAL_MIC))  in ca0132_effects_set()
5362 			val = 0;  in ca0132_effects_set()
5366 				&& (spec->cur_mic_type != REAR_LINE_IN)) {  in ca0132_effects_set()
5367 			if (spec->effects_switch[CRYSTAL_VOICE -  in ca0132_effects_set()
5370 				if (spec->effects_switch[VOICE_FOCUS -  in ca0132_effects_set()
5377 				dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_effects_set()
5382 		 * to module ID 0x47. No clue why.  in ca0132_effects_set()
5385 				&& (spec->cur_mic_type != REAR_LINE_IN)) {  in ca0132_effects_set()
5386 			if (spec->effects_switch[CRYSTAL_VOICE -  in ca0132_effects_set()
5388 				if (spec->effects_switch[NOISE_REDUCTION -  in ca0132_effects_set()
5396 			dspio_set_uint_param(codec, 0x47, 0x00, tmp);  in ca0132_effects_set()
5401 				spec->in_enum_val == REAR_LINE_IN)  in ca0132_effects_set()
5402 			val = 0;  in ca0132_effects_set()
5405 	codec_dbg(codec, "ca0132_effect_set: nid=0x%x, val=%ld\n",  in ca0132_effects_set()
5408 	on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE;  in ca0132_effects_set()
5409 	err = dspio_set_uint_param(codec, ca0132_effects[idx].mid,  in ca0132_effects_set()
5410 				   ca0132_effects[idx].reqs[0], on);  in ca0132_effects_set()
5412 	if (err < 0)  in ca0132_effects_set()
5413 		return 0; /* no changed */  in ca0132_effects_set()
5421 static int ca0132_pe_switch_set(struct hda_codec *codec)  in ca0132_pe_switch_set()  argument
5423 	struct ca0132_spec *spec = codec->spec;  in ca0132_pe_switch_set()
5425 	int i, ret = 0;  in ca0132_pe_switch_set()
5427 	codec_dbg(codec, "ca0132_pe_switch_set: val=%ld\n",  in ca0132_pe_switch_set()
5428 		    spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]);  in ca0132_pe_switch_set()
5431 		ca0132_alt_select_out(codec);  in ca0132_pe_switch_set()
5433 	i = OUT_EFFECT_START_NID - EFFECT_START_NID;  in ca0132_pe_switch_set()
5437 		ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]);  in ca0132_pe_switch_set()
5443 static int stop_mic1(struct hda_codec *codec)  in stop_mic1()  argument
5445 	struct ca0132_spec *spec = codec->spec;  in stop_mic1()
5446 	unsigned int oldval = snd_hda_codec_read(codec, spec->adcs[0], 0,  in stop_mic1()
5447 						 AC_VERB_GET_CONV, 0);  in stop_mic1()
5448 	if (oldval != 0)  in stop_mic1()
5449 		snd_hda_codec_write(codec, spec->adcs[0], 0,  in stop_mic1()
5451 				    0);  in stop_mic1()
5456 static void resume_mic1(struct hda_codec *codec, unsigned int oldval)  in resume_mic1()  argument
5458 	struct ca0132_spec *spec = codec->spec;  in resume_mic1()
5460 	if (oldval != 0)  in resume_mic1()
5461 		snd_hda_codec_write(codec, spec->adcs[0], 0,  in resume_mic1()
5469 static int ca0132_cvoice_switch_set(struct hda_codec *codec)  in ca0132_cvoice_switch_set()  argument
5471 	struct ca0132_spec *spec = codec->spec;  in ca0132_cvoice_switch_set()
5473 	int i, ret = 0;  in ca0132_cvoice_switch_set()
5476 	codec_dbg(codec, "ca0132_cvoice_switch_set: val=%ld\n",  in ca0132_cvoice_switch_set()
5477 		    spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]);  in ca0132_cvoice_switch_set()
5479 	i = IN_EFFECT_START_NID - EFFECT_START_NID;  in ca0132_cvoice_switch_set()
5483 		ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]);  in ca0132_cvoice_switch_set()
5486 	ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0));  in ca0132_cvoice_switch_set()
5489 	oldval = stop_mic1(codec);  in ca0132_cvoice_switch_set()
5491 		ret |= ca0132_alt_set_vipsource(codec, 1);  in ca0132_cvoice_switch_set()
5493 		ret |= ca0132_set_vipsource(codec, 1);  in ca0132_cvoice_switch_set()
5494 	resume_mic1(codec, oldval);  in ca0132_cvoice_switch_set()
5498 static int ca0132_mic_boost_set(struct hda_codec *codec, long val)  in ca0132_mic_boost_set()  argument
5500 	struct ca0132_spec *spec = codec->spec;  in ca0132_mic_boost_set()
5501 	int ret = 0;  in ca0132_mic_boost_set()
5504 		ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,  in ca0132_mic_boost_set()
5505 					HDA_INPUT, 0, HDA_AMP_VOLMASK, 3);  in ca0132_mic_boost_set()
5507 		ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,  in ca0132_mic_boost_set()
5508 					HDA_INPUT, 0, HDA_AMP_VOLMASK, 0);  in ca0132_mic_boost_set()
5513 static int ca0132_alt_mic_boost_set(struct hda_codec *codec, long val)  in ca0132_alt_mic_boost_set()  argument
5515 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_mic_boost_set()
5516 	int ret = 0;  in ca0132_alt_mic_boost_set()
5518 	ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,  in ca0132_alt_mic_boost_set()
5519 				HDA_INPUT, 0, HDA_AMP_VOLMASK, val);  in ca0132_alt_mic_boost_set()
5523 static int ae5_headphone_gain_set(struct hda_codec *codec, long val)  in ae5_headphone_gain_set()  argument
5527 	for (i = 0; i < 4; i++)  in ae5_headphone_gain_set()
5528 		ca0113_mmio_command_set(codec, 0x48, 0x11 + i,  in ae5_headphone_gain_set()
5530 	return 0;  in ae5_headphone_gain_set()
5537 static int zxr_headphone_gain_set(struct hda_codec *codec, long val)  in zxr_headphone_gain_set()  argument
5539 	ca0113_mmio_gpio_set(codec, 1, val);  in zxr_headphone_gain_set()
5541 	return 0;  in zxr_headphone_gain_set()
5547 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_vnode_switch_set()  local
5549 	hda_nid_t shared_nid = 0;  in ca0132_vnode_switch_set()
5551 	int ret = 0;  in ca0132_vnode_switch_set()
5552 	struct ca0132_spec *spec = codec->spec;  in ca0132_vnode_switch_set()
5557 			spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID];  in ca0132_vnode_switch_set()
5560 				ca0132_alt_select_out(codec);  in ca0132_vnode_switch_set()
5562 				ca0132_select_out(codec);  in ca0132_vnode_switch_set()
5569 			spec->vnode_lswitch[VNID_AMIC1_ASEL - VNODE_START_NID];  in ca0132_vnode_switch_set()
5571 			ca0132_select_mic(codec);  in ca0132_vnode_switch_set()
5577 			ca0132_alt_select_out(codec);  in ca0132_vnode_switch_set()
5579 			ca0132_select_out(codec);  in ca0132_vnode_switch_set()
5584 		ca0132_select_mic(codec);  in ca0132_vnode_switch_set()
5589 	effective = ca0132_is_vnode_effective(codec, nid, &shared_nid);  in ca0132_vnode_switch_set()
5595 		mutex_lock(&codec->control_mutex);  in ca0132_vnode_switch_set()
5596 		pval = kcontrol->private_value;  in ca0132_vnode_switch_set()
5597 		kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch,  in ca0132_vnode_switch_set()
5598 								0, dir);  in ca0132_vnode_switch_set()
5600 		kcontrol->private_value = pval;  in ca0132_vnode_switch_set()
5601 		mutex_unlock(&codec->control_mutex);  in ca0132_vnode_switch_set()
5608 static void ca0132_alt_bass_redirection_xover_set(struct hda_codec *codec,  in ca0132_alt_bass_redirection_xover_set()  argument
5611 	snd_hda_power_up(codec);  in ca0132_alt_bass_redirection_xover_set()
5613 	dspio_set_param(codec, 0x96, 0x20, SPEAKER_BASS_REDIRECT_XOVER_FREQ,  in ca0132_alt_bass_redirection_xover_set()
5616 	snd_hda_power_down(codec);  in ca0132_alt_bass_redirection_xover_set()
5628 static int ca0132_alt_slider_ctl_set(struct hda_codec *codec, hda_nid_t nid,  in ca0132_alt_slider_ctl_set()  argument
5631 	int i = 0;  in ca0132_alt_slider_ctl_set()
5642 	snd_hda_power_up(codec);  in ca0132_alt_slider_ctl_set()
5644 		for (i = 0; i < OUT_EFFECTS_COUNT; i++)  in ca0132_alt_slider_ctl_set()
5648 		dspio_set_param(codec, ca0132_effects[i].mid, 0x20,  in ca0132_alt_slider_ctl_set()
5650 				&(lookup[idx - 1]), sizeof(unsigned int));  in ca0132_alt_slider_ctl_set()
5653 		for (i = 0; i < OUT_EFFECTS_COUNT; i++)  in ca0132_alt_slider_ctl_set()
5657 		dspio_set_param(codec, ca0132_effects[i].mid, 0x20,  in ca0132_alt_slider_ctl_set()
5662 	snd_hda_power_down(codec);  in ca0132_alt_slider_ctl_set()
5664 	return 0;  in ca0132_alt_slider_ctl_set()
5670 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_xbass_xover_slider_ctl_get()  local
5671 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_xbass_xover_slider_ctl_get()
5672 	long *valp = ucontrol->value.integer.value;  in ca0132_alt_xbass_xover_slider_ctl_get()
5676 		*valp = spec->bass_redirect_xover_freq;  in ca0132_alt_xbass_xover_slider_ctl_get()
5678 		*valp = spec->xbass_xover_freq;  in ca0132_alt_xbass_xover_slider_ctl_get()
5680 	return 0;  in ca0132_alt_xbass_xover_slider_ctl_get()
5686 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_slider_ctl_get()  local
5687 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_slider_ctl_get()
5689 	long *valp = ucontrol->value.integer.value;  in ca0132_alt_slider_ctl_get()
5690 	int idx = nid - OUT_EFFECT_START_NID;  in ca0132_alt_slider_ctl_get()
5692 	*valp = spec->fx_ctl_val[idx];  in ca0132_alt_slider_ctl_get()
5693 	return 0;  in ca0132_alt_slider_ctl_get()
5697  * The X-bass crossover starts at 10hz, so the min is 1. The
5703 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;  in ca0132_alt_xbass_xover_slider_info()
5704 	uinfo->count = 1;  in ca0132_alt_xbass_xover_slider_info()
5705 	uinfo->value.integer.min = 1;  in ca0132_alt_xbass_xover_slider_info()
5706 	uinfo->value.integer.max = 100;  in ca0132_alt_xbass_xover_slider_info()
5707 	uinfo->value.integer.step = 1;  in ca0132_alt_xbass_xover_slider_info()
5709 	return 0;  in ca0132_alt_xbass_xover_slider_info()
5717 	uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;  in ca0132_alt_effect_slider_info()
5718 	uinfo->count = chs == 3 ? 2 : 1;  in ca0132_alt_effect_slider_info()
5719 	uinfo->value.integer.min = 0;  in ca0132_alt_effect_slider_info()
5720 	uinfo->value.integer.max = 100;  in ca0132_alt_effect_slider_info()
5721 	uinfo->value.integer.step = 1;  in ca0132_alt_effect_slider_info()
5723 	return 0;  in ca0132_alt_effect_slider_info()
5729 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_xbass_xover_slider_put()  local
5730 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_xbass_xover_slider_put()
5732 	long *valp = ucontrol->value.integer.value;  in ca0132_alt_xbass_xover_slider_put()
5737 		cur_val = &spec->bass_redirect_xover_freq;  in ca0132_alt_xbass_xover_slider_put()
5739 		cur_val = &spec->xbass_xover_freq;  in ca0132_alt_xbass_xover_slider_put()
5743 		return 0;  in ca0132_alt_xbass_xover_slider_put()
5749 		ca0132_alt_bass_redirection_xover_set(codec, *cur_val);  in ca0132_alt_xbass_xover_slider_put()
5751 		ca0132_alt_slider_ctl_set(codec, nid, float_xbass_xover_lookup, idx);  in ca0132_alt_xbass_xover_slider_put()
5753 	return 0;  in ca0132_alt_xbass_xover_slider_put()
5759 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_effect_slider_put()  local
5760 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_effect_slider_put()
5762 	long *valp = ucontrol->value.integer.value;  in ca0132_alt_effect_slider_put()
5765 	idx = nid - EFFECT_START_NID;  in ca0132_alt_effect_slider_put()
5767 	if (spec->fx_ctl_val[idx] == *valp)  in ca0132_alt_effect_slider_put()
5768 		return 0;  in ca0132_alt_effect_slider_put()
5770 	spec->fx_ctl_val[idx] = *valp;  in ca0132_alt_effect_slider_put()
5773 	ca0132_alt_slider_ctl_set(codec, nid, float_zero_to_one_lookup, idx);  in ca0132_alt_effect_slider_put()
5775 	return 0;  in ca0132_alt_effect_slider_put()
5782  * traditional 0-100 in alsamixer that goes in big steps. I like enum better.
5793 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;  in ca0132_alt_mic_boost_info()
5794 	uinfo->count = 1;  in ca0132_alt_mic_boost_info()
5795 	uinfo->value.enumerated.items = MIC_BOOST_NUM_OF_STEPS;  in ca0132_alt_mic_boost_info()
5796 	if (uinfo->value.enumerated.item >= MIC_BOOST_NUM_OF_STEPS)  in ca0132_alt_mic_boost_info()
5797 		uinfo->value.enumerated.item = MIC_BOOST_NUM_OF_STEPS - 1;  in ca0132_alt_mic_boost_info()
5798 	sprintf(namestr, "%d %s", (uinfo->value.enumerated.item * 10), sfx);  in ca0132_alt_mic_boost_info()
5799 	strcpy(uinfo->value.enumerated.name, namestr);  in ca0132_alt_mic_boost_info()
5800 	return 0;  in ca0132_alt_mic_boost_info()
5806 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_mic_boost_get()  local
5807 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_mic_boost_get()
5809 	ucontrol->value.enumerated.item[0] = spec->mic_boost_enum_val;  in ca0132_alt_mic_boost_get()
5810 	return 0;  in ca0132_alt_mic_boost_get()
5816 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_mic_boost_put()  local
5817 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_mic_boost_put()
5818 	int sel = ucontrol->value.enumerated.item[0];  in ca0132_alt_mic_boost_put()
5822 		return 0;  in ca0132_alt_mic_boost_put()
5824 	codec_dbg(codec, "ca0132_alt_mic_boost: boost=%d\n",  in ca0132_alt_mic_boost_put()
5827 	spec->mic_boost_enum_val = sel;  in ca0132_alt_mic_boost_put()
5829 	if (spec->in_enum_val != REAR_LINE_IN)  in ca0132_alt_mic_boost_put()
5830 		ca0132_alt_mic_boost_set(codec, spec->mic_boost_enum_val);  in ca0132_alt_mic_boost_put()
5836  * Sound BlasterX AE-5 Headphone Gain Controls.
5845 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;  in ae5_headphone_gain_info()
5846 	uinfo->count = 1;  in ae5_headphone_gain_info()
5847 	uinfo->value.enumerated.items = AE5_HEADPHONE_GAIN_MAX;  in ae5_headphone_gain_info()
5848 	if (uinfo->value.enumerated.item >= AE5_HEADPHONE_GAIN_MAX)  in ae5_headphone_gain_info()
5849 		uinfo->value.enumerated.item = AE5_HEADPHONE_GAIN_MAX - 1;  in ae5_headphone_gain_info()
5851 		ae5_headphone_gain_presets[uinfo->value.enumerated.item].name,  in ae5_headphone_gain_info()
5853 	strcpy(uinfo->value.enumerated.name, namestr);  in ae5_headphone_gain_info()
5854 	return 0;  in ae5_headphone_gain_info()
5860 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ae5_headphone_gain_get()  local
5861 	struct ca0132_spec *spec = codec->spec;  in ae5_headphone_gain_get()
5863 	ucontrol->value.enumerated.item[0] = spec->ae5_headphone_gain_val;  in ae5_headphone_gain_get()
5864 	return 0;  in ae5_headphone_gain_get()
5870 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ae5_headphone_gain_put()  local
5871 	struct ca0132_spec *spec = codec->spec;  in ae5_headphone_gain_put()
5872 	int sel = ucontrol->value.enumerated.item[0];  in ae5_headphone_gain_put()
5876 		return 0;  in ae5_headphone_gain_put()
5878 	codec_dbg(codec, "ae5_headphone_gain: boost=%d\n",  in ae5_headphone_gain_put()
5881 	spec->ae5_headphone_gain_val = sel;  in ae5_headphone_gain_put()
5883 	if (spec->out_enum_val == HEADPHONE_OUT)  in ae5_headphone_gain_put()
5884 		ae5_headphone_gain_set(codec, spec->ae5_headphone_gain_val);  in ae5_headphone_gain_put()
5890  * Sound BlasterX AE-5 sound filter enumerated control.
5899 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;  in ae5_sound_filter_info()
5900 	uinfo->count = 1;  in ae5_sound_filter_info()
5901 	uinfo->value.enumerated.items = AE5_SOUND_FILTER_MAX;  in ae5_sound_filter_info()
5902 	if (uinfo->value.enumerated.item >= AE5_SOUND_FILTER_MAX)  in ae5_sound_filter_info()
5903 		uinfo->value.enumerated.item = AE5_SOUND_FILTER_MAX - 1;  in ae5_sound_filter_info()
5905 			ae5_filter_presets[uinfo->value.enumerated.item].name);  in ae5_sound_filter_info()
5906 	strcpy(uinfo->value.enumerated.name, namestr);  in ae5_sound_filter_info()
5907 	return 0;  in ae5_sound_filter_info()
5913 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ae5_sound_filter_get()  local
5914 	struct ca0132_spec *spec = codec->spec;  in ae5_sound_filter_get()
5916 	ucontrol->value.enumerated.item[0] = spec->ae5_filter_val;  in ae5_sound_filter_get()
5917 	return 0;  in ae5_sound_filter_get()
5923 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ae5_sound_filter_put()  local
5924 	struct ca0132_spec *spec = codec->spec;  in ae5_sound_filter_put()
5925 	int sel = ucontrol->value.enumerated.item[0];  in ae5_sound_filter_put()
5929 		return 0;  in ae5_sound_filter_put()
5931 	codec_dbg(codec, "ae5_sound_filter: %s\n",  in ae5_sound_filter_put()
5934 	spec->ae5_filter_val = sel;  in ae5_sound_filter_put()
5936 	ca0113_mmio_command_set_type2(codec, 0x48, 0x07,  in ae5_sound_filter_put()
5944  * front microphone has no auto-detect, and we need a way to set the rear
5945  * as line-in
5950 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;  in ca0132_alt_input_source_info()
5951 	uinfo->count = 1;  in ca0132_alt_input_source_info()
5952 	uinfo->value.enumerated.items = IN_SRC_NUM_OF_INPUTS;  in ca0132_alt_input_source_info()
5953 	if (uinfo->value.enumerated.item >= IN_SRC_NUM_OF_INPUTS)  in ca0132_alt_input_source_info()
5954 		uinfo->value.enumerated.item = IN_SRC_NUM_OF_INPUTS - 1;  in ca0132_alt_input_source_info()
5955 	strcpy(uinfo->value.enumerated.name,  in ca0132_alt_input_source_info()
5956 			in_src_str[uinfo->value.enumerated.item]);  in ca0132_alt_input_source_info()
5957 	return 0;  in ca0132_alt_input_source_info()
5963 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_input_source_get()  local
5964 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_input_source_get()
5966 	ucontrol->value.enumerated.item[0] = spec->in_enum_val;  in ca0132_alt_input_source_get()
5967 	return 0;  in ca0132_alt_input_source_get()
5973 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_input_source_put()  local
5974 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_input_source_put()
5975 	int sel = ucontrol->value.enumerated.item[0];  in ca0132_alt_input_source_put()
5979 	 * The AE-7 has no front microphone, so limit items to 2: rear mic and  in ca0132_alt_input_source_put()
5980 	 * line-in.  in ca0132_alt_input_source_put()
5986 		return 0;  in ca0132_alt_input_source_put()
5988 	codec_dbg(codec, "ca0132_alt_input_select: sel=%d, preset=%s\n",  in ca0132_alt_input_source_put()
5991 	spec->in_enum_val = sel;  in ca0132_alt_input_source_put()
5993 	ca0132_alt_select_in(codec);  in ca0132_alt_input_source_put()
6002 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;  in ca0132_alt_output_select_get_info()
6003 	uinfo->count = 1;  in ca0132_alt_output_select_get_info()
6004 	uinfo->value.enumerated.items = NUM_OF_OUTPUTS;  in ca0132_alt_output_select_get_info()
6005 	if (uinfo->value.enumerated.item >= NUM_OF_OUTPUTS)  in ca0132_alt_output_select_get_info()
6006 		uinfo->value.enumerated.item = NUM_OF_OUTPUTS - 1;  in ca0132_alt_output_select_get_info()
6007 	strcpy(uinfo->value.enumerated.name,  in ca0132_alt_output_select_get_info()
6008 			out_type_str[uinfo->value.enumerated.item]);  in ca0132_alt_output_select_get_info()
6009 	return 0;  in ca0132_alt_output_select_get_info()
6015 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_output_select_get()  local
6016 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_output_select_get()
6018 	ucontrol->value.enumerated.item[0] = spec->out_enum_val;  in ca0132_alt_output_select_get()
6019 	return 0;  in ca0132_alt_output_select_get()
6025 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_output_select_put()  local
6026 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_output_select_put()
6027 	int sel = ucontrol->value.enumerated.item[0];  in ca0132_alt_output_select_put()
6032 		return 0;  in ca0132_alt_output_select_put()
6034 	codec_dbg(codec, "ca0132_alt_output_select: sel=%d, preset=%s\n",  in ca0132_alt_output_select_put()
6037 	spec->out_enum_val = sel;  in ca0132_alt_output_select_put()
6039 	auto_jack = spec->vnode_lswitch[VNID_HP_ASEL - VNODE_START_NID];  in ca0132_alt_output_select_put()
6042 		ca0132_alt_select_out(codec);  in ca0132_alt_output_select_put()
6053 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;  in ca0132_alt_speaker_channel_cfg_get_info()
6054 	uinfo->count = 1;  in ca0132_alt_speaker_channel_cfg_get_info()
6055 	uinfo->value.enumerated.items = items;  in ca0132_alt_speaker_channel_cfg_get_info()
6056 	if (uinfo->value.enumerated.item >= items)  in ca0132_alt_speaker_channel_cfg_get_info()
6057 		uinfo->value.enumerated.item = items - 1;  in ca0132_alt_speaker_channel_cfg_get_info()
6058 	strcpy(uinfo->value.enumerated.name,  in ca0132_alt_speaker_channel_cfg_get_info()
6059 			speaker_channel_cfgs[uinfo->value.enumerated.item].name);  in ca0132_alt_speaker_channel_cfg_get_info()
6060 	return 0;  in ca0132_alt_speaker_channel_cfg_get_info()
6066 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_speaker_channel_cfg_get()  local
6067 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_speaker_channel_cfg_get()
6069 	ucontrol->value.enumerated.item[0] = spec->channel_cfg_val;  in ca0132_alt_speaker_channel_cfg_get()
6070 	return 0;  in ca0132_alt_speaker_channel_cfg_get()
6076 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_speaker_channel_cfg_put()  local
6077 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_speaker_channel_cfg_put()
6078 	int sel = ucontrol->value.enumerated.item[0];  in ca0132_alt_speaker_channel_cfg_put()
6082 		return 0;  in ca0132_alt_speaker_channel_cfg_put()
6084 	codec_dbg(codec, "ca0132_alt_speaker_channels: sel=%d, channels=%s\n",  in ca0132_alt_speaker_channel_cfg_put()
6087 	spec->channel_cfg_val = sel;  in ca0132_alt_speaker_channel_cfg_put()
6089 	if (spec->out_enum_val == SPEAKER_OUT)  in ca0132_alt_speaker_channel_cfg_put()
6090 		ca0132_alt_select_out(codec);  in ca0132_alt_speaker_channel_cfg_put()
6106 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;  in ca0132_alt_svm_setting_info()
6107 	uinfo->count = 1;  in ca0132_alt_svm_setting_info()
6108 	uinfo->value.enumerated.items = NUM_OF_SVM_SETTINGS;  in ca0132_alt_svm_setting_info()
6109 	if (uinfo->value.enumerated.item >= NUM_OF_SVM_SETTINGS)  in ca0132_alt_svm_setting_info()
6110 		uinfo->value.enumerated.item = NUM_OF_SVM_SETTINGS - 1;  in ca0132_alt_svm_setting_info()
6111 	strcpy(uinfo->value.enumerated.name,  in ca0132_alt_svm_setting_info()
6112 			out_svm_set_enum_str[uinfo->value.enumerated.item]);  in ca0132_alt_svm_setting_info()
6113 	return 0;  in ca0132_alt_svm_setting_info()
6119 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_svm_setting_get()  local
6120 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_svm_setting_get()
6122 	ucontrol->value.enumerated.item[0] = spec->smart_volume_setting;  in ca0132_alt_svm_setting_get()
6123 	return 0;  in ca0132_alt_svm_setting_get()
6129 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_svm_setting_put()  local
6130 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_svm_setting_put()
6131 	int sel = ucontrol->value.enumerated.item[0];  in ca0132_alt_svm_setting_put()
6133 	unsigned int idx = SMART_VOLUME - EFFECT_START_NID;  in ca0132_alt_svm_setting_put()
6137 		return 0;  in ca0132_alt_svm_setting_put()
6139 	codec_dbg(codec, "ca0132_alt_svm_setting: sel=%d, preset=%s\n",  in ca0132_alt_svm_setting_put()
6142 	spec->smart_volume_setting = sel;  in ca0132_alt_svm_setting_put()
6145 	case 0:  in ca0132_alt_svm_setting_put()
6159 	dspio_set_uint_param(codec, ca0132_effects[idx].mid,  in ca0132_alt_svm_setting_put()
6170 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;  in ca0132_alt_eq_preset_info()
6171 	uinfo->count = 1;  in ca0132_alt_eq_preset_info()
6172 	uinfo->value.enumerated.items = items;  in ca0132_alt_eq_preset_info()
6173 	if (uinfo->value.enumerated.item >= items)  in ca0132_alt_eq_preset_info()
6174 		uinfo->value.enumerated.item = items - 1;  in ca0132_alt_eq_preset_info()
6175 	strcpy(uinfo->value.enumerated.name,  in ca0132_alt_eq_preset_info()
6176 		ca0132_alt_eq_presets[uinfo->value.enumerated.item].name);  in ca0132_alt_eq_preset_info()
6177 	return 0;  in ca0132_alt_eq_preset_info()
6183 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_eq_preset_get()  local
6184 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_eq_preset_get()
6186 	ucontrol->value.enumerated.item[0] = spec->eq_preset_val;  in ca0132_alt_eq_preset_get()
6187 	return 0;  in ca0132_alt_eq_preset_get()
6193 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_eq_preset_put()  local
6194 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_eq_preset_put()
6195 	int i, err = 0;  in ca0132_alt_eq_preset_put()
6196 	int sel = ucontrol->value.enumerated.item[0];  in ca0132_alt_eq_preset_put()
6200 		return 0;  in ca0132_alt_eq_preset_put()
6202 	codec_dbg(codec, "%s: sel=%d, preset=%s\n", __func__, sel,  in ca0132_alt_eq_preset_put()
6205 	 * Idx 0 is default.  in ca0132_alt_eq_preset_put()
6208 	for (i = 0; i < EQ_PRESET_MAX_PARAM_COUNT; i++) {  in ca0132_alt_eq_preset_put()
6209 		err = dspio_set_uint_param(codec, ca0132_alt_eq_enum.mid,  in ca0132_alt_eq_preset_put()
6212 		if (err < 0)  in ca0132_alt_eq_preset_put()
6216 	if (err >= 0)  in ca0132_alt_eq_preset_put()
6217 		spec->eq_preset_val = sel;  in ca0132_alt_eq_preset_put()
6227 	uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;  in ca0132_voicefx_info()
6228 	uinfo->count = 1;  in ca0132_voicefx_info()
6229 	uinfo->value.enumerated.items = items;  in ca0132_voicefx_info()
6230 	if (uinfo->value.enumerated.item >= items)  in ca0132_voicefx_info()
6231 		uinfo->value.enumerated.item = items - 1;  in ca0132_voicefx_info()
6232 	strcpy(uinfo->value.enumerated.name,  in ca0132_voicefx_info()
6233 	       ca0132_voicefx_presets[uinfo->value.enumerated.item].name);  in ca0132_voicefx_info()
6234 	return 0;  in ca0132_voicefx_info()
6240 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_voicefx_get()  local
6241 	struct ca0132_spec *spec = codec->spec;  in ca0132_voicefx_get()
6243 	ucontrol->value.enumerated.item[0] = spec->voicefx_val;  in ca0132_voicefx_get()
6244 	return 0;  in ca0132_voicefx_get()
6250 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_voicefx_put()  local
6251 	struct ca0132_spec *spec = codec->spec;  in ca0132_voicefx_put()
6252 	int i, err = 0;  in ca0132_voicefx_put()
6253 	int sel = ucontrol->value.enumerated.item[0];  in ca0132_voicefx_put()
6256 		return 0;  in ca0132_voicefx_put()
6258 	codec_dbg(codec, "ca0132_voicefx_put: sel=%d, preset=%s\n",  in ca0132_voicefx_put()
6262 	 * Idx 0 is default.  in ca0132_voicefx_put()
6265 	for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) {  in ca0132_voicefx_put()
6266 		err = dspio_set_uint_param(codec, ca0132_voicefx.mid,  in ca0132_voicefx_put()
6269 		if (err < 0)  in ca0132_voicefx_put()
6273 	if (err >= 0) {  in ca0132_voicefx_put()
6274 		spec->voicefx_val = sel;  in ca0132_voicefx_put()
6276 		ca0132_voicefx_set(codec, (sel ? 1 : 0));  in ca0132_voicefx_put()
6285 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_switch_get()  local
6286 	struct ca0132_spec *spec = codec->spec;  in ca0132_switch_get()
6289 	long *valp = ucontrol->value.integer.value;  in ca0132_switch_get()
6294 			*valp = spec->vnode_lswitch[nid - VNODE_START_NID];  in ca0132_switch_get()
6298 			*valp = spec->vnode_rswitch[nid - VNODE_START_NID];  in ca0132_switch_get()
6301 		return 0;  in ca0132_switch_get()
6306 		*valp = spec->effects_switch[nid - EFFECT_START_NID];  in ca0132_switch_get()
6307 		return 0;  in ca0132_switch_get()
6311 	if (nid == spec->input_pins[0]) {  in ca0132_switch_get()
6312 		*valp = spec->cur_mic_boost;  in ca0132_switch_get()
6313 		return 0;  in ca0132_switch_get()
6317 		*valp = spec->zxr_gain_set;  in ca0132_switch_get()
6318 		return 0;  in ca0132_switch_get()
6322 		*valp = spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT];  in ca0132_switch_get()
6323 		return 0;  in ca0132_switch_get()
6327 		*valp = spec->bass_redirection_val;  in ca0132_switch_get()
6328 		return 0;  in ca0132_switch_get()
6331 	return 0;  in ca0132_switch_get()
6337 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_switch_put()  local
6338 	struct ca0132_spec *spec = codec->spec;  in ca0132_switch_put()
6341 	long *valp = ucontrol->value.integer.value;  in ca0132_switch_put()
6344 	codec_dbg(codec, "ca0132_switch_put: nid=0x%x, val=%ld\n",  in ca0132_switch_put()
6347 	snd_hda_power_up(codec);  in ca0132_switch_put()
6351 			spec->vnode_lswitch[nid - VNODE_START_NID] = *valp;  in ca0132_switch_put()
6355 			spec->vnode_rswitch[nid - VNODE_START_NID] = *valp;  in ca0132_switch_put()
6364 		spec->effects_switch[nid - EFFECT_START_NID] = *valp;  in ca0132_switch_put()
6365 		changed = ca0132_pe_switch_set(codec);  in ca0132_switch_put()
6371 		spec->effects_switch[nid - EFFECT_START_NID] = *valp;  in ca0132_switch_put()
6372 		changed = ca0132_cvoice_switch_set(codec);  in ca0132_switch_put()
6379 		spec->effects_switch[nid - EFFECT_START_NID] = *valp;  in ca0132_switch_put()
6380 		changed = ca0132_effects_set(codec, nid, *valp);  in ca0132_switch_put()
6385 	if (nid == spec->input_pins[0]) {  in ca0132_switch_put()
6386 		spec->cur_mic_boost = *valp;  in ca0132_switch_put()
6388 			if (spec->in_enum_val != REAR_LINE_IN)  in ca0132_switch_put()
6389 				changed = ca0132_mic_boost_set(codec, *valp);  in ca0132_switch_put()
6392 			if (spec->cur_mic_type != DIGITAL_MIC)  in ca0132_switch_put()
6393 				changed = ca0132_mic_boost_set(codec, *valp);  in ca0132_switch_put()
6400 		spec->zxr_gain_set = *valp;  in ca0132_switch_put()
6401 		if (spec->cur_out_type == HEADPHONE_OUT)  in ca0132_switch_put()
6402 			changed = zxr_headphone_gain_set(codec, *valp);  in ca0132_switch_put()
6404 			changed = 0;  in ca0132_switch_put()
6410 		spec->speaker_range_val[nid - SPEAKER_FULL_RANGE_FRONT] = *valp;  in ca0132_switch_put()
6411 		if (spec->cur_out_type == SPEAKER_OUT)  in ca0132_switch_put()
6412 			ca0132_alt_set_full_range_speaker(codec);  in ca0132_switch_put()
6414 		changed = 0;  in ca0132_switch_put()
6418 		spec->bass_redirection_val = *valp;  in ca0132_switch_put()
6419 		if (spec->cur_out_type == SPEAKER_OUT)  in ca0132_switch_put()
6420 			ca0132_alt_surround_set_bass_redirection(codec, *valp);  in ca0132_switch_put()
6422 		changed = 0;  in ca0132_switch_put()
6426 	snd_hda_power_down(codec);  in ca0132_switch_put()
6438 static void ca0132_alt_dsp_volume_put(struct hda_codec *codec, hda_nid_t nid)  in ca0132_alt_dsp_volume_put()  argument
6440 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_dsp_volume_put()
6449 	lookup_val = spec->vnode_lvol[nid - VNODE_START_NID];  in ca0132_alt_dsp_volume_put()
6451 	dspio_set_uint_param(codec,  in ca0132_alt_dsp_volume_put()
6453 		ca0132_alt_vol_ctls[dsp_dir].reqs[0],  in ca0132_alt_dsp_volume_put()
6456 	lookup_val = spec->vnode_rvol[nid - VNODE_START_NID];  in ca0132_alt_dsp_volume_put()
6458 	dspio_set_uint_param(codec,  in ca0132_alt_dsp_volume_put()
6463 	dspio_set_uint_param(codec,  in ca0132_alt_dsp_volume_put()
6471 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_volume_info()  local
6472 	struct ca0132_spec *spec = codec->spec;  in ca0132_volume_info()
6482 		nid = spec->shared_out_nid;  in ca0132_volume_info()
6483 		mutex_lock(&codec->control_mutex);  in ca0132_volume_info()
6484 		pval = kcontrol->private_value;  in ca0132_volume_info()
6485 		kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);  in ca0132_volume_info()
6487 		kcontrol->private_value = pval;  in ca0132_volume_info()
6488 		mutex_unlock(&codec->control_mutex);  in ca0132_volume_info()
6492 		nid = spec->shared_mic_nid;  in ca0132_volume_info()
6493 		mutex_lock(&codec->control_mutex);  in ca0132_volume_info()
6494 		pval = kcontrol->private_value;  in ca0132_volume_info()
6495 		kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);  in ca0132_volume_info()
6497 		kcontrol->private_value = pval;  in ca0132_volume_info()
6498 		mutex_unlock(&codec->control_mutex);  in ca0132_volume_info()
6509 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_volume_get()  local
6510 	struct ca0132_spec *spec = codec->spec;  in ca0132_volume_get()
6513 	long *valp = ucontrol->value.integer.value;  in ca0132_volume_get()
6517 		*valp = spec->vnode_lvol[nid - VNODE_START_NID];  in ca0132_volume_get()
6521 		*valp = spec->vnode_rvol[nid - VNODE_START_NID];  in ca0132_volume_get()
6524 	return 0;  in ca0132_volume_get()
6530 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_volume_put()  local
6531 	struct ca0132_spec *spec = codec->spec;  in ca0132_volume_put()
6534 	long *valp = ucontrol->value.integer.value;  in ca0132_volume_put()
6535 	hda_nid_t shared_nid = 0;  in ca0132_volume_put()
6541 		spec->vnode_lvol[nid - VNODE_START_NID] = *valp;  in ca0132_volume_put()
6545 		spec->vnode_rvol[nid - VNODE_START_NID] = *valp;  in ca0132_volume_put()
6550 	effective = ca0132_is_vnode_effective(codec, nid, &shared_nid);  in ca0132_volume_put()
6555 		snd_hda_power_up(codec);  in ca0132_volume_put()
6556 		mutex_lock(&codec->control_mutex);  in ca0132_volume_put()
6557 		pval = kcontrol->private_value;  in ca0132_volume_put()
6558 		kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch,  in ca0132_volume_put()
6559 								0, dir);  in ca0132_volume_put()
6561 		kcontrol->private_value = pval;  in ca0132_volume_put()
6562 		mutex_unlock(&codec->control_mutex);  in ca0132_volume_put()
6563 		snd_hda_power_down(codec);  in ca0132_volume_put()
6577 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_alt_volume_put()  local
6578 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_volume_put()
6581 	long *valp = ucontrol->value.integer.value;  in ca0132_alt_volume_put()
6582 	hda_nid_t vnid = 0;  in ca0132_alt_volume_put()
6586 	case 0x02:  in ca0132_alt_volume_put()
6589 	case 0x07:  in ca0132_alt_volume_put()
6596 		spec->vnode_lvol[vnid - VNODE_START_NID] = *valp;  in ca0132_alt_volume_put()
6600 		spec->vnode_rvol[vnid - VNODE_START_NID] = *valp;  in ca0132_alt_volume_put()
6604 	snd_hda_power_up(codec);  in ca0132_alt_volume_put()
6605 	ca0132_alt_dsp_volume_put(codec, vnid);  in ca0132_alt_volume_put()
6606 	mutex_lock(&codec->control_mutex);  in ca0132_alt_volume_put()
6608 	mutex_unlock(&codec->control_mutex);  in ca0132_alt_volume_put()
6609 	snd_hda_power_down(codec);  in ca0132_alt_volume_put()
6617 	struct hda_codec *codec = snd_kcontrol_chip(kcontrol);  in ca0132_volume_tlv()  local
6618 	struct ca0132_spec *spec = codec->spec;  in ca0132_volume_tlv()
6628 		nid = spec->shared_out_nid;  in ca0132_volume_tlv()
6629 		mutex_lock(&codec->control_mutex);  in ca0132_volume_tlv()
6630 		pval = kcontrol->private_value;  in ca0132_volume_tlv()
6631 		kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);  in ca0132_volume_tlv()
6633 		kcontrol->private_value = pval;  in ca0132_volume_tlv()
6634 		mutex_unlock(&codec->control_mutex);  in ca0132_volume_tlv()
6638 		nid = spec->shared_mic_nid;  in ca0132_volume_tlv()
6639 		mutex_lock(&codec->control_mutex);  in ca0132_volume_tlv()
6640 		pval = kcontrol->private_value;  in ca0132_volume_tlv()
6641 		kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);  in ca0132_volume_tlv()
6643 		kcontrol->private_value = pval;  in ca0132_volume_tlv()
6644 		mutex_unlock(&codec->control_mutex);  in ca0132_volume_tlv()
6653 static int ca0132_alt_add_effect_slider(struct hda_codec *codec, hda_nid_t nid,  in ca0132_alt_add_effect_slider()  argument
6659 		HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type);  in ca0132_alt_add_effect_slider()
6676 			HDA_COMPOSE_AMP_VAL(nid, 1, 0, type);  in ca0132_alt_add_effect_slider()
6680 	return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));  in ca0132_alt_add_effect_slider()
6688 static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid,  in add_fx_switch()  argument
6691 	struct ca0132_spec *spec = codec->spec;  in add_fx_switch()
6704 	return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));  in add_fx_switch()
6707 static int add_voicefx(struct hda_codec *codec)  in add_voicefx()  argument
6711 				    VOICEFX, 1, 0, HDA_INPUT);  in add_voicefx()
6715 	return snd_hda_ctl_add(codec, VOICEFX, snd_ctl_new1(&knew, codec));  in add_voicefx()
6719 static int add_ca0132_alt_eq_presets(struct hda_codec *codec)  in add_ca0132_alt_eq_presets()  argument
6723 				    EQ_PRESET_ENUM, 1, 0, HDA_OUTPUT);  in add_ca0132_alt_eq_presets()
6727 	return snd_hda_ctl_add(codec, EQ_PRESET_ENUM,  in add_ca0132_alt_eq_presets()
6728 				snd_ctl_new1(&knew, codec));  in add_ca0132_alt_eq_presets()
6736 static int ca0132_alt_add_svm_enum(struct hda_codec *codec)  in ca0132_alt_add_svm_enum()  argument
6740 				    SMART_VOLUME_ENUM, 1, 0, HDA_OUTPUT);  in ca0132_alt_add_svm_enum()
6744 	return snd_hda_ctl_add(codec, SMART_VOLUME_ENUM,  in ca0132_alt_add_svm_enum()
6745 				snd_ctl_new1(&knew, codec));  in ca0132_alt_add_svm_enum()
6753 static int ca0132_alt_add_output_enum(struct hda_codec *codec)  in ca0132_alt_add_output_enum()  argument
6757 				    OUTPUT_SOURCE_ENUM, 1, 0, HDA_OUTPUT);  in ca0132_alt_add_output_enum()
6761 	return snd_hda_ctl_add(codec, OUTPUT_SOURCE_ENUM,  in ca0132_alt_add_output_enum()
6762 				snd_ctl_new1(&knew, codec));  in ca0132_alt_add_output_enum()
6770 static int ca0132_alt_add_speaker_channel_cfg_enum(struct hda_codec *codec)  in ca0132_alt_add_speaker_channel_cfg_enum()  argument
6774 				    SPEAKER_CHANNEL_CFG_ENUM, 1, 0, HDA_OUTPUT);  in ca0132_alt_add_speaker_channel_cfg_enum()
6778 	return snd_hda_ctl_add(codec, SPEAKER_CHANNEL_CFG_ENUM,  in ca0132_alt_add_speaker_channel_cfg_enum()
6779 				snd_ctl_new1(&knew, codec));  in ca0132_alt_add_speaker_channel_cfg_enum()
6787 static int ca0132_alt_add_front_full_range_switch(struct hda_codec *codec)  in ca0132_alt_add_front_full_range_switch()  argument
6790 		CA0132_CODEC_MUTE_MONO("Full-Range Front Speakers",  in ca0132_alt_add_front_full_range_switch()
6793 	return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_FRONT,  in ca0132_alt_add_front_full_range_switch()
6794 				snd_ctl_new1(&knew, codec));  in ca0132_alt_add_front_full_range_switch()
6797 static int ca0132_alt_add_rear_full_range_switch(struct hda_codec *codec)  in ca0132_alt_add_rear_full_range_switch()  argument
6800 		CA0132_CODEC_MUTE_MONO("Full-Range Rear Speakers",  in ca0132_alt_add_rear_full_range_switch()
6803 	return snd_hda_ctl_add(codec, SPEAKER_FULL_RANGE_REAR,  in ca0132_alt_add_rear_full_range_switch()
6804 				snd_ctl_new1(&knew, codec));  in ca0132_alt_add_rear_full_range_switch()
6809  * channel on speakers that are set as not being full-range. On configurations
6811  * replacement for X-Bass on configurations with an LFE channel.
6813 static int ca0132_alt_add_bass_redirection_crossover(struct hda_codec *codec)  in ca0132_alt_add_bass_redirection_crossover()  argument
6817 		HDA_CODEC_VOLUME_MONO(namestr, BASS_REDIRECTION_XOVER, 1, 0,  in ca0132_alt_add_bass_redirection_crossover()
6825 	return snd_hda_ctl_add(codec, BASS_REDIRECTION_XOVER,  in ca0132_alt_add_bass_redirection_crossover()
6826 			snd_ctl_new1(&knew, codec));  in ca0132_alt_add_bass_redirection_crossover()
6829 static int ca0132_alt_add_bass_redirection_switch(struct hda_codec *codec)  in ca0132_alt_add_bass_redirection_switch()  argument
6836 	return snd_hda_ctl_add(codec, BASS_REDIRECTION,  in ca0132_alt_add_bass_redirection_switch()
6837 			snd_ctl_new1(&knew, codec));  in ca0132_alt_add_bass_redirection_switch()
6842  * because the front microphone has no auto-detect, and Line-in has to be set
6845 static int ca0132_alt_add_input_enum(struct hda_codec *codec)  in ca0132_alt_add_input_enum()  argument
6849 				    INPUT_SOURCE_ENUM, 1, 0, HDA_INPUT);  in ca0132_alt_add_input_enum()
6853 	return snd_hda_ctl_add(codec, INPUT_SOURCE_ENUM,  in ca0132_alt_add_input_enum()
6854 				snd_ctl_new1(&knew, codec));  in ca0132_alt_add_input_enum()
6858  * Add mic boost enumerated control. Switches through 0dB to 30dB. This adds
6861 static int ca0132_alt_add_mic_boost_enum(struct hda_codec *codec)  in ca0132_alt_add_mic_boost_enum()  argument
6865 				    MIC_BOOST_ENUM, 1, 0, HDA_INPUT);  in ca0132_alt_add_mic_boost_enum()
6869 	return snd_hda_ctl_add(codec, MIC_BOOST_ENUM,  in ca0132_alt_add_mic_boost_enum()
6870 				snd_ctl_new1(&knew, codec));  in ca0132_alt_add_mic_boost_enum()
6875  * Add headphone gain enumerated control for the AE-5. This switches between
6876  * three modes, low, medium, and high. When non-headphone outputs are selected,
6879 static int ae5_add_headphone_gain_enum(struct hda_codec *codec)  in ae5_add_headphone_gain_enum()  argument
6882 		HDA_CODEC_MUTE_MONO("AE-5: Headphone Gain",  in ae5_add_headphone_gain_enum()
6883 				    AE5_HEADPHONE_GAIN_ENUM, 1, 0, HDA_OUTPUT);  in ae5_add_headphone_gain_enum()
6887 	return snd_hda_ctl_add(codec, AE5_HEADPHONE_GAIN_ENUM,  in ae5_add_headphone_gain_enum()
6888 				snd_ctl_new1(&knew, codec));  in ae5_add_headphone_gain_enum()
6892  * Add sound filter enumerated control for the AE-5. This adds three different
6896 static int ae5_add_sound_filter_enum(struct hda_codec *codec)  in ae5_add_sound_filter_enum()  argument
6899 		HDA_CODEC_MUTE_MONO("AE-5: Sound Filter",  in ae5_add_sound_filter_enum()
6900 				    AE5_SOUND_FILTER_ENUM, 1, 0, HDA_OUTPUT);  in ae5_add_sound_filter_enum()
6904 	return snd_hda_ctl_add(codec, AE5_SOUND_FILTER_ENUM,  in ae5_add_sound_filter_enum()
6905 				snd_ctl_new1(&knew, codec));  in ae5_add_sound_filter_enum()
6908 static int zxr_add_headphone_gain_switch(struct hda_codec *codec)  in zxr_add_headphone_gain_switch()  argument
6914 	return snd_hda_ctl_add(codec, ZXR_HEADPHONE_GAIN,  in zxr_add_headphone_gain_switch()
6915 				snd_ctl_new1(&knew, codec));  in zxr_add_headphone_gain_switch()
6928  * I think this has to do with the pin for rear surround being 0x11,
6929  * and the center/lfe being 0x10. Usually the pin order is the opposite.
6945 static void ca0132_alt_add_chmap_ctls(struct hda_codec *codec)  in ca0132_alt_add_chmap_ctls()  argument
6947 	int err = 0;  in ca0132_alt_add_chmap_ctls()
6950 	list_for_each_entry(pcm, &codec->pcm_list_head, list) {  in ca0132_alt_add_chmap_ctls()
6952 			&pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];  in ca0132_alt_add_chmap_ctls()
6957 		if (hinfo->channels_max == 6) {  in ca0132_alt_add_chmap_ctls()
6958 			err = snd_pcm_add_chmap_ctls(pcm->pcm,  in ca0132_alt_add_chmap_ctls()
6960 					elem, hinfo->channels_max, 0, &chmap);  in ca0132_alt_add_chmap_ctls()
6961 			if (err < 0)  in ca0132_alt_add_chmap_ctls()
6962 				codec_dbg(codec, "snd_pcm_add_chmap_ctls failed!");  in ca0132_alt_add_chmap_ctls()
6976 	HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
6977 	HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
6978 	HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
6979 	HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
6980 	CA0132_CODEC_MUTE_MONO("Mic1-Boost (30dB) Capture Switch",
6981 			       0x12, 1, HDA_INPUT),
6994  * Desktop specific control mixer. Removes auto-detect for mic, and adds
6999 	CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
7001 	HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
7002 	HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
7003 	HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
7004 	HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
7005 	HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
7006 	HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
7007 	CA0132_ALT_CODEC_VOL("Capture Volume", 0x07, HDA_INPUT),
7009 	HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
7010 	HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
7021 	CA0132_ALT_CODEC_VOL("Front Playback Volume", 0x02, HDA_OUTPUT),
7023 	HDA_CODEC_VOLUME("Surround Playback Volume", 0x04, 0, HDA_OUTPUT),
7024 	HDA_CODEC_MUTE("Surround Playback Switch", 0x04, 0, HDA_OUTPUT),
7025 	HDA_CODEC_VOLUME_MONO("Center Playback Volume", 0x03, 1, 0, HDA_OUTPUT),
7026 	HDA_CODEC_MUTE_MONO("Center Playback Switch", 0x03, 1, 0, HDA_OUTPUT),
7027 	HDA_CODEC_VOLUME_MONO("LFE Playback Volume", 0x03, 2, 0, HDA_OUTPUT),
7028 	HDA_CODEC_MUTE_MONO("LFE Playback Switch", 0x03, 2, 0, HDA_OUTPUT),
7031 	HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
7032 	HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
7038 static int ca0132_build_controls(struct hda_codec *codec)  in ca0132_build_controls()  argument
7040 	struct ca0132_spec *spec = codec->spec;  in ca0132_build_controls()
7042 	int err = 0;  in ca0132_build_controls()
7045 	for (i = 0; i < spec->num_mixers; i++) {  in ca0132_build_controls()
7046 		err = snd_hda_add_new_ctls(codec, spec->mixers[i]);  in ca0132_build_controls()
7047 		if (err < 0)  in ca0132_build_controls()
7052 		snd_hda_set_vmaster_tlv(codec, spec->dacs[0], HDA_OUTPUT,  in ca0132_build_controls()
7053 					spec->tlv);  in ca0132_build_controls()
7054 		snd_hda_add_vmaster(codec, "Master Playback Volume",  in ca0132_build_controls()
7055 					spec->tlv, ca0132_alt_follower_pfxs,  in ca0132_build_controls()
7056 					"Playback Volume", 0);  in ca0132_build_controls()
7057 		err = __snd_hda_add_vmaster(codec, "Master Playback Switch",  in ca0132_build_controls()
7060 					    true, 0, &spec->vmaster_mute.sw_kctl);  in ca0132_build_controls()
7061 		if (err < 0)  in ca0132_build_controls()
7069 	for (i = 0; i < num_fx; i++) {  in ca0132_build_controls()
7072 			if (i == (ECHO_CANCELLATION - IN_EFFECT_START_NID +  in ca0132_build_controls()
7077 		err = add_fx_switch(codec, ca0132_effects[i].nid,  in ca0132_build_controls()
7080 		if (err < 0)  in ca0132_build_controls()
7084 	 * If codec has use_alt_controls set to true, add effect level sliders,  in ca0132_build_controls()
7089 		err = ca0132_alt_add_svm_enum(codec);  in ca0132_build_controls()
7090 		if (err < 0)  in ca0132_build_controls()
7093 		err = add_ca0132_alt_eq_presets(codec);  in ca0132_build_controls()
7094 		if (err < 0)  in ca0132_build_controls()
7097 		err = add_fx_switch(codec, PLAY_ENHANCEMENT,  in ca0132_build_controls()
7098 					"Enable OutFX", 0);  in ca0132_build_controls()
7099 		if (err < 0)  in ca0132_build_controls()
7102 		err = add_fx_switch(codec, CRYSTAL_VOICE,  in ca0132_build_controls()
7104 		if (err < 0)  in ca0132_build_controls()
7107 		num_sliders = OUT_EFFECTS_COUNT - 1;  in ca0132_build_controls()
7108 		for (i = 0; i < num_sliders; i++) {  in ca0132_build_controls()
7109 			err = ca0132_alt_add_effect_slider(codec,  in ca0132_build_controls()
7113 			if (err < 0)  in ca0132_build_controls()
7117 		err = ca0132_alt_add_effect_slider(codec, XBASS_XOVER,  in ca0132_build_controls()
7118 					"X-Bass Crossover", EFX_DIR_OUT);  in ca0132_build_controls()
7120 		if (err < 0)  in ca0132_build_controls()
7123 		err = add_fx_switch(codec, PLAY_ENHANCEMENT,  in ca0132_build_controls()
7124 					"PlayEnhancement", 0);  in ca0132_build_controls()
7125 		if (err < 0)  in ca0132_build_controls()
7128 		err = add_fx_switch(codec, CRYSTAL_VOICE,  in ca0132_build_controls()
7130 		if (err < 0)  in ca0132_build_controls()
7133 	err = add_voicefx(codec);  in ca0132_build_controls()
7134 	if (err < 0)  in ca0132_build_controls()
7138 	 * If the codec uses alt_functions, you need the enumerated controls  in ca0132_build_controls()
7143 		err = ca0132_alt_add_output_enum(codec);  in ca0132_build_controls()
7144 		if (err < 0)  in ca0132_build_controls()
7146 		err = ca0132_alt_add_speaker_channel_cfg_enum(codec);  in ca0132_build_controls()
7147 		if (err < 0)  in ca0132_build_controls()
7149 		err = ca0132_alt_add_front_full_range_switch(codec);  in ca0132_build_controls()
7150 		if (err < 0)  in ca0132_build_controls()
7152 		err = ca0132_alt_add_rear_full_range_switch(codec);  in ca0132_build_controls()
7153 		if (err < 0)  in ca0132_build_controls()
7155 		err = ca0132_alt_add_bass_redirection_crossover(codec);  in ca0132_build_controls()
7156 		if (err < 0)  in ca0132_build_controls()
7158 		err = ca0132_alt_add_bass_redirection_switch(codec);  in ca0132_build_controls()
7159 		if (err < 0)  in ca0132_build_controls()
7161 		err = ca0132_alt_add_mic_boost_enum(codec);  in ca0132_build_controls()
7162 		if (err < 0)  in ca0132_build_controls()
7166 		 * header on the card, and aux-in is handled by the DBPro board.  in ca0132_build_controls()
7169 			err = ca0132_alt_add_input_enum(codec);  in ca0132_build_controls()
7170 			if (err < 0)  in ca0132_build_controls()
7178 		err = ae5_add_headphone_gain_enum(codec);  in ca0132_build_controls()
7179 		if (err < 0)  in ca0132_build_controls()
7181 		err = ae5_add_sound_filter_enum(codec);  in ca0132_build_controls()
7182 		if (err < 0)  in ca0132_build_controls()
7186 		err = zxr_add_headphone_gain_switch(codec);  in ca0132_build_controls()
7187 		if (err < 0)  in ca0132_build_controls()
7195 	add_tuning_ctls(codec);  in ca0132_build_controls()
7198 	err = snd_hda_jack_add_kctls(codec, &spec->autocfg);  in ca0132_build_controls()
7199 	if (err < 0)  in ca0132_build_controls()
7202 	if (spec->dig_out) {  in ca0132_build_controls()
7203 		err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out,  in ca0132_build_controls()
7204 						    spec->dig_out);  in ca0132_build_controls()
7205 		if (err < 0)  in ca0132_build_controls()
7207 		err = snd_hda_create_spdif_share_sw(codec, &spec->multiout);  in ca0132_build_controls()
7208 		if (err < 0)  in ca0132_build_controls()
7210 		/* spec->multiout.share_spdif = 1; */  in ca0132_build_controls()
7213 	if (spec->dig_in) {  in ca0132_build_controls()
7214 		err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in);  in ca0132_build_controls()
7215 		if (err < 0)  in ca0132_build_controls()
7220 		ca0132_alt_add_chmap_ctls(codec);  in ca0132_build_controls()
7222 	return 0;  in ca0132_build_controls()
7225 static int dbpro_build_controls(struct hda_codec *codec)  in dbpro_build_controls()  argument
7227 	struct ca0132_spec *spec = codec->spec;  in dbpro_build_controls()
7228 	int err = 0;  in dbpro_build_controls()
7230 	if (spec->dig_out) {  in dbpro_build_controls()
7231 		err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out,  in dbpro_build_controls()
7232 				spec->dig_out);  in dbpro_build_controls()
7233 		if (err < 0)  in dbpro_build_controls()
7237 	if (spec->dig_in) {  in dbpro_build_controls()
7238 		err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in);  in dbpro_build_controls()
7239 		if (err < 0)  in dbpro_build_controls()
7243 	return 0;  in dbpro_build_controls()
7289 static int ca0132_build_pcms(struct hda_codec *codec)  in ca0132_build_pcms()  argument
7291 	struct ca0132_spec *spec = codec->spec;  in ca0132_build_pcms()
7294 	info = snd_hda_codec_pcm_new(codec, "CA0132 Analog");  in ca0132_build_pcms()
7296 		return -ENOMEM;  in ca0132_build_pcms()
7298 		info->own_chmap = true;  in ca0132_build_pcms()
7299 		info->stream[SNDRV_PCM_STREAM_PLAYBACK].chmap  in ca0132_build_pcms()
7302 	info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback;  in ca0132_build_pcms()
7303 	info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0];  in ca0132_build_pcms()
7304 	info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max =  in ca0132_build_pcms()
7305 		spec->multiout.max_channels;  in ca0132_build_pcms()
7306 	info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;  in ca0132_build_pcms()
7307 	info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1;  in ca0132_build_pcms()
7308 	info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0];  in ca0132_build_pcms()
7312 		info = snd_hda_codec_pcm_new(codec, "CA0132 Analog Mic-In2");  in ca0132_build_pcms()
7314 			return -ENOMEM;  in ca0132_build_pcms()
7315 		info->stream[SNDRV_PCM_STREAM_CAPTURE] =  in ca0132_build_pcms()
7317 		info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1;  in ca0132_build_pcms()
7318 		info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[1];  in ca0132_build_pcms()
7321 	info = snd_hda_codec_pcm_new(codec, "CA0132 What U Hear");  in ca0132_build_pcms()
7323 		return -ENOMEM;  in ca0132_build_pcms()
7324 	info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;  in ca0132_build_pcms()
7325 	info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1;  in ca0132_build_pcms()
7326 	info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[2];  in ca0132_build_pcms()
7328 	if (!spec->dig_out && !spec->dig_in)  in ca0132_build_pcms()
7329 		return 0;  in ca0132_build_pcms()
7331 	info = snd_hda_codec_pcm_new(codec, "CA0132 Digital");  in ca0132_build_pcms()
7333 		return -ENOMEM;  in ca0132_build_pcms()
7334 	info->pcm_type = HDA_PCM_TYPE_SPDIF;  in ca0132_build_pcms()
7335 	if (spec->dig_out) {  in ca0132_build_pcms()
7336 		info->stream[SNDRV_PCM_STREAM_PLAYBACK] =  in ca0132_build_pcms()
7338 		info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out;  in ca0132_build_pcms()
7340 	if (spec->dig_in) {  in ca0132_build_pcms()
7341 		info->stream[SNDRV_PCM_STREAM_CAPTURE] =  in ca0132_build_pcms()
7343 		info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in;  in ca0132_build_pcms()
7346 	return 0;  in ca0132_build_pcms()
7349 static int dbpro_build_pcms(struct hda_codec *codec)  in dbpro_build_pcms()  argument
7351 	struct ca0132_spec *spec = codec->spec;  in dbpro_build_pcms()
7354 	info = snd_hda_codec_pcm_new(codec, "CA0132 Alt Analog");  in dbpro_build_pcms()
7356 		return -ENOMEM;  in dbpro_build_pcms()
7357 	info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;  in dbpro_build_pcms()
7358 	info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1;  in dbpro_build_pcms()
7359 	info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0];  in dbpro_build_pcms()
7362 	if (!spec->dig_out && !spec->dig_in)  in dbpro_build_pcms()
7363 		return 0;  in dbpro_build_pcms()
7365 	info = snd_hda_codec_pcm_new(codec, "CA0132 Digital");  in dbpro_build_pcms()
7367 		return -ENOMEM;  in dbpro_build_pcms()
7368 	info->pcm_type = HDA_PCM_TYPE_SPDIF;  in dbpro_build_pcms()
7369 	if (spec->dig_out) {  in dbpro_build_pcms()
7370 		info->stream[SNDRV_PCM_STREAM_PLAYBACK] =  in dbpro_build_pcms()
7372 		info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out;  in dbpro_build_pcms()
7374 	if (spec->dig_in) {  in dbpro_build_pcms()
7375 		info->stream[SNDRV_PCM_STREAM_CAPTURE] =  in dbpro_build_pcms()
7377 		info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in;  in dbpro_build_pcms()
7380 	return 0;  in dbpro_build_pcms()
7383 static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac)  in init_output()  argument
7386 		snd_hda_set_pin_ctl(codec, pin, PIN_HP);  in init_output()
7387 		if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)  in init_output()
7388 			snd_hda_codec_write(codec, pin, 0,  in init_output()
7392 	if (dac && (get_wcaps(codec, dac) & AC_WCAP_OUT_AMP))  in init_output()
7393 		snd_hda_codec_write(codec, dac, 0,  in init_output()
7397 static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc)  in init_input()  argument
7400 		snd_hda_set_pin_ctl(codec, pin, PIN_VREF80);  in init_input()
7401 		if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP)  in init_input()
7402 			snd_hda_codec_write(codec, pin, 0,  in init_input()
7404 					    AMP_IN_UNMUTE(0));  in init_input()
7406 	if (adc && (get_wcaps(codec, adc) & AC_WCAP_IN_AMP)) {  in init_input()
7407 		snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE,  in init_input()
7408 				    AMP_IN_UNMUTE(0));  in init_input()
7410 		/* init to 0 dB and unmute. */  in init_input()
7411 		snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0,  in init_input()
7412 					 HDA_AMP_VOLMASK, 0x5a);  in init_input()
7413 		snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0,  in init_input()
7414 					 HDA_AMP_MUTE, 0);  in init_input()
7418 static void refresh_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir)  in refresh_amp_caps()  argument
7422 	caps = snd_hda_param_read(codec, nid, dir == HDA_OUTPUT ?  in refresh_amp_caps()
7424 	snd_hda_override_amp_caps(codec, nid, dir, caps);  in refresh_amp_caps()
7428  * Switch between Digital built-in mic and analog mic.
7430 static void ca0132_set_dmic(struct hda_codec *codec, int enable)  in ca0132_set_dmic()  argument
7432 	struct ca0132_spec *spec = codec->spec;  in ca0132_set_dmic()
7437 	codec_dbg(codec, "ca0132_set_dmic: enable=%d\n", enable);  in ca0132_set_dmic()
7439 	oldval = stop_mic1(codec);  in ca0132_set_dmic()
7440 	ca0132_set_vipsource(codec, 0);  in ca0132_set_dmic()
7442 		/* set DMic input as 2-ch */  in ca0132_set_dmic()
7444 		dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_set_dmic()
7446 		val = spec->dmic_ctl;  in ca0132_set_dmic()
7447 		val |= 0x80;  in ca0132_set_dmic()
7448 		snd_hda_codec_write(codec, spec->input_pins[0], 0,  in ca0132_set_dmic()
7451 		if (!(spec->dmic_ctl & 0x20))  in ca0132_set_dmic()
7452 			chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 1);  in ca0132_set_dmic()
7456 		dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_set_dmic()
7458 		val = spec->dmic_ctl;  in ca0132_set_dmic()
7460 		val &= 0x5f;  in ca0132_set_dmic()
7461 		snd_hda_codec_write(codec, spec->input_pins[0], 0,  in ca0132_set_dmic()
7464 		if (!(spec->dmic_ctl & 0x20))  in ca0132_set_dmic()
7465 			chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0);  in ca0132_set_dmic()
7467 	ca0132_set_vipsource(codec, 1);  in ca0132_set_dmic()
7468 	resume_mic1(codec, oldval);  in ca0132_set_dmic()
7474 static void ca0132_init_dmic(struct hda_codec *codec)  in ca0132_init_dmic()  argument
7476 	struct ca0132_spec *spec = codec->spec;  in ca0132_init_dmic()
7484 	 * Bit 2-0: MPIO select  in ca0132_init_dmic()
7486 	 * Bit 7-4: reserved  in ca0132_init_dmic()
7488 	val = 0x01;  in ca0132_init_dmic()
7489 	snd_hda_codec_write(codec, spec->input_pins[0], 0,  in ca0132_init_dmic()
7493 	 * Bit 2-0: Data1 MPIO select  in ca0132_init_dmic()
7495 	 * Bit 6-4: Data2 MPIO select  in ca0132_init_dmic()
7498 	val = 0x83;  in ca0132_init_dmic()
7499 	snd_hda_codec_write(codec, spec->input_pins[0], 0,  in ca0132_init_dmic()
7502 	/* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first.  in ca0132_init_dmic()
7503 	 * Bit 3-0: Channel mask  in ca0132_init_dmic()
7510 		val = 0x33;  in ca0132_init_dmic()
7512 		val = 0x23;  in ca0132_init_dmic()
7514 	spec->dmic_ctl = val;  in ca0132_init_dmic()
7515 	snd_hda_codec_write(codec, spec->input_pins[0], 0,  in ca0132_init_dmic()
7522 static void ca0132_init_analog_mic2(struct hda_codec *codec)  in ca0132_init_analog_mic2()  argument
7524 	struct ca0132_spec *spec = codec->spec;  in ca0132_init_analog_mic2()
7526 	mutex_lock(&spec->chipio_mutex);  in ca0132_init_analog_mic2()
7528 	chipio_8051_write_exram_no_mutex(codec, 0x1920, 0x00);  in ca0132_init_analog_mic2()
7529 	chipio_8051_write_exram_no_mutex(codec, 0x192d, 0x00);  in ca0132_init_analog_mic2()
7531 	mutex_unlock(&spec->chipio_mutex);  in ca0132_init_analog_mic2()
7534 static void ca0132_refresh_widget_caps(struct hda_codec *codec)  in ca0132_refresh_widget_caps()  argument
7536 	struct ca0132_spec *spec = codec->spec;  in ca0132_refresh_widget_caps()
7539 	codec_dbg(codec, "ca0132_refresh_widget_caps.\n");  in ca0132_refresh_widget_caps()
7540 	snd_hda_codec_update_widgets(codec);  in ca0132_refresh_widget_caps()
7542 	for (i = 0; i < spec->multiout.num_dacs; i++)  in ca0132_refresh_widget_caps()
7543 		refresh_amp_caps(codec, spec->dacs[i], HDA_OUTPUT);  in ca0132_refresh_widget_caps()
7545 	for (i = 0; i < spec->num_outputs; i++)  in ca0132_refresh_widget_caps()
7546 		refresh_amp_caps(codec, spec->out_pins[i], HDA_OUTPUT);  in ca0132_refresh_widget_caps()
7548 	for (i = 0; i < spec->num_inputs; i++) {  in ca0132_refresh_widget_caps()
7549 		refresh_amp_caps(codec, spec->adcs[i], HDA_INPUT);  in ca0132_refresh_widget_caps()
7550 		refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT);  in ca0132_refresh_widget_caps()
7556 static void ca0132_alt_free_active_dma_channels(struct hda_codec *codec)  in ca0132_alt_free_active_dma_channels()  argument
7562 	status = chipio_read(codec, DSPDMAC_CHNLSTART_MODULE_OFFSET, &tmp);  in ca0132_alt_free_active_dma_channels()
7563 	if (status >= 0) {  in ca0132_alt_free_active_dma_channels()
7564 		/* AND against 0xfff to get the active channel bits. */  in ca0132_alt_free_active_dma_channels()
7565 		tmp = tmp & 0xfff;  in ca0132_alt_free_active_dma_channels()
7571 		codec_dbg(codec, "%s: Failed to read active DSP DMA channel register.\n",  in ca0132_alt_free_active_dma_channels()
7580 	for (i = 0; i < DSPDMAC_DMA_CFG_CHANNEL_COUNT; i++) {  in ca0132_alt_free_active_dma_channels()
7581 		if (dsp_is_dma_active(codec, i)) {  in ca0132_alt_free_active_dma_channels()
7582 			status = dspio_free_dma_chan(codec, i);  in ca0132_alt_free_active_dma_channels()
7583 			if (status < 0)  in ca0132_alt_free_active_dma_channels()
7584 				codec_dbg(codec, "%s: Failed to free active DSP DMA channel %d.\n",  in ca0132_alt_free_active_dma_channels()
7595  * cause of most of the no-audio on startup issues were due to improperly
7608  * DSP stream that uses the DMA channels. These are 0x0c, the audio output
7609  * stream, 0x03, analog mic 1, and 0x04, analog mic 2.
7611 static void ca0132_alt_start_dsp_audio_streams(struct hda_codec *codec)  in ca0132_alt_start_dsp_audio_streams()  argument
7613 	static const unsigned int dsp_dma_stream_ids[] = { 0x0c, 0x03, 0x04 };  in ca0132_alt_start_dsp_audio_streams()
7614 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_start_dsp_audio_streams()
7621 	mutex_lock(&spec->chipio_mutex);  in ca0132_alt_start_dsp_audio_streams()
7623 	for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) {  in ca0132_alt_start_dsp_audio_streams()
7624 		chipio_get_stream_control(codec, dsp_dma_stream_ids[i], &tmp);  in ca0132_alt_start_dsp_audio_streams()
7627 			chipio_set_stream_control(codec,  in ca0132_alt_start_dsp_audio_streams()
7628 					dsp_dma_stream_ids[i], 0);  in ca0132_alt_start_dsp_audio_streams()
7632 	mutex_unlock(&spec->chipio_mutex);  in ca0132_alt_start_dsp_audio_streams()
7639 	ca0132_alt_free_active_dma_channels(codec);  in ca0132_alt_start_dsp_audio_streams()
7641 	mutex_lock(&spec->chipio_mutex);  in ca0132_alt_start_dsp_audio_streams()
7643 	/* Make sure stream 0x0c is six channels. */  in ca0132_alt_start_dsp_audio_streams()
7644 	chipio_set_stream_channels(codec, 0x0c, 6);  in ca0132_alt_start_dsp_audio_streams()
7646 	for (i = 0; i < ARRAY_SIZE(dsp_dma_stream_ids); i++) {  in ca0132_alt_start_dsp_audio_streams()
7647 		chipio_set_stream_control(codec,  in ca0132_alt_start_dsp_audio_streams()
7654 	mutex_unlock(&spec->chipio_mutex);  in ca0132_alt_start_dsp_audio_streams()
7658  * The region of ChipIO memory from 0x190000-0x1903fc is a sort of 'audio
7660  * of an 8-bit destination, an 8-bit source, and an unknown 2-bit number
7661  * value. The 2-bit number value is seemingly 0 if inactive, 1 if active,
7664  * 0x0001f8c0
7668  * the region of exram memory from 0x1477-0x1575 has each byte represent an
7669  * entry within the 0x190000 range, and when a range of entries is in use, the
7670  * ending value is overwritten with 0xff.
7671  * 0x1578 in exram is a table of 0x25 entries, corresponding to the ChipIO
7672  * streamID's, where each entry is a starting 0x190000 port offset.
7673  * 0x159d in exram is the same as 0x1578, except it contains the ending port
7681  * 0x00-0x1f: HDA audio stream input/output ports.
7682  * 0x80-0xbf: Sample rate converter input/outputs. Only valid ports seem to
7683  *            have the lower-nibble set to 0x1, 0x2, and 0x9.
7684  * 0xc0-0xdf: DSP DMA input/output ports. Dynamically assigned.
7685  * 0xe0-0xff: DAC/ADC audio input/output ports.
7688  * 0x03: Mic1 ADC to DSP.
7689  * 0x04: Mic2 ADC to DSP.
7690  * 0x05: HDA node 0x02 audio stream to DSP.
7691  * 0x0f: DSP Mic exit to HDA node 0x07.
7692  * 0x0c: DSP processed audio to DACs.
7693  * 0x14: DAC0, front L/R.
7701 static void chipio_remap_stream(struct hda_codec *codec,  in chipio_remap_stream()  argument
7707 	chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id,  in chipio_remap_stream()
7711 	 * Check if the stream's port value is 0xff, because the 8051 may not  in chipio_remap_stream()
7715 	if (stream_offset == 0xff) {  in chipio_remap_stream()
7716 		for (i = 0; i < 5; i++) {  in chipio_remap_stream()
7719 			chipio_8051_read_exram(codec, 0x1578 + remap_data->stream_id,  in chipio_remap_stream()
7722 			if (stream_offset != 0xff)  in chipio_remap_stream()
7727 	if (stream_offset == 0xff) {  in chipio_remap_stream()
7728 		codec_info(codec, "%s: Stream 0x%02x ports aren't allocated, remap failed!\n",  in chipio_remap_stream()
7729 				__func__, remap_data->stream_id);  in chipio_remap_stream()
7733 	/* Offset isn't in bytes, its in 32-bit words, so multiply it by 4. */  in chipio_remap_stream()
7734 	stream_offset *= 0x04;  in chipio_remap_stream()
7735 	stream_offset += 0x190000;  in chipio_remap_stream()
7737 	for (i = 0; i < remap_data->count; i++) {  in chipio_remap_stream()
7738 		chipio_write_no_mutex(codec,  in chipio_remap_stream()
7739 				stream_offset + remap_data->offset[i],  in chipio_remap_stream()
7740 				remap_data->value[i]);  in chipio_remap_stream()
7744 	chipio_write_no_mutex(codec, 0x19042c, 0x00000001);  in chipio_remap_stream()
7751 	/* Non-zero values are floating point 0.000198. */
7752 	0x394f9e38, 0x394f9e38, 0x00000000, 0x00000000, 0x00000000, 0x00000000
7756 	/* Non-zero values are floating point 0.000220. */
7757 	0x00000000, 0x00000000, 0x3966afcd, 0x3966afcd, 0x3966afcd, 0x3966afcd
7761 	/* Non-zero values are floating point 0.000100. */
7762 	0x00000000, 0x00000000, 0x38d1b717, 0x38d1b717, 0x38d1b717, 0x38d1b717
7768 static void ca0132_alt_init_speaker_tuning(struct hda_codec *codec)  in ca0132_alt_init_speaker_tuning()  argument
7770 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_init_speaker_tuning()
7791 	dspio_set_uint_param(codec, 0x96, SPEAKER_TUNING_ENABLE_CENTER_EQ, tmp);  in ca0132_alt_init_speaker_tuning()
7796 		dspio_set_uint_param(codec, 0x96, i, tmp);  in ca0132_alt_init_speaker_tuning()
7801 		dspio_set_uint_param(codec, 0x96, i, tmp);  in ca0132_alt_init_speaker_tuning()
7804 	for (i = 0; i < 6; i++)  in ca0132_alt_init_speaker_tuning()
7805 		dspio_set_uint_param(codec, 0x96,  in ca0132_alt_init_speaker_tuning()
7810  * Initialize mic for non-chromebook ca0132 implementations.
7812 static void ca0132_alt_init_analog_mics(struct hda_codec *codec)  in ca0132_alt_init_analog_mics()  argument
7814 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_init_analog_mics()
7818 	chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);  in ca0132_alt_init_analog_mics()
7819 	chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);  in ca0132_alt_init_analog_mics()
7821 		chipio_set_conn_rate(codec, 0x0F, SR_96_000);  in ca0132_alt_init_analog_mics()
7825 	dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_alt_init_analog_mics()
7828 	chipio_set_conn_rate(codec, MEM_CONNID_MICIN2, SR_96_000);  in ca0132_alt_init_analog_mics()
7829 	chipio_set_conn_rate(codec, MEM_CONNID_MICOUT2, SR_96_000);  in ca0132_alt_init_analog_mics()
7831 		chipio_set_conn_rate(codec, 0x0F, SR_96_000);  in ca0132_alt_init_analog_mics()
7833 	dspio_set_uint_param(codec, 0x80, 0x01, tmp);  in ca0132_alt_init_analog_mics()
7837  * Sets the source of stream 0x14 to connpointID 0x48, and the destination
7838  * connpointID to 0x91. If this isn't done, the destination is 0x71, and
7842 static void sbz_connect_streams(struct hda_codec *codec)  in sbz_connect_streams()  argument
7844 	struct ca0132_spec *spec = codec->spec;  in sbz_connect_streams()
7846 	mutex_lock(&spec->chipio_mutex);  in sbz_connect_streams()
7848 	codec_dbg(codec, "Connect Streams entered, mutex locked and loaded.\n");  in sbz_connect_streams()
7850 	/* This value is 0x43 for 96khz, and 0x83 for 192khz. */  in sbz_connect_streams()
7851 	chipio_write_no_mutex(codec, 0x18a020, 0x00000043);  in sbz_connect_streams()
7853 	/* Setup stream 0x14 with it's source and destination points */  in sbz_connect_streams()
7854 	chipio_set_stream_source_dest(codec, 0x14, 0x48, 0x91);  in sbz_connect_streams()
7855 	chipio_set_conn_rate_no_mutex(codec, 0x48, SR_96_000);  in sbz_connect_streams()
7856 	chipio_set_conn_rate_no_mutex(codec, 0x91, SR_96_000);  in sbz_connect_streams()
7857 	chipio_set_stream_channels(codec, 0x14, 2);  in sbz_connect_streams()
7858 	chipio_set_stream_control(codec, 0x14, 1);  in sbz_connect_streams()
7860 	codec_dbg(codec, "Connect Streams exited, mutex released.\n");  in sbz_connect_streams()
7862 	mutex_unlock(&spec->chipio_mutex);  in sbz_connect_streams()
7871 static void sbz_chipio_startup_data(struct hda_codec *codec)  in sbz_chipio_startup_data()  argument
7874 	struct ca0132_spec *spec = codec->spec;  in sbz_chipio_startup_data()
7876 	mutex_lock(&spec->chipio_mutex);  in sbz_chipio_startup_data()
7877 	codec_dbg(codec, "Startup Data entered, mutex locked and loaded.\n");  in sbz_chipio_startup_data()
7880 	chipio_remap_stream(codec, &stream_remap_data[0]);  in sbz_chipio_startup_data()
7898 		chipio_remap_stream(codec, dsp_out_remap_data);  in sbz_chipio_startup_data()
7900 	codec_dbg(codec, "Startup Data exited, mutex released.\n");  in sbz_chipio_startup_data()
7901 	mutex_unlock(&spec->chipio_mutex);  in sbz_chipio_startup_data()
7904 static void ca0132_alt_dsp_initial_mic_setup(struct hda_codec *codec)  in ca0132_alt_dsp_initial_mic_setup()  argument
7906 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_dsp_initial_mic_setup()
7909 	chipio_set_stream_control(codec, 0x03, 0);  in ca0132_alt_dsp_initial_mic_setup()
7910 	chipio_set_stream_control(codec, 0x04, 0);  in ca0132_alt_dsp_initial_mic_setup()
7912 	chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);  in ca0132_alt_dsp_initial_mic_setup()
7913 	chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);  in ca0132_alt_dsp_initial_mic_setup()
7916 	dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_alt_dsp_initial_mic_setup()
7918 	chipio_set_stream_control(codec, 0x03, 1);  in ca0132_alt_dsp_initial_mic_setup()
7919 	chipio_set_stream_control(codec, 0x04, 1);  in ca0132_alt_dsp_initial_mic_setup()
7923 		chipio_write(codec, 0x18b098, 0x0000000c);  in ca0132_alt_dsp_initial_mic_setup()
7924 		chipio_write(codec, 0x18b09C, 0x0000000c);  in ca0132_alt_dsp_initial_mic_setup()
7927 		chipio_write(codec, 0x18b098, 0x0000000c);  in ca0132_alt_dsp_initial_mic_setup()
7928 		chipio_write(codec, 0x18b09c, 0x0000004c);  in ca0132_alt_dsp_initial_mic_setup()
7935 static void ae5_post_dsp_register_set(struct hda_codec *codec)  in ae5_post_dsp_register_set()  argument
7937 	struct ca0132_spec *spec = codec->spec;  in ae5_post_dsp_register_set()
7939 	chipio_8051_write_direct(codec, 0x93, 0x10);  in ae5_post_dsp_register_set()
7940 	chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);  in ae5_post_dsp_register_set()
7942 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7943 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7944 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7945 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7946 	writeb(0x00, spec->mem_base + 0x100);  in ae5_post_dsp_register_set()
7947 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7948 	writeb(0x00, spec->mem_base + 0x100);  in ae5_post_dsp_register_set()
7949 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7950 	writeb(0x00, spec->mem_base + 0x100);  in ae5_post_dsp_register_set()
7951 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7952 	writeb(0x00, spec->mem_base + 0x100);  in ae5_post_dsp_register_set()
7953 	writeb(0xff, spec->mem_base + 0x304);  in ae5_post_dsp_register_set()
7955 	ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x3f);  in ae5_post_dsp_register_set()
7956 	ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f);  in ae5_post_dsp_register_set()
7957 	ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);  in ae5_post_dsp_register_set()
7960 static void ae5_post_dsp_param_setup(struct hda_codec *codec)  in ae5_post_dsp_param_setup()  argument
7965 	 * AE-5's registry values in Windows.  in ae5_post_dsp_param_setup()
7967 	chipio_set_control_param(codec, 3, 0);  in ae5_post_dsp_param_setup()
7970 	 * change colors on the external LED strip connected to the AE-5.  in ae5_post_dsp_param_setup()
7972 	chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1);  in ae5_post_dsp_param_setup()
7974 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83);  in ae5_post_dsp_param_setup()
7975 	chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);  in ae5_post_dsp_param_setup()
7977 	chipio_8051_write_exram(codec, 0xfa92, 0x22);  in ae5_post_dsp_param_setup()
7980 static void ae5_post_dsp_pll_setup(struct hda_codec *codec)  in ae5_post_dsp_pll_setup()  argument
7982 	chipio_8051_write_pll_pmu(codec, 0x41, 0xc8);  in ae5_post_dsp_pll_setup()
7983 	chipio_8051_write_pll_pmu(codec, 0x45, 0xcc);  in ae5_post_dsp_pll_setup()
7984 	chipio_8051_write_pll_pmu(codec, 0x40, 0xcb);  in ae5_post_dsp_pll_setup()
7985 	chipio_8051_write_pll_pmu(codec, 0x43, 0xc7);  in ae5_post_dsp_pll_setup()
7986 	chipio_8051_write_pll_pmu(codec, 0x51, 0x8d);  in ae5_post_dsp_pll_setup()
7989 static void ae5_post_dsp_stream_setup(struct hda_codec *codec)  in ae5_post_dsp_stream_setup()  argument
7991 	struct ca0132_spec *spec = codec->spec;  in ae5_post_dsp_stream_setup()
7993 	mutex_lock(&spec->chipio_mutex);  in ae5_post_dsp_stream_setup()
7995 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81);  in ae5_post_dsp_stream_setup()
7997 	chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000);  in ae5_post_dsp_stream_setup()
7999 	chipio_set_stream_source_dest(codec, 0x5, 0x43, 0x0);  in ae5_post_dsp_stream_setup()
8001 	chipio_set_stream_source_dest(codec, 0x18, 0x9, 0xd0);  in ae5_post_dsp_stream_setup()
8002 	chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000);  in ae5_post_dsp_stream_setup()
8003 	chipio_set_stream_channels(codec, 0x18, 6);  in ae5_post_dsp_stream_setup()
8004 	chipio_set_stream_control(codec, 0x18, 1);  in ae5_post_dsp_stream_setup()
8006 	chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4);  in ae5_post_dsp_stream_setup()
8008 	chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7);  in ae5_post_dsp_stream_setup()
8010 	ca0113_mmio_command_set(codec, 0x48, 0x01, 0x80);  in ae5_post_dsp_stream_setup()
8012 	mutex_unlock(&spec->chipio_mutex);  in ae5_post_dsp_stream_setup()
8015 static void ae5_post_dsp_startup_data(struct hda_codec *codec)  in ae5_post_dsp_startup_data()  argument
8017 	struct ca0132_spec *spec = codec->spec;  in ae5_post_dsp_startup_data()
8019 	mutex_lock(&spec->chipio_mutex);  in ae5_post_dsp_startup_data()
8021 	chipio_write_no_mutex(codec, 0x189000, 0x0001f101);  in ae5_post_dsp_startup_data()
8022 	chipio_write_no_mutex(codec, 0x189004, 0x0001f101);  in ae5_post_dsp_startup_data()
8023 	chipio_write_no_mutex(codec, 0x189024, 0x00014004);  in ae5_post_dsp_startup_data()
8024 	chipio_write_no_mutex(codec, 0x189028, 0x0002000f);  in ae5_post_dsp_startup_data()
8026 	ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05);  in ae5_post_dsp_startup_data()
8027 	chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7);  in ae5_post_dsp_startup_data()
8028 	ca0113_mmio_command_set(codec, 0x48, 0x0b, 0x12);  in ae5_post_dsp_startup_data()
8029 	ca0113_mmio_command_set(codec, 0x48, 0x04, 0x00);  in ae5_post_dsp_startup_data()
8030 	ca0113_mmio_command_set(codec, 0x48, 0x06, 0x48);  in ae5_post_dsp_startup_data()
8031 	ca0113_mmio_command_set(codec, 0x48, 0x0a, 0x05);  in ae5_post_dsp_startup_data()
8032 	ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);  in ae5_post_dsp_startup_data()
8033 	ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);  in ae5_post_dsp_startup_data()
8034 	ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);  in ae5_post_dsp_startup_data()
8035 	ca0113_mmio_gpio_set(codec, 0, true);  in ae5_post_dsp_startup_data()
8036 	ca0113_mmio_gpio_set(codec, 1, true);  in ae5_post_dsp_startup_data()
8037 	ca0113_mmio_command_set(codec, 0x48, 0x07, 0x80);  in ae5_post_dsp_startup_data()
8039 	chipio_write_no_mutex(codec, 0x18b03c, 0x00000012);  in ae5_post_dsp_startup_data()
8041 	ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);  in ae5_post_dsp_startup_data()
8042 	ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);  in ae5_post_dsp_startup_data()
8044 	mutex_unlock(&spec->chipio_mutex);  in ae5_post_dsp_startup_data()
8047 static void ae7_post_dsp_setup_ports(struct hda_codec *codec)  in ae7_post_dsp_setup_ports()  argument
8049 	struct ca0132_spec *spec = codec->spec;  in ae7_post_dsp_setup_ports()
8051 	mutex_lock(&spec->chipio_mutex);  in ae7_post_dsp_setup_ports()
8054 	chipio_remap_stream(codec, &stream_remap_data[1]);  in ae7_post_dsp_setup_ports()
8056 	ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00);  in ae7_post_dsp_setup_ports()
8057 	ca0113_mmio_command_set(codec, 0x48, 0x0d, 0x40);  in ae7_post_dsp_setup_ports()
8058 	ca0113_mmio_command_set(codec, 0x48, 0x17, 0x00);  in ae7_post_dsp_setup_ports()
8059 	ca0113_mmio_command_set(codec, 0x48, 0x19, 0x00);  in ae7_post_dsp_setup_ports()
8060 	ca0113_mmio_command_set(codec, 0x48, 0x11, 0xff);  in ae7_post_dsp_setup_ports()
8061 	ca0113_mmio_command_set(codec, 0x48, 0x12, 0xff);  in ae7_post_dsp_setup_ports()
8062 	ca0113_mmio_command_set(codec, 0x48, 0x13, 0xff);  in ae7_post_dsp_setup_ports()
8063 	ca0113_mmio_command_set(codec, 0x48, 0x14, 0x7f);  in ae7_post_dsp_setup_ports()
8065 	mutex_unlock(&spec->chipio_mutex);  in ae7_post_dsp_setup_ports()
8068 static void ae7_post_dsp_asi_stream_setup(struct hda_codec *codec)  in ae7_post_dsp_asi_stream_setup()  argument
8070 	struct ca0132_spec *spec = codec->spec;  in ae7_post_dsp_asi_stream_setup()
8072 	mutex_lock(&spec->chipio_mutex);  in ae7_post_dsp_asi_stream_setup()
8074 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x81);  in ae7_post_dsp_asi_stream_setup()
8075 	ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00);  in ae7_post_dsp_asi_stream_setup()
8077 	chipio_set_conn_rate_no_mutex(codec, 0x70, SR_96_000);  in ae7_post_dsp_asi_stream_setup()
8079 	chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00);  in ae7_post_dsp_asi_stream_setup()
8080 	chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0);  in ae7_post_dsp_asi_stream_setup()
8082 	chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000);  in ae7_post_dsp_asi_stream_setup()
8083 	chipio_set_stream_channels(codec, 0x18, 6);  in ae7_post_dsp_asi_stream_setup()
8084 	chipio_set_stream_control(codec, 0x18, 1);  in ae7_post_dsp_asi_stream_setup()
8086 	chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 4);  in ae7_post_dsp_asi_stream_setup()
8088 	mutex_unlock(&spec->chipio_mutex);  in ae7_post_dsp_asi_stream_setup()
8091 static void ae7_post_dsp_pll_setup(struct hda_codec *codec)  in ae7_post_dsp_pll_setup()  argument
8094 		0x41, 0x45, 0x40, 0x43, 0x51  in ae7_post_dsp_pll_setup()
8097 		0xc8, 0xcc, 0xcb, 0xc7, 0x8d  in ae7_post_dsp_pll_setup()
8101 	for (i = 0; i < ARRAY_SIZE(addr); i++)  in ae7_post_dsp_pll_setup()
8102 		chipio_8051_write_pll_pmu_no_mutex(codec, addr[i], data[i]);  in ae7_post_dsp_pll_setup()
8105 static void ae7_post_dsp_asi_setup_ports(struct hda_codec *codec)  in ae7_post_dsp_asi_setup_ports()  argument
8107 	struct ca0132_spec *spec = codec->spec;  in ae7_post_dsp_asi_setup_ports()
8109 		0x0b, 0x04, 0x06, 0x0a, 0x0c, 0x11, 0x12, 0x13, 0x14  in ae7_post_dsp_asi_setup_ports()
8112 		0x12, 0x00, 0x48, 0x05, 0x5f, 0xff, 0xff, 0xff, 0x7f  in ae7_post_dsp_asi_setup_ports()
8116 	mutex_lock(&spec->chipio_mutex);  in ae7_post_dsp_asi_setup_ports()
8118 	chipio_8051_write_pll_pmu_no_mutex(codec, 0x43, 0xc7);  in ae7_post_dsp_asi_setup_ports()
8120 	chipio_write_no_mutex(codec, 0x189000, 0x0001f101);  in ae7_post_dsp_asi_setup_ports()
8121 	chipio_write_no_mutex(codec, 0x189004, 0x0001f101);  in ae7_post_dsp_asi_setup_ports()
8122 	chipio_write_no_mutex(codec, 0x189024, 0x00014004);  in ae7_post_dsp_asi_setup_ports()
8123 	chipio_write_no_mutex(codec, 0x189028, 0x0002000f);  in ae7_post_dsp_asi_setup_ports()
8125 	ae7_post_dsp_pll_setup(codec);  in ae7_post_dsp_asi_setup_ports()
8126 	chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7);  in ae7_post_dsp_asi_setup_ports()
8128 	for (i = 0; i < ARRAY_SIZE(target); i++)  in ae7_post_dsp_asi_setup_ports()
8129 		ca0113_mmio_command_set(codec, 0x48, target[i], data[i]);  in ae7_post_dsp_asi_setup_ports()
8131 	ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);  in ae7_post_dsp_asi_setup_ports()
8132 	ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);  in ae7_post_dsp_asi_setup_ports()
8133 	ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);  in ae7_post_dsp_asi_setup_ports()
8135 	chipio_set_stream_source_dest(codec, 0x21, 0x64, 0x56);  in ae7_post_dsp_asi_setup_ports()
8136 	chipio_set_stream_channels(codec, 0x21, 2);  in ae7_post_dsp_asi_setup_ports()
8137 	chipio_set_conn_rate_no_mutex(codec, 0x56, SR_8_000);  in ae7_post_dsp_asi_setup_ports()
8139 	chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_NODE_ID, 0x09);  in ae7_post_dsp_asi_setup_ports()
8145 	chipio_set_control_param_no_mutex(codec, 0x20, 0x21);  in ae7_post_dsp_asi_setup_ports()
8147 	chipio_write_no_mutex(codec, 0x18b038, 0x00000088);  in ae7_post_dsp_asi_setup_ports()
8151 	 * seemingly sends data to the HDA node 0x09, which is the digital  in ae7_post_dsp_asi_setup_ports()
8153 	 * know what data is being sent. Interestingly, the AE-5 seems to go  in ae7_post_dsp_asi_setup_ports()
8155 	 * step, but the AE-7 does.  in ae7_post_dsp_asi_setup_ports()
8158 	ca0113_mmio_gpio_set(codec, 0, 1);  in ae7_post_dsp_asi_setup_ports()
8159 	ca0113_mmio_gpio_set(codec, 1, 1);  in ae7_post_dsp_asi_setup_ports()
8161 	ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);  in ae7_post_dsp_asi_setup_ports()
8162 	chipio_write_no_mutex(codec, 0x18b03c, 0x00000000);  in ae7_post_dsp_asi_setup_ports()
8163 	ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x00);  in ae7_post_dsp_asi_setup_ports()
8164 	ca0113_mmio_command_set(codec, 0x48, 0x10, 0x00);  in ae7_post_dsp_asi_setup_ports()
8166 	chipio_set_stream_source_dest(codec, 0x05, 0x43, 0x00);  in ae7_post_dsp_asi_setup_ports()
8167 	chipio_set_stream_source_dest(codec, 0x18, 0x09, 0xd0);  in ae7_post_dsp_asi_setup_ports()
8169 	chipio_set_conn_rate_no_mutex(codec, 0xd0, SR_96_000);  in ae7_post_dsp_asi_setup_ports()
8170 	chipio_set_stream_channels(codec, 0x18, 6);  in ae7_post_dsp_asi_setup_ports()
8176 	ae7_post_dsp_pll_setup(codec);  in ae7_post_dsp_asi_setup_ports()
8177 	chipio_set_control_param_no_mutex(codec, CONTROL_PARAM_ASI, 7);  in ae7_post_dsp_asi_setup_ports()
8179 	mutex_unlock(&spec->chipio_mutex);  in ae7_post_dsp_asi_setup_ports()
8187 static void ae7_post_dsp_asi_setup(struct hda_codec *codec)  in ae7_post_dsp_asi_setup()  argument
8189 	chipio_8051_write_direct(codec, 0x93, 0x10);  in ae7_post_dsp_asi_setup()
8191 	chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);  in ae7_post_dsp_asi_setup()
8193 	ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);  in ae7_post_dsp_asi_setup()
8194 	ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);  in ae7_post_dsp_asi_setup()
8196 	chipio_set_control_param(codec, 3, 3);  in ae7_post_dsp_asi_setup()
8197 	chipio_set_control_flag(codec, CONTROL_FLAG_ASI_96KHZ, 1);  in ae7_post_dsp_asi_setup()
8199 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x724, 0x83);  in ae7_post_dsp_asi_setup()
8200 	chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);  in ae7_post_dsp_asi_setup()
8201 	snd_hda_codec_write(codec, 0x17, 0, 0x794, 0x00);  in ae7_post_dsp_asi_setup()
8203 	chipio_8051_write_exram(codec, 0xfa92, 0x22);  in ae7_post_dsp_asi_setup()
8205 	ae7_post_dsp_pll_setup(codec);  in ae7_post_dsp_asi_setup()
8206 	ae7_post_dsp_asi_stream_setup(codec);  in ae7_post_dsp_asi_setup()
8208 	chipio_8051_write_pll_pmu(codec, 0x43, 0xc7);  in ae7_post_dsp_asi_setup()
8210 	ae7_post_dsp_asi_setup_ports(codec);  in ae7_post_dsp_asi_setup()
8216 static void ca0132_setup_defaults(struct hda_codec *codec)  in ca0132_setup_defaults()  argument
8218 	struct ca0132_spec *spec = codec->spec;  in ca0132_setup_defaults()
8223 	if (spec->dsp_state != DSP_DOWNLOADED)  in ca0132_setup_defaults()
8228 	for (idx = 0; idx < num_fx; idx++) {  in ca0132_setup_defaults()
8229 		for (i = 0; i <= ca0132_effects[idx].params; i++) {  in ca0132_setup_defaults()
8230 			dspio_set_uint_param(codec, ca0132_effects[idx].mid,  in ca0132_setup_defaults()
8238 	dspio_set_uint_param(codec, 0x96, 0x3C, tmp);  in ca0132_setup_defaults()
8241 	dspio_set_uint_param(codec, 0x8f, 0x01, tmp);  in ca0132_setup_defaults()
8245 	dspio_set_uint_param(codec, 0x80, 0x00, tmp);  in ca0132_setup_defaults()
8246 	dspio_set_uint_param(codec, 0x80, 0x01, tmp);  in ca0132_setup_defaults()
8250 	dspio_set_uint_param(codec, 0x80, 0x05, tmp);  in ca0132_setup_defaults()
8254 	dspio_set_uint_param(codec, 0x31, 0x00, tmp);  in ca0132_setup_defaults()
8261 static void r3d_setup_defaults(struct hda_codec *codec)  in r3d_setup_defaults()  argument
8263 	struct ca0132_spec *spec = codec->spec;  in r3d_setup_defaults()
8268 	if (spec->dsp_state != DSP_DOWNLOADED)  in r3d_setup_defaults()
8271 	ca0132_alt_init_analog_mics(codec);  in r3d_setup_defaults()
8272 	ca0132_alt_start_dsp_audio_streams(codec);  in r3d_setup_defaults()
8276 	dspio_set_uint_param(codec, 0x96, 0x3C, tmp);  in r3d_setup_defaults()
8280 	dspio_set_uint_param(codec, 0x31, 0x00, tmp);  in r3d_setup_defaults()
8281 	chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);  in r3d_setup_defaults()
8284 	dspio_set_uint_param(codec, 0x32, 0x00, tmp);  in r3d_setup_defaults()
8287 		r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADED);  in r3d_setup_defaults()
8291 		ca0113_mmio_gpio_set(codec, 2, false);  in r3d_setup_defaults()
8292 		ca0113_mmio_gpio_set(codec, 4, true);  in r3d_setup_defaults()
8297 	for (idx = 0; idx < num_fx; idx++) {  in r3d_setup_defaults()
8298 		for (i = 0; i <= ca0132_effects[idx].params; i++) {  in r3d_setup_defaults()
8299 			dspio_set_uint_param(codec,  in r3d_setup_defaults()
8311 static void sbz_setup_defaults(struct hda_codec *codec)  in sbz_setup_defaults()  argument
8313 	struct ca0132_spec *spec = codec->spec;  in sbz_setup_defaults()
8318 	if (spec->dsp_state != DSP_DOWNLOADED)  in sbz_setup_defaults()
8321 	ca0132_alt_init_analog_mics(codec);  in sbz_setup_defaults()
8322 	ca0132_alt_start_dsp_audio_streams(codec);  in sbz_setup_defaults()
8323 	sbz_connect_streams(codec);  in sbz_setup_defaults()
8324 	sbz_chipio_startup_data(codec);  in sbz_setup_defaults()
8331 	dspio_set_uint_param(codec, 0x37, 0x08, tmp);  in sbz_setup_defaults()
8332 	dspio_set_uint_param(codec, 0x37, 0x10, tmp);  in sbz_setup_defaults()
8336 	dspio_set_uint_param(codec, 0x96, 0x3C, tmp);  in sbz_setup_defaults()
8340 	dspio_set_uint_param(codec, 0x31, 0x00, tmp);  in sbz_setup_defaults()
8341 	chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);  in sbz_setup_defaults()
8344 	dspio_set_uint_param(codec, 0x32, 0x00, tmp);  in sbz_setup_defaults()
8346 	ca0132_alt_dsp_initial_mic_setup(codec);  in sbz_setup_defaults()
8350 	for (idx = 0; idx < num_fx; idx++) {  in sbz_setup_defaults()
8351 		for (i = 0; i <= ca0132_effects[idx].params; i++) {  in sbz_setup_defaults()
8352 			dspio_set_uint_param(codec,  in sbz_setup_defaults()
8359 	ca0132_alt_init_speaker_tuning(codec);  in sbz_setup_defaults()
8363  * Setup default parameters for the Sound BlasterX AE-5 DSP.
8365 static void ae5_setup_defaults(struct hda_codec *codec)  in ae5_setup_defaults()  argument
8367 	struct ca0132_spec *spec = codec->spec;  in ae5_setup_defaults()
8372 	if (spec->dsp_state != DSP_DOWNLOADED)  in ae5_setup_defaults()
8375 	ca0132_alt_init_analog_mics(codec);  in ae5_setup_defaults()
8376 	ca0132_alt_start_dsp_audio_streams(codec);  in ae5_setup_defaults()
8380 	dspio_set_uint_param(codec, 0x96, 0x29, tmp);  in ae5_setup_defaults()
8381 	dspio_set_uint_param(codec, 0x96, 0x2a, tmp);  in ae5_setup_defaults()
8382 	dspio_set_uint_param(codec, 0x80, 0x0d, tmp);  in ae5_setup_defaults()
8383 	dspio_set_uint_param(codec, 0x80, 0x0e, tmp);  in ae5_setup_defaults()
8385 	ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);  in ae5_setup_defaults()
8386 	ca0113_mmio_gpio_set(codec, 0, false);  in ae5_setup_defaults()
8387 	ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);  in ae5_setup_defaults()
8391 	dspio_set_uint_param(codec, 0x37, 0x08, tmp);  in ae5_setup_defaults()
8392 	dspio_set_uint_param(codec, 0x37, 0x10, tmp);  in ae5_setup_defaults()
8396 	dspio_set_uint_param(codec, 0x96, 0x3C, tmp);  in ae5_setup_defaults()
8400 	dspio_set_uint_param(codec, 0x31, 0x00, tmp);  in ae5_setup_defaults()
8401 	chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);  in ae5_setup_defaults()
8404 	dspio_set_uint_param(codec, 0x32, 0x00, tmp);  in ae5_setup_defaults()
8406 	ca0132_alt_dsp_initial_mic_setup(codec);  in ae5_setup_defaults()
8407 	ae5_post_dsp_register_set(codec);  in ae5_setup_defaults()
8408 	ae5_post_dsp_param_setup(codec);  in ae5_setup_defaults()
8409 	ae5_post_dsp_pll_setup(codec);  in ae5_setup_defaults()
8410 	ae5_post_dsp_stream_setup(codec);  in ae5_setup_defaults()
8411 	ae5_post_dsp_startup_data(codec);  in ae5_setup_defaults()
8415 	for (idx = 0; idx < num_fx; idx++) {  in ae5_setup_defaults()
8416 		for (i = 0; i <= ca0132_effects[idx].params; i++) {  in ae5_setup_defaults()
8417 			dspio_set_uint_param(codec,  in ae5_setup_defaults()
8424 	ca0132_alt_init_speaker_tuning(codec);  in ae5_setup_defaults()
8428  * Setup default parameters for the Sound Blaster AE-7 DSP.
8430 static void ae7_setup_defaults(struct hda_codec *codec)  in ae7_setup_defaults()  argument
8432 	struct ca0132_spec *spec = codec->spec;  in ae7_setup_defaults()
8437 	if (spec->dsp_state != DSP_DOWNLOADED)  in ae7_setup_defaults()
8440 	ca0132_alt_init_analog_mics(codec);  in ae7_setup_defaults()
8441 	ca0132_alt_start_dsp_audio_streams(codec);  in ae7_setup_defaults()
8442 	ae7_post_dsp_setup_ports(codec);  in ae7_setup_defaults()
8445 	dspio_set_uint_param(codec, 0x96,  in ae7_setup_defaults()
8447 	dspio_set_uint_param(codec, 0x96,  in ae7_setup_defaults()
8450 	ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);  in ae7_setup_defaults()
8453 	dspio_set_uint_param(codec, 0x80, 0x0d, tmp);  in ae7_setup_defaults()
8454 	dspio_set_uint_param(codec, 0x80, 0x0e, tmp);  in ae7_setup_defaults()
8456 	ca0113_mmio_gpio_set(codec, 0, false);  in ae7_setup_defaults()
8460 	dspio_set_uint_param(codec, 0x37, 0x08, tmp);  in ae7_setup_defaults()
8461 	dspio_set_uint_param(codec, 0x37, 0x10, tmp);  in ae7_setup_defaults()
8465 	dspio_set_uint_param(codec, 0x96, 0x3C, tmp);  in ae7_setup_defaults()
8469 	dspio_set_uint_param(codec, 0x31, 0x00, tmp);  in ae7_setup_defaults()
8470 	chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);  in ae7_setup_defaults()
8473 	dspio_set_uint_param(codec, 0x32, 0x00, tmp);  in ae7_setup_defaults()
8474 	ca0113_mmio_command_set(codec, 0x30, 0x28, 0x00);  in ae7_setup_defaults()
8480 	ca0132_alt_init_analog_mics(codec);  in ae7_setup_defaults()
8482 	ae7_post_dsp_asi_setup(codec);  in ae7_setup_defaults()
8485 	 * Not sure why, but these are both set to 1. They're only set to 0  in ae7_setup_defaults()
8488 	ca0113_mmio_gpio_set(codec, 0, true);  in ae7_setup_defaults()
8489 	ca0113_mmio_gpio_set(codec, 1, true);  in ae7_setup_defaults()
8492 	ca0113_mmio_command_set(codec, 0x48, 0x0f, 0x04);  in ae7_setup_defaults()
8493 	ca0113_mmio_command_set(codec, 0x48, 0x10, 0x04);  in ae7_setup_defaults()
8494 	ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x80);  in ae7_setup_defaults()
8498 	for (idx = 0; idx < num_fx; idx++) {  in ae7_setup_defaults()
8499 		for (i = 0; i <= ca0132_effects[idx].params; i++) {  in ae7_setup_defaults()
8500 			dspio_set_uint_param(codec,  in ae7_setup_defaults()
8507 	ca0132_alt_init_speaker_tuning(codec);  in ae7_setup_defaults()
8513 static void ca0132_init_flags(struct hda_codec *codec)  in ca0132_init_flags()  argument
8515 	struct ca0132_spec *spec = codec->spec;  in ca0132_init_flags()
8518 		chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, 1);  in ca0132_init_flags()
8519 		chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, 1);  in ca0132_init_flags()
8520 		chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, 1);  in ca0132_init_flags()
8521 		chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, 1);  in ca0132_init_flags()
8522 		chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, 1);  in ca0132_init_flags()
8523 		chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);  in ca0132_init_flags()
8524 		chipio_set_control_flag(codec, CONTROL_FLAG_SPDIF2OUT, 0);  in ca0132_init_flags()
8525 		chipio_set_control_flag(codec,  in ca0132_init_flags()
8526 				CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0);  in ca0132_init_flags()
8527 		chipio_set_control_flag(codec,  in ca0132_init_flags()
8530 		chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);  in ca0132_init_flags()
8531 		chipio_set_control_flag(codec,  in ca0132_init_flags()
8532 				CONTROL_FLAG_PORT_A_COMMON_MODE, 0);  in ca0132_init_flags()
8533 		chipio_set_control_flag(codec,  in ca0132_init_flags()
8534 				CONTROL_FLAG_PORT_D_COMMON_MODE, 0);  in ca0132_init_flags()
8535 		chipio_set_control_flag(codec,  in ca0132_init_flags()
8536 				CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0);  in ca0132_init_flags()
8537 		chipio_set_control_flag(codec,  in ca0132_init_flags()
8538 				CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0);  in ca0132_init_flags()
8539 		chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_HIGH_PASS, 1);  in ca0132_init_flags()
8546 static void ca0132_init_params(struct hda_codec *codec)  in ca0132_init_params()  argument
8548 	struct ca0132_spec *spec = codec->spec;  in ca0132_init_params()
8551 		chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);  in ca0132_init_params()
8552 		chipio_set_conn_rate(codec, 0x0B, SR_48_000);  in ca0132_init_params()
8553 		chipio_set_control_param(codec, CONTROL_PARAM_SPDIF1_SOURCE, 0);  in ca0132_init_params()
8554 		chipio_set_control_param(codec, 0, 0);  in ca0132_init_params()
8555 		chipio_set_control_param(codec, CONTROL_PARAM_VIP_SOURCE, 0);  in ca0132_init_params()
8558 	chipio_set_control_param(codec, CONTROL_PARAM_PORTA_160OHM_GAIN, 6);  in ca0132_init_params()
8559 	chipio_set_control_param(codec, CONTROL_PARAM_PORTD_160OHM_GAIN, 6);  in ca0132_init_params()
8562 static void ca0132_set_dsp_msr(struct hda_codec *codec, bool is96k)  in ca0132_set_dsp_msr()  argument
8564 	chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, is96k);  in ca0132_set_dsp_msr()
8565 	chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, is96k);  in ca0132_set_dsp_msr()
8566 	chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, is96k);  in ca0132_set_dsp_msr()
8567 	chipio_set_control_flag(codec, CONTROL_FLAG_SRC_CLOCK_196MHZ, is96k);  in ca0132_set_dsp_msr()
8568 	chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, is96k);  in ca0132_set_dsp_msr()
8569 	chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, is96k);  in ca0132_set_dsp_msr()
8571 	chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_96_000);  in ca0132_set_dsp_msr()
8572 	chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_96_000);  in ca0132_set_dsp_msr()
8573 	chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);  in ca0132_set_dsp_msr()
8576 static bool ca0132_download_dsp_images(struct hda_codec *codec)  in ca0132_download_dsp_images()  argument
8579 	struct ca0132_spec *spec = codec->spec;  in ca0132_download_dsp_images()
8592 					codec->card->dev) != 0)  in ca0132_download_dsp_images()
8593 			codec_dbg(codec, "Desktop firmware not found.");  in ca0132_download_dsp_images()
8595 			codec_dbg(codec, "Desktop firmware selected.");  in ca0132_download_dsp_images()
8599 					codec->card->dev) != 0)  in ca0132_download_dsp_images()
8600 			codec_dbg(codec, "Recon3Di alt firmware not detected.");  in ca0132_download_dsp_images()
8602 			codec_dbg(codec, "Recon3Di firmware selected.");  in ca0132_download_dsp_images()
8609 	 * exists for your particular codec.  in ca0132_download_dsp_images()
8612 		codec_dbg(codec, "Default firmware selected.");  in ca0132_download_dsp_images()
8614 					codec->card->dev) != 0)  in ca0132_download_dsp_images()
8618 	dsp_os_image = (struct dsp_image_seg *)(fw_entry->data);  in ca0132_download_dsp_images()
8619 	if (dspload_image(codec, dsp_os_image, 0, 0, true, 0)) {  in ca0132_download_dsp_images()
8620 		codec_err(codec, "ca0132 DSP load image failed\n");  in ca0132_download_dsp_images()
8624 	dsp_loaded = dspload_wait_loaded(codec);  in ca0132_download_dsp_images()
8632 static void ca0132_download_dsp(struct hda_codec *codec)  in ca0132_download_dsp()  argument
8634 	struct ca0132_spec *spec = codec->spec;  in ca0132_download_dsp()
8640 	if (spec->dsp_state == DSP_DOWNLOAD_FAILED)  in ca0132_download_dsp()
8643 	chipio_enable_clocks(codec);  in ca0132_download_dsp()
8644 	if (spec->dsp_state != DSP_DOWNLOADED) {  in ca0132_download_dsp()
8645 		spec->dsp_state = DSP_DOWNLOADING;  in ca0132_download_dsp()
8647 		if (!ca0132_download_dsp_images(codec))  in ca0132_download_dsp()
8648 			spec->dsp_state = DSP_DOWNLOAD_FAILED;  in ca0132_download_dsp()
8650 			spec->dsp_state = DSP_DOWNLOADED;  in ca0132_download_dsp()
8654 	if (spec->dsp_state == DSP_DOWNLOADED && !ca0132_use_alt_functions(spec))  in ca0132_download_dsp()
8655 		ca0132_set_dsp_msr(codec, true);  in ca0132_download_dsp()
8658 static void ca0132_process_dsp_response(struct hda_codec *codec,  in ca0132_process_dsp_response()  argument
8661 	struct ca0132_spec *spec = codec->spec;  in ca0132_process_dsp_response()
8663 	codec_dbg(codec, "ca0132_process_dsp_response\n");  in ca0132_process_dsp_response()
8664 	snd_hda_power_up_pm(codec);  in ca0132_process_dsp_response()
8665 	if (spec->wait_scp) {  in ca0132_process_dsp_response()
8666 		if (dspio_get_response_data(codec) >= 0)  in ca0132_process_dsp_response()
8667 			spec->wait_scp = 0;  in ca0132_process_dsp_response()
8670 	dspio_clear_response_queue(codec);  in ca0132_process_dsp_response()
8671 	snd_hda_power_down_pm(codec);  in ca0132_process_dsp_response()
8674 static void hp_callback(struct hda_codec *codec, struct hda_jack_callback *cb)  in hp_callback()  argument
8676 	struct ca0132_spec *spec = codec->spec;  in hp_callback()
8679 	/* Delay enabling the HP amp, to let the mic-detection  in hp_callback()
8682 	tbl = snd_hda_jack_tbl_get(codec, cb->nid);  in hp_callback()
8684 		tbl->block_report = 1;  in hp_callback()
8685 	schedule_delayed_work(&spec->unsol_hp_work, msecs_to_jiffies(500));  in hp_callback()
8688 static void amic_callback(struct hda_codec *codec, struct hda_jack_callback *cb)  in amic_callback()  argument
8690 	struct ca0132_spec *spec = codec->spec;  in amic_callback()
8693 		ca0132_alt_select_in(codec);  in amic_callback()
8695 		ca0132_select_mic(codec);  in amic_callback()
8698 static void ca0132_setup_unsol(struct hda_codec *codec)  in ca0132_setup_unsol()  argument
8700 	struct ca0132_spec *spec = codec->spec;  in ca0132_setup_unsol()
8701 	snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_hp, hp_callback);  in ca0132_setup_unsol()
8702 	snd_hda_jack_detect_enable_callback(codec, spec->unsol_tag_amic1,  in ca0132_setup_unsol()
8704 	snd_hda_jack_detect_enable_callback(codec, UNSOL_TAG_DSP,  in ca0132_setup_unsol()
8708 		snd_hda_jack_detect_enable_callback(codec,  in ca0132_setup_unsol()
8709 			spec->unsol_tag_front_hp, hp_callback);  in ca0132_setup_unsol()
8719 	{0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
8726 	{0x01, AC_VERB_SET_POWER_STATE, 0x03},
8728 	{0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
8736 	{0x15, 0x70D, 0xF0},
8737 	{0x15, 0x70E, 0xFE},
8738 	{0x15, 0x707, 0x75},
8739 	{0x15, 0x707, 0xD3},
8740 	{0x15, 0x707, 0x09},
8741 	{0x15, 0x707, 0x53},
8742 	{0x15, 0x707, 0xD4},
8743 	{0x15, 0x707, 0xEF},
8744 	{0x15, 0x707, 0x75},
8745 	{0x15, 0x707, 0xD3},
8746 	{0x15, 0x707, 0x09},
8747 	{0x15, 0x707, 0x02},
8748 	{0x15, 0x707, 0x37},
8749 	{0x15, 0x707, 0x78},
8750 	{0x15, 0x53C, 0xCE},
8751 	{0x15, 0x575, 0xC9},
8752 	{0x15, 0x53D, 0xCE},
8753 	{0x15, 0x5B7, 0xC9},
8754 	{0x15, 0x70D, 0xE8},
8755 	{0x15, 0x70E, 0xFE},
8756 	{0x15, 0x707, 0x02},
8757 	{0x15, 0x707, 0x68},
8758 	{0x15, 0x707, 0x62},
8759 	{0x15, 0x53A, 0xCE},
8760 	{0x15, 0x546, 0xC9},
8761 	{0x15, 0x53B, 0xCE},
8762 	{0x15, 0x5E8, 0xC9},
8768 	{0x15, 0x70D, 0x20},
8769 	{0x15, 0x70E, 0x19},
8770 	{0x15, 0x707, 0x00},
8771 	{0x15, 0x539, 0xCE},
8772 	{0x15, 0x546, 0xC9},
8773 	{0x15, 0x70D, 0xB7},
8774 	{0x15, 0x70E, 0x09},
8775 	{0x15, 0x707, 0x10},
8776 	{0x15, 0x70D, 0xAF},
8777 	{0x15, 0x70E, 0x09},
8778 	{0x15, 0x707, 0x01},
8779 	{0x15, 0x707, 0x05},
8780 	{0x15, 0x70D, 0x73},
8781 	{0x15, 0x70E, 0x09},
8782 	{0x15, 0x707, 0x14},
8783 	{0x15, 0x6FF, 0xC4},
8787 static void ca0132_init_chip(struct hda_codec *codec)  in ca0132_init_chip()  argument
8789 	struct ca0132_spec *spec = codec->spec;  in ca0132_init_chip()
8794 	mutex_init(&spec->chipio_mutex);  in ca0132_init_chip()
8803 		chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);  in ca0132_init_chip()
8804 		chipio_write_no_mutex(codec, 0x18b0a4, 0x000000c2);  in ca0132_init_chip()
8806 		snd_hda_codec_write(codec, codec->core.afg, 0,  in ca0132_init_chip()
8807 			    AC_VERB_SET_CODEC_RESET, 0);  in ca0132_init_chip()
8808 		snd_hda_codec_write(codec, codec->core.afg, 0,  in ca0132_init_chip()
8809 			    AC_VERB_SET_CODEC_RESET, 0);  in ca0132_init_chip()
8812 	spec->cur_out_type = SPEAKER_OUT;  in ca0132_init_chip()
8814 		spec->cur_mic_type = DIGITAL_MIC;  in ca0132_init_chip()
8816 		spec->cur_mic_type = REAR_MIC;  in ca0132_init_chip()
8818 	spec->cur_mic_boost = 0;  in ca0132_init_chip()
8820 	for (i = 0; i < VNODES_COUNT; i++) {  in ca0132_init_chip()
8821 		spec->vnode_lvol[i] = 0x5a;  in ca0132_init_chip()
8822 		spec->vnode_rvol[i] = 0x5a;  in ca0132_init_chip()
8823 		spec->vnode_lswitch[i] = 0;  in ca0132_init_chip()
8824 		spec->vnode_rswitch[i] = 0;  in ca0132_init_chip()
8831 	for (i = 0; i < num_fx; i++) {  in ca0132_init_chip()
8832 		on = (unsigned int)ca0132_effects[i].reqs[0];  in ca0132_init_chip()
8833 		spec->effects_switch[i] = on ? 1 : 0;  in ca0132_init_chip()
8837 	 * ca0132 codecs. Also sets x-bass crossover frequency to 80hz.  in ca0132_init_chip()
8841 		spec->speaker_range_val[0] = 1;  in ca0132_init_chip()
8842 		spec->speaker_range_val[1] = 1;  in ca0132_init_chip()
8844 		spec->xbass_xover_freq = 8;  in ca0132_init_chip()
8845 		for (i = 0; i < EFFECT_LEVEL_SLIDERS; i++)  in ca0132_init_chip()
8846 			spec->fx_ctl_val[i] = effect_slider_defaults[i];  in ca0132_init_chip()
8848 		spec->bass_redirect_xover_freq = 8;  in ca0132_init_chip()
8851 	spec->voicefx_val = 0;  in ca0132_init_chip()
8852 	spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID] = 1;  in ca0132_init_chip()
8853 	spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0;  in ca0132_init_chip()
8856 	 * The ZxR doesn't have a front panel header, and it's line-in is on  in ca0132_init_chip()
8858 	 * to make sure that spec->in_enum_val is set properly.  in ca0132_init_chip()
8861 		spec->in_enum_val = REAR_MIC;  in ca0132_init_chip()
8864 	ca0132_init_tuning_defaults(codec);  in ca0132_init_chip()
8872 static void r3di_gpio_shutdown(struct hda_codec *codec)  in r3di_gpio_shutdown()  argument
8874 	snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, 0x00);  in r3di_gpio_shutdown()
8880 static void sbz_region2_exit(struct hda_codec *codec)  in sbz_region2_exit()  argument
8882 	struct ca0132_spec *spec = codec->spec;  in sbz_region2_exit()
8885 	for (i = 0; i < 4; i++)  in sbz_region2_exit()
8886 		writeb(0x0, spec->mem_base + 0x100);  in sbz_region2_exit()
8887 	for (i = 0; i < 8; i++)  in sbz_region2_exit()
8888 		writeb(0xb3, spec->mem_base + 0x304);  in sbz_region2_exit()
8890 	ca0113_mmio_gpio_set(codec, 0, false);  in sbz_region2_exit()
8891 	ca0113_mmio_gpio_set(codec, 1, false);  in sbz_region2_exit()
8892 	ca0113_mmio_gpio_set(codec, 4, true);  in sbz_region2_exit()
8893 	ca0113_mmio_gpio_set(codec, 5, false);  in sbz_region2_exit()
8894 	ca0113_mmio_gpio_set(codec, 7, false);  in sbz_region2_exit()
8897 static void sbz_set_pin_ctl_default(struct hda_codec *codec)  in sbz_set_pin_ctl_default()  argument
8899 	static const hda_nid_t pins[] = {0x0B, 0x0C, 0x0E, 0x12, 0x13};  in sbz_set_pin_ctl_default()
8902 	snd_hda_codec_write(codec, 0x11, 0,  in sbz_set_pin_ctl_default()
8903 			AC_VERB_SET_PIN_WIDGET_CONTROL, 0x40);  in sbz_set_pin_ctl_default()
8905 	for (i = 0; i < ARRAY_SIZE(pins); i++)  in sbz_set_pin_ctl_default()
8906 		snd_hda_codec_write(codec, pins[i], 0,  in sbz_set_pin_ctl_default()
8907 				AC_VERB_SET_PIN_WIDGET_CONTROL, 0x00);  in sbz_set_pin_ctl_default()
8910 static void ca0132_clear_unsolicited(struct hda_codec *codec)  in ca0132_clear_unsolicited()  argument
8912 	static const hda_nid_t pins[] = {0x0B, 0x0E, 0x0F, 0x10, 0x11, 0x12, 0x13};  in ca0132_clear_unsolicited()
8915 	for (i = 0; i < ARRAY_SIZE(pins); i++) {  in ca0132_clear_unsolicited()
8916 		snd_hda_codec_write(codec, pins[i], 0,  in ca0132_clear_unsolicited()
8917 				AC_VERB_SET_UNSOLICITED_ENABLE, 0x00);  in ca0132_clear_unsolicited()
8922 static void sbz_gpio_shutdown_commands(struct hda_codec *codec, int dir,  in sbz_gpio_shutdown_commands()  argument
8925 	if (dir >= 0)  in sbz_gpio_shutdown_commands()
8926 		snd_hda_codec_write(codec, 0x01, 0,  in sbz_gpio_shutdown_commands()
8928 	if (mask >= 0)  in sbz_gpio_shutdown_commands()
8929 		snd_hda_codec_write(codec, 0x01, 0,  in sbz_gpio_shutdown_commands()
8932 	if (data >= 0)  in sbz_gpio_shutdown_commands()
8933 		snd_hda_codec_write(codec, 0x01, 0,  in sbz_gpio_shutdown_commands()
8937 static void zxr_dbpro_power_state_shutdown(struct hda_codec *codec)  in zxr_dbpro_power_state_shutdown()  argument
8939 	static const hda_nid_t pins[] = {0x05, 0x0c, 0x09, 0x0e, 0x08, 0x11, 0x01};  in zxr_dbpro_power_state_shutdown()
8942 	for (i = 0; i < ARRAY_SIZE(pins); i++)  in zxr_dbpro_power_state_shutdown()
8943 		snd_hda_codec_write(codec, pins[i], 0,  in zxr_dbpro_power_state_shutdown()
8944 				AC_VERB_SET_POWER_STATE, 0x03);  in zxr_dbpro_power_state_shutdown()
8947 static void sbz_exit_chip(struct hda_codec *codec)  in sbz_exit_chip()  argument
8949 	chipio_set_stream_control(codec, 0x03, 0);  in sbz_exit_chip()
8950 	chipio_set_stream_control(codec, 0x04, 0);  in sbz_exit_chip()
8953 	sbz_gpio_shutdown_commands(codec, 0x07, 0x07, -1);  in sbz_exit_chip()
8954 	sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x05);  in sbz_exit_chip()
8955 	sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x01);  in sbz_exit_chip()
8957 	chipio_set_stream_control(codec, 0x14, 0);  in sbz_exit_chip()
8958 	chipio_set_stream_control(codec, 0x0C, 0);  in sbz_exit_chip()
8960 	chipio_set_conn_rate(codec, 0x41, SR_192_000);  in sbz_exit_chip()
8961 	chipio_set_conn_rate(codec, 0x91, SR_192_000);  in sbz_exit_chip()
8963 	chipio_write(codec, 0x18a020, 0x00000083);  in sbz_exit_chip()
8965 	sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x03);  in sbz_exit_chip()
8966 	sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x07);  in sbz_exit_chip()
8967 	sbz_gpio_shutdown_commands(codec, 0x07, 0x07, 0x06);  in sbz_exit_chip()
8969 	chipio_set_stream_control(codec, 0x0C, 0);  in sbz_exit_chip()
8971 	chipio_set_control_param(codec, 0x0D, 0x24);  in sbz_exit_chip()
8973 	ca0132_clear_unsolicited(codec);  in sbz_exit_chip()
8974 	sbz_set_pin_ctl_default(codec);  in sbz_exit_chip()
8976 	snd_hda_codec_write(codec, 0x0B, 0,  in sbz_exit_chip()
8977 		AC_VERB_SET_EAPD_BTLENABLE, 0x00);  in sbz_exit_chip()
8979 	sbz_region2_exit(codec);  in sbz_exit_chip()
8982 static void r3d_exit_chip(struct hda_codec *codec)  in r3d_exit_chip()  argument
8984 	ca0132_clear_unsolicited(codec);  in r3d_exit_chip()
8985 	snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);  in r3d_exit_chip()
8986 	snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x5b);  in r3d_exit_chip()
8989 static void ae5_exit_chip(struct hda_codec *codec)  in ae5_exit_chip()  argument
8991 	chipio_set_stream_control(codec, 0x03, 0);  in ae5_exit_chip()
8992 	chipio_set_stream_control(codec, 0x04, 0);  in ae5_exit_chip()
8994 	ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);  in ae5_exit_chip()
8995 	ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);  in ae5_exit_chip()
8996 	ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);  in ae5_exit_chip()
8997 	ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00);  in ae5_exit_chip()
8998 	ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00);  in ae5_exit_chip()
8999 	ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x00);  in ae5_exit_chip()
9000 	ca0113_mmio_gpio_set(codec, 0, false);  in ae5_exit_chip()
9001 	ca0113_mmio_gpio_set(codec, 1, false);  in ae5_exit_chip()
9003 	snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);  in ae5_exit_chip()
9004 	snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);  in ae5_exit_chip()
9006 	chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);  in ae5_exit_chip()
9008 	chipio_set_stream_control(codec, 0x18, 0);  in ae5_exit_chip()
9009 	chipio_set_stream_control(codec, 0x0c, 0);  in ae5_exit_chip()
9011 	snd_hda_codec_write(codec, 0x01, 0, 0x724, 0x83);  in ae5_exit_chip()
9014 static void ae7_exit_chip(struct hda_codec *codec)  in ae7_exit_chip()  argument
9016 	chipio_set_stream_control(codec, 0x18, 0);  in ae7_exit_chip()
9017 	chipio_set_stream_source_dest(codec, 0x21, 0xc8, 0xc8);  in ae7_exit_chip()
9018 	chipio_set_stream_channels(codec, 0x21, 0);  in ae7_exit_chip()
9019 	chipio_set_control_param(codec, CONTROL_PARAM_NODE_ID, 0x09);  in ae7_exit_chip()
9020 	chipio_set_control_param(codec, 0x20, 0x01);  in ae7_exit_chip()
9022 	chipio_set_control_param(codec, CONTROL_PARAM_ASI, 0);  in ae7_exit_chip()
9024 	chipio_set_stream_control(codec, 0x18, 0);  in ae7_exit_chip()
9025 	chipio_set_stream_control(codec, 0x0c, 0);  in ae7_exit_chip()
9027 	ca0113_mmio_command_set(codec, 0x30, 0x2b, 0x00);  in ae7_exit_chip()
9028 	snd_hda_codec_write(codec, 0x15, 0, 0x724, 0x83);  in ae7_exit_chip()
9029 	ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);  in ae7_exit_chip()
9030 	ca0113_mmio_command_set(codec, 0x30, 0x30, 0x00);  in ae7_exit_chip()
9031 	ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x00);  in ae7_exit_chip()
9032 	ca0113_mmio_gpio_set(codec, 0, false);  in ae7_exit_chip()
9033 	ca0113_mmio_gpio_set(codec, 1, false);  in ae7_exit_chip()
9034 	ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);  in ae7_exit_chip()
9036 	snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);  in ae7_exit_chip()
9037 	snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);  in ae7_exit_chip()
9040 static void zxr_exit_chip(struct hda_codec *codec)  in zxr_exit_chip()  argument
9042 	chipio_set_stream_control(codec, 0x03, 0);  in zxr_exit_chip()
9043 	chipio_set_stream_control(codec, 0x04, 0);  in zxr_exit_chip()
9044 	chipio_set_stream_control(codec, 0x14, 0);  in zxr_exit_chip()
9045 	chipio_set_stream_control(codec, 0x0C, 0);  in zxr_exit_chip()
9047 	chipio_set_conn_rate(codec, 0x41, SR_192_000);  in zxr_exit_chip()
9048 	chipio_set_conn_rate(codec, 0x91, SR_192_000);  in zxr_exit_chip()
9050 	chipio_write(codec, 0x18a020, 0x00000083);  in zxr_exit_chip()
9052 	snd_hda_codec_write(codec, 0x01, 0, 0x793, 0x00);  in zxr_exit_chip()
9053 	snd_hda_codec_write(codec, 0x01, 0, 0x794, 0x53);  in zxr_exit_chip()
9055 	ca0132_clear_unsolicited(codec);  in zxr_exit_chip()
9056 	sbz_set_pin_ctl_default(codec);  in zxr_exit_chip()
9057 	snd_hda_codec_write(codec, 0x0B, 0, AC_VERB_SET_EAPD_BTLENABLE, 0x00);  in zxr_exit_chip()
9059 	ca0113_mmio_gpio_set(codec, 5, false);  in zxr_exit_chip()
9060 	ca0113_mmio_gpio_set(codec, 2, false);  in zxr_exit_chip()
9061 	ca0113_mmio_gpio_set(codec, 3, false);  in zxr_exit_chip()
9062 	ca0113_mmio_gpio_set(codec, 0, false);  in zxr_exit_chip()
9063 	ca0113_mmio_gpio_set(codec, 4, true);  in zxr_exit_chip()
9064 	ca0113_mmio_gpio_set(codec, 0, true);  in zxr_exit_chip()
9065 	ca0113_mmio_gpio_set(codec, 5, true);  in zxr_exit_chip()
9066 	ca0113_mmio_gpio_set(codec, 2, false);  in zxr_exit_chip()
9067 	ca0113_mmio_gpio_set(codec, 3, false);  in zxr_exit_chip()
9070 static void ca0132_exit_chip(struct hda_codec *codec)  in ca0132_exit_chip()  argument
9074 	if (dspload_is_loaded(codec))  in ca0132_exit_chip()
9075 		dsp_reset(codec);  in ca0132_exit_chip()
9086 static void sbz_dsp_startup_check(struct hda_codec *codec)  in sbz_dsp_startup_check()  argument
9088 	struct ca0132_spec *spec = codec->spec;  in sbz_dsp_startup_check()
9090 	unsigned int cur_address = 0x390;  in sbz_dsp_startup_check()
9092 	unsigned int failure = 0;  in sbz_dsp_startup_check()
9095 	if (spec->startup_check_entered)  in sbz_dsp_startup_check()
9098 	spec->startup_check_entered = true;  in sbz_dsp_startup_check()
9100 	for (i = 0; i < 4; i++) {  in sbz_dsp_startup_check()
9101 		chipio_read(codec, cur_address, &dsp_data_check[i]);  in sbz_dsp_startup_check()
9102 		cur_address += 0x4;  in sbz_dsp_startup_check()
9104 	for (i = 0; i < 4; i++) {  in sbz_dsp_startup_check()
9105 		if (dsp_data_check[i] == 0xa1a2a3a4)  in sbz_dsp_startup_check()
9109 	codec_dbg(codec, "Startup Check: %d ", failure);  in sbz_dsp_startup_check()
9111 		codec_info(codec, "DSP not initialized properly. Attempting to fix.");  in sbz_dsp_startup_check()
9117 	while (failure && (reload != 0)) {  in sbz_dsp_startup_check()
9118 		codec_info(codec, "Reloading... Tries left: %d", reload);  in sbz_dsp_startup_check()
9119 		sbz_exit_chip(codec);  in sbz_dsp_startup_check()
9120 		spec->dsp_state = DSP_DOWNLOAD_INIT;  in sbz_dsp_startup_check()
9121 		codec->patch_ops.init(codec);  in sbz_dsp_startup_check()
9122 		failure = 0;  in sbz_dsp_startup_check()
9123 		for (i = 0; i < 4; i++) {  in sbz_dsp_startup_check()
9124 			chipio_read(codec, cur_address, &dsp_data_check[i]);  in sbz_dsp_startup_check()
9125 			cur_address += 0x4;  in sbz_dsp_startup_check()
9127 		for (i = 0; i < 4; i++) {  in sbz_dsp_startup_check()
9128 			if (dsp_data_check[i] == 0xa1a2a3a4)  in sbz_dsp_startup_check()
9131 		reload--;  in sbz_dsp_startup_check()
9135 		codec_info(codec, "DSP fixed.");  in sbz_dsp_startup_check()
9140 …codec_info(codec, "DSP failed to initialize properly. Either try a full shutdown or a suspend to c…  in sbz_dsp_startup_check()
9144  * This is for the extra volume verbs 0x797 (left) and 0x798 (right). These add
9149  * to 0 just incase a value has lingered from a boot into Windows.
9151 static void ca0132_alt_vol_setup(struct hda_codec *codec)  in ca0132_alt_vol_setup()  argument
9153 	snd_hda_codec_write(codec, 0x02, 0, 0x797, 0x00);  in ca0132_alt_vol_setup()
9154 	snd_hda_codec_write(codec, 0x02, 0, 0x798, 0x00);  in ca0132_alt_vol_setup()
9155 	snd_hda_codec_write(codec, 0x03, 0, 0x797, 0x00);  in ca0132_alt_vol_setup()
9156 	snd_hda_codec_write(codec, 0x03, 0, 0x798, 0x00);  in ca0132_alt_vol_setup()
9157 	snd_hda_codec_write(codec, 0x04, 0, 0x797, 0x00);  in ca0132_alt_vol_setup()
9158 	snd_hda_codec_write(codec, 0x04, 0, 0x798, 0x00);  in ca0132_alt_vol_setup()
9159 	snd_hda_codec_write(codec, 0x07, 0, 0x797, 0x00);  in ca0132_alt_vol_setup()
9160 	snd_hda_codec_write(codec, 0x07, 0, 0x798, 0x00);  in ca0132_alt_vol_setup()
9166 static void sbz_pre_dsp_setup(struct hda_codec *codec)  in sbz_pre_dsp_setup()  argument
9168 	struct ca0132_spec *spec = codec->spec;  in sbz_pre_dsp_setup()
9170 	writel(0x00820680, spec->mem_base + 0x01C);  in sbz_pre_dsp_setup()
9171 	writel(0x00820680, spec->mem_base + 0x01C);  in sbz_pre_dsp_setup()
9173 	chipio_write(codec, 0x18b0a4, 0x000000c2);  in sbz_pre_dsp_setup()
9175 	snd_hda_codec_write(codec, 0x11, 0,  in sbz_pre_dsp_setup()
9176 			AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44);  in sbz_pre_dsp_setup()
9179 static void r3d_pre_dsp_setup(struct hda_codec *codec)  in r3d_pre_dsp_setup()  argument
9181 	chipio_write(codec, 0x18b0a4, 0x000000c2);  in r3d_pre_dsp_setup()
9183 	chipio_8051_write_exram(codec, 0x1c1e, 0x5b);  in r3d_pre_dsp_setup()
9185 	snd_hda_codec_write(codec, 0x11, 0,  in r3d_pre_dsp_setup()
9186 			AC_VERB_SET_PIN_WIDGET_CONTROL, 0x44);  in r3d_pre_dsp_setup()
9189 static void r3di_pre_dsp_setup(struct hda_codec *codec)  in r3di_pre_dsp_setup()  argument
9191 	chipio_write(codec, 0x18b0a4, 0x000000c2);  in r3di_pre_dsp_setup()
9193 	chipio_8051_write_exram(codec, 0x1c1e, 0x5b);  in r3di_pre_dsp_setup()
9194 	chipio_8051_write_exram(codec, 0x1920, 0x00);  in r3di_pre_dsp_setup()
9195 	chipio_8051_write_exram(codec, 0x1921, 0x40);  in r3di_pre_dsp_setup()
9197 	snd_hda_codec_write(codec, 0x11, 0,  in r3di_pre_dsp_setup()
9198 			AC_VERB_SET_PIN_WIDGET_CONTROL, 0x04);  in r3di_pre_dsp_setup()
9206 static void zxr_pre_dsp_setup(struct hda_codec *codec)  in zxr_pre_dsp_setup()  argument
9208 	static const unsigned int addr[] = { 0x43, 0x40, 0x41, 0x42, 0x45 };  in zxr_pre_dsp_setup()
9209 	static const unsigned int data[] = { 0x08, 0x0c, 0x0b, 0x07, 0x0d };  in zxr_pre_dsp_setup()
9212 	chipio_write(codec, 0x189000, 0x0001f100);  in zxr_pre_dsp_setup()
9214 	chipio_write(codec, 0x18900c, 0x0001f100);  in zxr_pre_dsp_setup()
9219 	 * 0xfa92 in exram. This function seems to have something to do with  in zxr_pre_dsp_setup()
9223 	chipio_8051_write_exram(codec, 0xfa92, 0x22);  in zxr_pre_dsp_setup()
9225 	chipio_8051_write_pll_pmu(codec, 0x51, 0x98);  in zxr_pre_dsp_setup()
9227 	snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x725, 0x82);  in zxr_pre_dsp_setup()
9228 	chipio_set_control_param(codec, CONTROL_PARAM_ASI, 3);  in zxr_pre_dsp_setup()
9230 	chipio_write(codec, 0x18902c, 0x00000000);  in zxr_pre_dsp_setup()
9232 	chipio_write(codec, 0x18902c, 0x00000003);  in zxr_pre_dsp_setup()
9235 	for (i = 0; i < ARRAY_SIZE(addr); i++)  in zxr_pre_dsp_setup()
9236 		chipio_8051_write_pll_pmu(codec, addr[i], data[i]);  in zxr_pre_dsp_setup()
9245 	0x400, 0x408, 0x40c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c,
9246 	0xc0c, 0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04
9250 	0x00000030, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9251 	0x00000003, 0x000000c1, 0x000000f1, 0x00000001, 0x000000c7,
9252 	0x000000c1, 0x00000080
9256 	0x00000030, 0x00000000, 0x00000000, 0x00000003, 0x00000003,
9257 	0x00000003, 0x00000001, 0x000000f1, 0x00000001, 0x000000c7,
9258 	0x000000c1, 0x00000080
9262 	0x400, 0x42c, 0x46c, 0x4ac, 0x4ec, 0x43c, 0x47c, 0x4bc, 0x4fc, 0x408,
9263 	0x100, 0x410, 0x40c, 0x100, 0x100, 0x830, 0x86c, 0x800, 0x86c, 0x800,
9264 	0x804, 0x20c, 0x01c, 0xc0c, 0xc00, 0xc04, 0xc0c, 0xc0c, 0xc0c, 0xc0c,
9265 	0xc08, 0xc08, 0xc08, 0xc08, 0xc08, 0xc04, 0x01c
9269 	0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
9270 	0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001,
9271 	0x00000600, 0x00000014, 0x00000001, 0x0000060f, 0x0000070f,
9272 	0x00000aff, 0x00000000, 0x0000006b, 0x00000001, 0x0000006b,
9273 	0x00000057, 0x00800000, 0x00880680, 0x00000080, 0x00000030,
9274 	0x00000000, 0x00000000, 0x00000003, 0x00000003, 0x00000003,
9275 	0x00000001, 0x000000f1, 0x00000001, 0x000000c7, 0x000000c1,
9276 	0x00000080, 0x00880680
9279 static void ca0132_mmio_init_sbz(struct hda_codec *codec)  in ca0132_mmio_init_sbz()  argument
9281 	struct ca0132_spec *spec = codec->spec;  in ca0132_mmio_init_sbz()
9286 	for (i = 0; i < 3; i++)  in ca0132_mmio_init_sbz()
9287 		writel(0x00000000, spec->mem_base + addr[i]);  in ca0132_mmio_init_sbz()
9292 		tmp[0] = 0x00880480;  in ca0132_mmio_init_sbz()
9293 		tmp[1] = 0x00000080;  in ca0132_mmio_init_sbz()
9296 		tmp[0] = 0x00820680;  in ca0132_mmio_init_sbz()
9297 		tmp[1] = 0x00000083;  in ca0132_mmio_init_sbz()
9300 		tmp[0] = 0x00880680;  in ca0132_mmio_init_sbz()
9301 		tmp[1] = 0x00000083;  in ca0132_mmio_init_sbz()
9304 		tmp[0] = 0x00000000;  in ca0132_mmio_init_sbz()
9305 		tmp[1] = 0x00000000;  in ca0132_mmio_init_sbz()
9309 	for (i = 0; i < 2; i++)  in ca0132_mmio_init_sbz()
9310 		writel(tmp[i], spec->mem_base + addr[cur_addr + i]);  in ca0132_mmio_init_sbz()
9325 	for (i = 0; i < count; i++)  in ca0132_mmio_init_sbz()
9326 		writel(data[i], spec->mem_base + addr[cur_addr + i]);  in ca0132_mmio_init_sbz()
9329 static void ca0132_mmio_init_ae5(struct hda_codec *codec)  in ca0132_mmio_init_ae5()  argument
9331 	struct ca0132_spec *spec = codec->spec;  in ca0132_mmio_init_ae5()
9340 		writel(0x00000680, spec->mem_base + 0x1c);  in ca0132_mmio_init_ae5()
9341 		writel(0x00880680, spec->mem_base + 0x1c);  in ca0132_mmio_init_ae5()
9344 	for (i = 0; i < count; i++) {  in ca0132_mmio_init_ae5()
9346 		 * AE-7 shares all writes with the AE-5, except that it writes  in ca0132_mmio_init_ae5()
9347 		 * a different value to 0x20c.  in ca0132_mmio_init_ae5()
9350 			writel(0x00800001, spec->mem_base + addr[i]);  in ca0132_mmio_init_ae5()
9354 		writel(data[i], spec->mem_base + addr[i]);  in ca0132_mmio_init_ae5()
9358 		writel(0x00880680, spec->mem_base + 0x1c);  in ca0132_mmio_init_ae5()
9361 static void ca0132_mmio_init(struct hda_codec *codec)  in ca0132_mmio_init()  argument
9363 	struct ca0132_spec *spec = codec->spec;  in ca0132_mmio_init()
9369 		ca0132_mmio_init_sbz(codec);  in ca0132_mmio_init()
9372 		ca0132_mmio_init_ae5(codec);  in ca0132_mmio_init()
9380 	0x304, 0x304, 0x304, 0x304, 0x100, 0x304, 0x100, 0x304, 0x100, 0x304,
9381 	0x100, 0x304, 0x86c, 0x800, 0x86c, 0x800, 0x804
9385 	0x0f, 0x0e, 0x1f, 0x0c, 0x3f, 0x08, 0x7f, 0x00, 0xff, 0x00, 0x6b,
9386 	0x01, 0x6b, 0x57
9391  * eventually resets the codec with the 0x7ff verb. Not quite sure why it does
9394 static void ae5_register_set(struct hda_codec *codec)  in ae5_register_set()  argument
9396 	struct ca0132_spec *spec = codec->spec;  in ae5_register_set()
9404 		chipio_8051_write_pll_pmu(codec, 0x41, 0xc8);  in ae5_register_set()
9406 	chipio_8051_write_direct(codec, 0x93, 0x10);  in ae5_register_set()
9407 	chipio_8051_write_pll_pmu(codec, 0x44, 0xc2);  in ae5_register_set()
9410 		tmp[0] = 0x03;  in ae5_register_set()
9411 		tmp[1] = 0x03;  in ae5_register_set()
9412 		tmp[2] = 0x07;  in ae5_register_set()
9414 		tmp[0] = 0x0f;  in ae5_register_set()
9415 		tmp[1] = 0x0f;  in ae5_register_set()
9416 		tmp[2] = 0x0f;  in ae5_register_set()
9419 	for (i = cur_addr = 0; i < 3; i++, cur_addr++)  in ae5_register_set()
9420 		writeb(tmp[i], spec->mem_base + addr[cur_addr]);  in ae5_register_set()
9426 	for (i = 0; cur_addr < 12; i++, cur_addr++)  in ae5_register_set()
9427 		writeb(data[i], spec->mem_base + addr[cur_addr]);  in ae5_register_set()
9430 		writel(data[i], spec->mem_base + addr[cur_addr]);  in ae5_register_set()
9432 	writel(0x00800001, spec->mem_base + 0x20c);  in ae5_register_set()
9435 		ca0113_mmio_command_set_type2(codec, 0x48, 0x07, 0x83);  in ae5_register_set()
9436 		ca0113_mmio_command_set(codec, 0x30, 0x2e, 0x3f);  in ae5_register_set()
9438 		ca0113_mmio_command_set(codec, 0x30, 0x2d, 0x3f);  in ae5_register_set()
9441 	chipio_8051_write_direct(codec, 0x90, 0x00);  in ae5_register_set()
9442 	chipio_8051_write_direct(codec, 0x90, 0x10);  in ae5_register_set()
9445 		ca0113_mmio_command_set(codec, 0x48, 0x07, 0x83);  in ae5_register_set()
9453 static void ca0132_alt_init(struct hda_codec *codec)  in ca0132_alt_init()  argument
9455 	struct ca0132_spec *spec = codec->spec;  in ca0132_alt_init()
9457 	ca0132_alt_vol_setup(codec);  in ca0132_alt_init()
9461 		codec_dbg(codec, "SBZ alt_init");  in ca0132_alt_init()
9462 		ca0132_gpio_init(codec);  in ca0132_alt_init()
9463 		sbz_pre_dsp_setup(codec);  in ca0132_alt_init()
9464 		snd_hda_sequence_write(codec, spec->chip_init_verbs);  in ca0132_alt_init()
9465 		snd_hda_sequence_write(codec, spec->desktop_init_verbs);  in ca0132_alt_init()
9468 		codec_dbg(codec, "R3DI alt_init");  in ca0132_alt_init()
9469 		ca0132_gpio_init(codec);  in ca0132_alt_init()
9470 		ca0132_gpio_setup(codec);  in ca0132_alt_init()
9471 		r3di_gpio_dsp_status_set(codec, R3DI_DSP_DOWNLOADING);  in ca0132_alt_init()
9472 		r3di_pre_dsp_setup(codec);  in ca0132_alt_init()
9473 		snd_hda_sequence_write(codec, spec->chip_init_verbs);  in ca0132_alt_init()
9474 		snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, 0x6FF, 0xC4);  in ca0132_alt_init()
9477 		r3d_pre_dsp_setup(codec);  in ca0132_alt_init()
9478 		snd_hda_sequence_write(codec, spec->chip_init_verbs);  in ca0132_alt_init()
9479 		snd_hda_sequence_write(codec, spec->desktop_init_verbs);  in ca0132_alt_init()
9482 		ca0132_gpio_init(codec);  in ca0132_alt_init()
9483 		chipio_8051_write_pll_pmu(codec, 0x49, 0x88);  in ca0132_alt_init()
9484 		chipio_write(codec, 0x18b030, 0x00000020);  in ca0132_alt_init()
9485 		snd_hda_sequence_write(codec, spec->chip_init_verbs);  in ca0132_alt_init()
9486 		snd_hda_sequence_write(codec, spec->desktop_init_verbs);  in ca0132_alt_init()
9487 		ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);  in ca0132_alt_init()
9490 		ca0132_gpio_init(codec);  in ca0132_alt_init()
9491 		chipio_8051_write_pll_pmu(codec, 0x49, 0x88);  in ca0132_alt_init()
9492 		snd_hda_sequence_write(codec, spec->chip_init_verbs);  in ca0132_alt_init()
9493 		snd_hda_sequence_write(codec, spec->desktop_init_verbs);  in ca0132_alt_init()
9494 		chipio_write(codec, 0x18b008, 0x000000f8);  in ca0132_alt_init()
9495 		chipio_write(codec, 0x18b008, 0x000000f0);  in ca0132_alt_init()
9496 		chipio_write(codec, 0x18b030, 0x00000020);  in ca0132_alt_init()
9497 		ca0113_mmio_command_set(codec, 0x30, 0x32, 0x3f);  in ca0132_alt_init()
9500 		chipio_8051_write_pll_pmu(codec, 0x49, 0x88);  in ca0132_alt_init()
9501 		snd_hda_sequence_write(codec, spec->chip_init_verbs);  in ca0132_alt_init()
9502 		snd_hda_sequence_write(codec, spec->desktop_init_verbs);  in ca0132_alt_init()
9503 		zxr_pre_dsp_setup(codec);  in ca0132_alt_init()
9510 static int ca0132_init(struct hda_codec *codec)  in ca0132_init()  argument
9512 	struct ca0132_spec *spec = codec->spec;  in ca0132_init()
9513 	struct auto_pin_cfg *cfg = &spec->autocfg;  in ca0132_init()
9519 	 * there's only two reasons for it. One, the codec has awaken from a  in ca0132_init()
9527 	if (spec->dsp_state == DSP_DOWNLOADED) {  in ca0132_init()
9528 		dsp_loaded = dspload_is_loaded(codec);  in ca0132_init()
9530 			spec->dsp_reload = true;  in ca0132_init()
9531 			spec->dsp_state = DSP_DOWNLOAD_INIT;  in ca0132_init()
9534 				sbz_dsp_startup_check(codec);  in ca0132_init()
9535 			return 0;  in ca0132_init()
9539 	if (spec->dsp_state != DSP_DOWNLOAD_FAILED)  in ca0132_init()
9540 		spec->dsp_state = DSP_DOWNLOAD_INIT;  in ca0132_init()
9541 	spec->curr_chip_addx = INVALID_CHIP_ADDRESS;  in ca0132_init()
9544 		ca0132_mmio_init(codec);  in ca0132_init()
9546 	snd_hda_power_up_pm(codec);  in ca0132_init()
9549 		ae5_register_set(codec);  in ca0132_init()
9551 	ca0132_init_params(codec);  in ca0132_init()
9552 	ca0132_init_flags(codec);  in ca0132_init()
9554 	snd_hda_sequence_write(codec, spec->base_init_verbs);  in ca0132_init()
9557 		ca0132_alt_init(codec);  in ca0132_init()
9559 	ca0132_download_dsp(codec);  in ca0132_init()
9561 	ca0132_refresh_widget_caps(codec);  in ca0132_init()
9566 		r3d_setup_defaults(codec);  in ca0132_init()
9570 		sbz_setup_defaults(codec);  in ca0132_init()
9573 		ae5_setup_defaults(codec);  in ca0132_init()
9576 		ae7_setup_defaults(codec);  in ca0132_init()
9579 		ca0132_setup_defaults(codec);  in ca0132_init()
9580 		ca0132_init_analog_mic2(codec);  in ca0132_init()
9581 		ca0132_init_dmic(codec);  in ca0132_init()
9585 	for (i = 0; i < spec->num_outputs; i++)  in ca0132_init()
9586 		init_output(codec, spec->out_pins[i], spec->dacs[0]);  in ca0132_init()
9588 	init_output(codec, cfg->dig_out_pins[0], spec->dig_out);  in ca0132_init()
9590 	for (i = 0; i < spec->num_inputs; i++)  in ca0132_init()
9591 		init_input(codec, spec->input_pins[i], spec->adcs[i]);  in ca0132_init()
9593 	init_input(codec, cfg->dig_in_pin, spec->dig_in);  in ca0132_init()
9596 		snd_hda_sequence_write(codec, spec->chip_init_verbs);  in ca0132_init()
9597 		snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in ca0132_init()
9598 			    VENDOR_CHIPIO_PARAM_EX_ID_SET, 0x0D);  in ca0132_init()
9599 		snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,  in ca0132_init()
9600 			    VENDOR_CHIPIO_PARAM_EX_VALUE_SET, 0x20);  in ca0132_init()
9604 		ca0132_gpio_setup(codec);  in ca0132_init()
9606 	snd_hda_sequence_write(codec, spec->spec_init_verbs);  in ca0132_init()
9608 		ca0132_alt_select_out(codec);  in ca0132_init()
9609 		ca0132_alt_select_in(codec);  in ca0132_init()
9611 		ca0132_select_out(codec);  in ca0132_init()
9612 		ca0132_select_mic(codec);  in ca0132_init()
9615 	snd_hda_jack_report_sync(codec);  in ca0132_init()
9621 	if (spec->dsp_reload) {  in ca0132_init()
9622 		spec->dsp_reload = false;  in ca0132_init()
9623 		ca0132_pe_switch_set(codec);  in ca0132_init()
9626 	snd_hda_power_down_pm(codec);  in ca0132_init()
9628 	return 0;  in ca0132_init()
9631 static int dbpro_init(struct hda_codec *codec)  in dbpro_init()  argument
9633 	struct ca0132_spec *spec = codec->spec;  in dbpro_init()
9634 	struct auto_pin_cfg *cfg = &spec->autocfg;  in dbpro_init()
9637 	init_output(codec, cfg->dig_out_pins[0], spec->dig_out);  in dbpro_init()
9638 	init_input(codec, cfg->dig_in_pin, spec->dig_in);  in dbpro_init()
9640 	for (i = 0; i < spec->num_inputs; i++)  in dbpro_init()
9641 		init_input(codec, spec->input_pins[i], spec->adcs[i]);  in dbpro_init()
9643 	return 0;  in dbpro_init()
9646 static void ca0132_free(struct hda_codec *codec)  in ca0132_free()  argument
9648 	struct ca0132_spec *spec = codec->spec;  in ca0132_free()
9650 	cancel_delayed_work_sync(&spec->unsol_hp_work);  in ca0132_free()
9651 	snd_hda_power_up(codec);  in ca0132_free()
9654 		sbz_exit_chip(codec);  in ca0132_free()
9657 		zxr_exit_chip(codec);  in ca0132_free()
9660 		r3d_exit_chip(codec);  in ca0132_free()
9663 		ae5_exit_chip(codec);  in ca0132_free()
9666 		ae7_exit_chip(codec);  in ca0132_free()
9669 		r3di_gpio_shutdown(codec);  in ca0132_free()
9675 	snd_hda_sequence_write(codec, spec->base_exit_verbs);  in ca0132_free()
9676 	ca0132_exit_chip(codec);  in ca0132_free()
9678 	snd_hda_power_down(codec);  in ca0132_free()
9680 	if (spec->mem_base)  in ca0132_free()
9681 		pci_iounmap(codec->bus->pci, spec->mem_base);  in ca0132_free()
9683 	kfree(spec->spec_init_verbs);  in ca0132_free()
9684 	kfree(codec->spec);  in ca0132_free()
9687 static void dbpro_free(struct hda_codec *codec)  in dbpro_free()  argument
9689 	struct ca0132_spec *spec = codec->spec;  in dbpro_free()
9691 	zxr_dbpro_power_state_shutdown(codec);  in dbpro_free()
9693 	kfree(spec->spec_init_verbs);  in dbpro_free()
9694 	kfree(codec->spec);  in dbpro_free()
9697 static int ca0132_suspend(struct hda_codec *codec)  in ca0132_suspend()  argument
9699 	struct ca0132_spec *spec = codec->spec;  in ca0132_suspend()
9701 	cancel_delayed_work_sync(&spec->unsol_hp_work);  in ca0132_suspend()
9702 	return 0;  in ca0132_suspend()
9721 static void ca0132_config(struct hda_codec *codec)  in ca0132_config()  argument
9723 	struct ca0132_spec *spec = codec->spec;  in ca0132_config()
9725 	spec->dacs[0] = 0x2;  in ca0132_config()
9726 	spec->dacs[1] = 0x3;  in ca0132_config()
9727 	spec->dacs[2] = 0x4;  in ca0132_config()
9729 	spec->multiout.dac_nids = spec->dacs;  in ca0132_config()
9730 	spec->multiout.num_dacs = 3;  in ca0132_config()
9733 		spec->multiout.max_channels = 2;  in ca0132_config()
9735 		spec->multiout.max_channels = 6;  in ca0132_config()
9739 		codec_dbg(codec, "%s: QUIRK_ALIENWARE applied.\n", __func__);  in ca0132_config()
9740 		snd_hda_apply_pincfgs(codec, alienware_pincfgs);  in ca0132_config()
9743 		codec_dbg(codec, "%s: QUIRK_SBZ applied.\n", __func__);  in ca0132_config()
9744 		snd_hda_apply_pincfgs(codec, sbz_pincfgs);  in ca0132_config()
9747 		codec_dbg(codec, "%s: QUIRK_ZXR applied.\n", __func__);  in ca0132_config()
9748 		snd_hda_apply_pincfgs(codec, zxr_pincfgs);  in ca0132_config()
9751 		codec_dbg(codec, "%s: QUIRK_R3D applied.\n", __func__);  in ca0132_config()
9752 		snd_hda_apply_pincfgs(codec, r3d_pincfgs);  in ca0132_config()
9755 		codec_dbg(codec, "%s: QUIRK_R3DI applied.\n", __func__);  in ca0132_config()
9756 		snd_hda_apply_pincfgs(codec, r3di_pincfgs);  in ca0132_config()
9759 		codec_dbg(codec, "%s: QUIRK_AE5 applied.\n", __func__);  in ca0132_config()
9760 		snd_hda_apply_pincfgs(codec, ae5_pincfgs);  in ca0132_config()
9763 		codec_dbg(codec, "%s: QUIRK_AE7 applied.\n", __func__);  in ca0132_config()
9764 		snd_hda_apply_pincfgs(codec, ae7_pincfgs);  in ca0132_config()
9772 		spec->num_outputs = 2;  in ca0132_config()
9773 		spec->out_pins[0] = 0x0b; /* speaker out */  in ca0132_config()
9774 		spec->out_pins[1] = 0x0f;  in ca0132_config()
9775 		spec->shared_out_nid = 0x2;  in ca0132_config()
9776 		spec->unsol_tag_hp = 0x0f;  in ca0132_config()
9778 		spec->adcs[0] = 0x7; /* digital mic / analog mic1 */  in ca0132_config()
9779 		spec->adcs[1] = 0x8; /* analog mic2 */  in ca0132_config()
9780 		spec->adcs[2] = 0xa; /* what u hear */  in ca0132_config()
9782 		spec->num_inputs = 3;  in ca0132_config()
9783 		spec->input_pins[0] = 0x12;  in ca0132_config()
9784 		spec->input_pins[1] = 0x11;  in ca0132_config()
9785 		spec->input_pins[2] = 0x13;  in ca0132_config()
9786 		spec->shared_mic_nid = 0x7;  in ca0132_config()
9787 		spec->unsol_tag_amic1 = 0x11;  in ca0132_config()
9791 		spec->num_outputs = 2;  in ca0132_config()
9792 		spec->out_pins[0] = 0x0B; /* Line out */  in ca0132_config()
9793 		spec->out_pins[1] = 0x0F; /* Rear headphone out */  in ca0132_config()
9794 		spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/  in ca0132_config()
9795 		spec->out_pins[3] = 0x11; /* Rear surround */  in ca0132_config()
9796 		spec->shared_out_nid = 0x2;  in ca0132_config()
9797 		spec->unsol_tag_hp = spec->out_pins[1];  in ca0132_config()
9798 		spec->unsol_tag_front_hp = spec->out_pins[2];  in ca0132_config()
9800 		spec->adcs[0] = 0x7; /* Rear Mic / Line-in */  in ca0132_config()
9801 		spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */  in ca0132_config()
9802 		spec->adcs[2] = 0xa; /* what u hear */  in ca0132_config()
9804 		spec->num_inputs = 2;  in ca0132_config()
9805 		spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */  in ca0132_config()
9806 		spec->input_pins[1] = 0x13; /* What U Hear */  in ca0132_config()
9807 		spec->shared_mic_nid = 0x7;  in ca0132_config()
9808 		spec->unsol_tag_amic1 = spec->input_pins[0];  in ca0132_config()
9811 		spec->dig_out = 0x05;  in ca0132_config()
9812 		spec->multiout.dig_out_nid = spec->dig_out;  in ca0132_config()
9813 		spec->dig_in = 0x09;  in ca0132_config()
9816 		spec->num_outputs = 2;  in ca0132_config()
9817 		spec->out_pins[0] = 0x0B; /* Line out */  in ca0132_config()
9818 		spec->out_pins[1] = 0x0F; /* Rear headphone out */  in ca0132_config()
9819 		spec->out_pins[2] = 0x10; /* Center/LFE */  in ca0132_config()
9820 		spec->out_pins[3] = 0x11; /* Rear surround */  in ca0132_config()
9821 		spec->shared_out_nid = 0x2;  in ca0132_config()
9822 		spec->unsol_tag_hp = spec->out_pins[1];  in ca0132_config()
9823 		spec->unsol_tag_front_hp = spec->out_pins[2];  in ca0132_config()
9825 		spec->adcs[0] = 0x7; /* Rear Mic / Line-in */  in ca0132_config()
9826 		spec->adcs[1] = 0x8; /* Not connected, no front mic */  in ca0132_config()
9827 		spec->adcs[2] = 0xa; /* what u hear */  in ca0132_config()
9829 		spec->num_inputs = 2;  in ca0132_config()
9830 		spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */  in ca0132_config()
9831 		spec->input_pins[1] = 0x13; /* What U Hear */  in ca0132_config()
9832 		spec->shared_mic_nid = 0x7;  in ca0132_config()
9833 		spec->unsol_tag_amic1 = spec->input_pins[0];  in ca0132_config()
9836 		spec->adcs[0] = 0x8; /* ZxR DBPro Aux In */  in ca0132_config()
9838 		spec->num_inputs = 1;  in ca0132_config()
9839 		spec->input_pins[0] = 0x11; /* RCA Line-in */  in ca0132_config()
9841 		spec->dig_out = 0x05;  in ca0132_config()
9842 		spec->multiout.dig_out_nid = spec->dig_out;  in ca0132_config()
9844 		spec->dig_in = 0x09;  in ca0132_config()
9848 		spec->num_outputs = 2;  in ca0132_config()
9849 		spec->out_pins[0] = 0x0B; /* Line out */  in ca0132_config()
9850 		spec->out_pins[1] = 0x11; /* Rear headphone out */  in ca0132_config()
9851 		spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/  in ca0132_config()
9852 		spec->out_pins[3] = 0x0F; /* Rear surround */  in ca0132_config()
9853 		spec->shared_out_nid = 0x2;  in ca0132_config()
9854 		spec->unsol_tag_hp = spec->out_pins[1];  in ca0132_config()
9855 		spec->unsol_tag_front_hp = spec->out_pins[2];  in ca0132_config()
9857 		spec->adcs[0] = 0x7; /* Rear Mic / Line-in */  in ca0132_config()
9858 		spec->adcs[1] = 0x8; /* Front Mic, but only if no DSP */  in ca0132_config()
9859 		spec->adcs[2] = 0xa; /* what u hear */  in ca0132_config()
9861 		spec->num_inputs = 2;  in ca0132_config()
9862 		spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */  in ca0132_config()
9863 		spec->input_pins[1] = 0x13; /* What U Hear */  in ca0132_config()
9864 		spec->shared_mic_nid = 0x7;  in ca0132_config()
9865 		spec->unsol_tag_amic1 = spec->input_pins[0];  in ca0132_config()
9868 		spec->dig_out = 0x05;  in ca0132_config()
9869 		spec->multiout.dig_out_nid = spec->dig_out;  in ca0132_config()
9872 		spec->num_outputs = 2;  in ca0132_config()
9873 		spec->out_pins[0] = 0x0B; /* Line out */  in ca0132_config()
9874 		spec->out_pins[1] = 0x0F; /* Rear headphone out */  in ca0132_config()
9875 		spec->out_pins[2] = 0x10; /* Front Headphone / Center/LFE*/  in ca0132_config()
9876 		spec->out_pins[3] = 0x11; /* Rear surround */  in ca0132_config()
9877 		spec->shared_out_nid = 0x2;  in ca0132_config()
9878 		spec->unsol_tag_hp = spec->out_pins[1];  in ca0132_config()
9879 		spec->unsol_tag_front_hp = spec->out_pins[2];  in ca0132_config()
9881 		spec->adcs[0] = 0x07; /* Rear Mic / Line-in */  in ca0132_config()
9882 		spec->adcs[1] = 0x08; /* Front Mic, but only if no DSP */  in ca0132_config()
9883 		spec->adcs[2] = 0x0a; /* what u hear */  in ca0132_config()
9885 		spec->num_inputs = 2;  in ca0132_config()
9886 		spec->input_pins[0] = 0x12; /* Rear Mic / Line-in */  in ca0132_config()
9887 		spec->input_pins[1] = 0x13; /* What U Hear */  in ca0132_config()
9888 		spec->shared_mic_nid = 0x7;  in ca0132_config()
9889 		spec->unsol_tag_amic1 = spec->input_pins[0];  in ca0132_config()
9892 		spec->dig_out = 0x05;  in ca0132_config()
9893 		spec->multiout.dig_out_nid = spec->dig_out;  in ca0132_config()
9896 		spec->num_outputs = 2;  in ca0132_config()
9897 		spec->out_pins[0] = 0x0b; /* speaker out */  in ca0132_config()
9898 		spec->out_pins[1] = 0x10; /* headphone out */  in ca0132_config()
9899 		spec->shared_out_nid = 0x2;  in ca0132_config()
9900 		spec->unsol_tag_hp = spec->out_pins[1];  in ca0132_config()
9902 		spec->adcs[0] = 0x7; /* digital mic / analog mic1 */  in ca0132_config()
9903 		spec->adcs[1] = 0x8; /* analog mic2 */  in ca0132_config()
9904 		spec->adcs[2] = 0xa; /* what u hear */  in ca0132_config()
9906 		spec->num_inputs = 3;  in ca0132_config()
9907 		spec->input_pins[0] = 0x12;  in ca0132_config()
9908 		spec->input_pins[1] = 0x11;  in ca0132_config()
9909 		spec->input_pins[2] = 0x13;  in ca0132_config()
9910 		spec->shared_mic_nid = 0x7;  in ca0132_config()
9911 		spec->unsol_tag_amic1 = spec->input_pins[0];  in ca0132_config()
9914 		spec->dig_out = 0x05;  in ca0132_config()
9915 		spec->multiout.dig_out_nid = spec->dig_out;  in ca0132_config()
9916 		spec->dig_in = 0x09;  in ca0132_config()
9921 static int ca0132_prepare_verbs(struct hda_codec *codec)  in ca0132_prepare_verbs()  argument
9925 	struct ca0132_spec *spec = codec->spec;  in ca0132_prepare_verbs()
9927 	spec->chip_init_verbs = ca0132_init_verbs0;  in ca0132_prepare_verbs()
9933 		spec->desktop_init_verbs = ca0132_init_verbs1;  in ca0132_prepare_verbs()
9934 	spec->spec_init_verbs = kcalloc(NUM_SPEC_VERBS,  in ca0132_prepare_verbs()
9937 	if (!spec->spec_init_verbs)  in ca0132_prepare_verbs()
9938 		return -ENOMEM;  in ca0132_prepare_verbs()
9941 	spec->spec_init_verbs[0].nid = 0x0b;  in ca0132_prepare_verbs()
9942 	spec->spec_init_verbs[0].param = 0x78D;  in ca0132_prepare_verbs()
9943 	spec->spec_init_verbs[0].verb = 0x00;  in ca0132_prepare_verbs()
9947 	spec->spec_init_verbs[2].nid = 0x0b;  in ca0132_prepare_verbs()
9948 	spec->spec_init_verbs[2].param = AC_VERB_SET_EAPD_BTLENABLE;  in ca0132_prepare_verbs()
9949 	spec->spec_init_verbs[2].verb = 0x02;  in ca0132_prepare_verbs()
9951 	spec->spec_init_verbs[3].nid = 0x10;  in ca0132_prepare_verbs()
9952 	spec->spec_init_verbs[3].param = 0x78D;  in ca0132_prepare_verbs()
9953 	spec->spec_init_verbs[3].verb = 0x02;  in ca0132_prepare_verbs()
9955 	spec->spec_init_verbs[4].nid = 0x10;  in ca0132_prepare_verbs()
9956 	spec->spec_init_verbs[4].param = AC_VERB_SET_EAPD_BTLENABLE;  in ca0132_prepare_verbs()
9957 	spec->spec_init_verbs[4].verb = 0x02;  in ca0132_prepare_verbs()
9960 	/* Terminator: spec->spec_init_verbs[NUM_SPEC_VERBS-1] */  in ca0132_prepare_verbs()
9961 	return 0;  in ca0132_prepare_verbs()
9966  * Sound Blaster Z cards. However, they have different HDA codec subsystem
9970 static void sbz_detect_quirk(struct hda_codec *codec)  in sbz_detect_quirk()  argument
9972 	switch (codec->core.subsystem_id) {  in sbz_detect_quirk()
9973 	case 0x11020033:  in sbz_detect_quirk()
9974 		codec->fixup_id = QUIRK_ZXR;  in sbz_detect_quirk()
9976 	case 0x1102003f:  in sbz_detect_quirk()
9977 		codec->fixup_id = QUIRK_ZXR_DBPRO;  in sbz_detect_quirk()
9980 		codec->fixup_id = QUIRK_SBZ;  in sbz_detect_quirk()
9985 static int patch_ca0132(struct hda_codec *codec)  in patch_ca0132()  argument
9990 	codec_dbg(codec, "patch_ca0132\n");  in patch_ca0132()
9994 		return -ENOMEM;  in patch_ca0132()
9995 	codec->spec = spec;  in patch_ca0132()
9996 	spec->codec = codec;  in patch_ca0132()
9998 	/* Detect codec quirk */  in patch_ca0132()
9999 	snd_hda_pick_fixup(codec, ca0132_quirk_models, ca0132_quirks, NULL);  in patch_ca0132()
10001 		sbz_detect_quirk(codec);  in patch_ca0132()
10004 		codec->patch_ops = dbpro_patch_ops;  in patch_ca0132()
10006 		codec->patch_ops = ca0132_patch_ops;  in patch_ca0132()
10008 	codec->pcm_format_first = 1;  in patch_ca0132()
10009 	codec->no_sticky_stream = 1;  in patch_ca0132()
10012 	spec->dsp_state = DSP_DOWNLOAD_INIT;  in patch_ca0132()
10013 	spec->num_mixers = 1;  in patch_ca0132()
10018 		spec->mixers[0] = desktop_mixer;  in patch_ca0132()
10019 		snd_hda_codec_set_name(codec, "Sound Blaster Z");  in patch_ca0132()
10022 		spec->mixers[0] = desktop_mixer;  in patch_ca0132()
10023 		snd_hda_codec_set_name(codec, "Sound Blaster ZxR");  in patch_ca0132()
10028 		spec->mixers[0] = desktop_mixer;  in patch_ca0132()
10029 		snd_hda_codec_set_name(codec, "Recon3D");  in patch_ca0132()
10032 		spec->mixers[0] = r3di_mixer;  in patch_ca0132()
10033 		snd_hda_codec_set_name(codec, "Recon3Di");  in patch_ca0132()
10036 		spec->mixers[0] = desktop_mixer;  in patch_ca0132()
10037 		snd_hda_codec_set_name(codec, "Sound BlasterX AE-5");  in patch_ca0132()
10040 		spec->mixers[0] = desktop_mixer;  in patch_ca0132()
10041 		snd_hda_codec_set_name(codec, "Sound Blaster AE-7");  in patch_ca0132()
10044 		spec->mixers[0] = ca0132_mixer;  in patch_ca0132()
10055 		spec->use_alt_controls = true;  in patch_ca0132()
10056 		spec->use_alt_functions = true;  in patch_ca0132()
10057 		spec->use_pci_mmio = true;  in patch_ca0132()
10060 		spec->use_alt_controls = true;  in patch_ca0132()
10061 		spec->use_alt_functions = true;  in patch_ca0132()
10062 		spec->use_pci_mmio = false;  in patch_ca0132()
10065 		spec->use_alt_controls = false;  in patch_ca0132()
10066 		spec->use_alt_functions = false;  in patch_ca0132()
10067 		spec->use_pci_mmio = false;  in patch_ca0132()
10072 	if (spec->use_pci_mmio) {  in patch_ca0132()
10073 		spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20);  in patch_ca0132()
10074 		if (spec->mem_base == NULL) {  in patch_ca0132()
10075 			codec_warn(codec, "pci_iomap failed! Setting quirk to QUIRK_NONE.");  in patch_ca0132()
10076 			codec->fixup_id = QUIRK_NONE;  in patch_ca0132()
10081 	spec->base_init_verbs = ca0132_base_init_verbs;  in patch_ca0132()
10082 	spec->base_exit_verbs = ca0132_base_exit_verbs;  in patch_ca0132()
10084 	INIT_DELAYED_WORK(&spec->unsol_hp_work, ca0132_unsol_hp_delayed);  in patch_ca0132()
10086 	ca0132_init_chip(codec);  in patch_ca0132()
10088 	ca0132_config(codec);  in patch_ca0132()
10090 	err = ca0132_prepare_verbs(codec);  in patch_ca0132()
10091 	if (err < 0)  in patch_ca0132()
10094 	err = snd_hda_parse_pin_def_config(codec, &spec->autocfg, NULL);  in patch_ca0132()
10095 	if (err < 0)  in patch_ca0132()
10098 	ca0132_setup_unsol(codec);  in patch_ca0132()
10100 	return 0;  in patch_ca0132()
10103 	ca0132_free(codec);  in patch_ca0132()
10111 	HDA_CODEC_ENTRY(0x11020011, "CA0132", patch_ca0132),
10117 MODULE_DESCRIPTION("Creative Sound Core3D codec");