3    Copyright Echo Digital Audio Corporation (c) 1998 - 2004
21    Foundation, Inc., 59 Temple Place - Suite 330, Boston,
22    MA  02111-1307, USA.
26  Translation from C++ and adaptation for use in ALSA-Driver
33 static int set_input_clock(struct echoaudio *chip, u16 clock);
35 static int set_digital_mode(struct echoaudio *chip, u8 mode);
45 		return -ENODEV;  in init_hw()
49 		dev_err(chip->card->dev,  in init_hw()
50 			"init_hw - could not initialize DSP comm page\n");  in init_hw()
54 	chip->device_id = device_id;  in init_hw()
55 	chip->subdevice_id = subdevice_id;  in init_hw()
56 	chip->bad_board = true;  in init_hw()
57 	chip->input_clock_types =  in init_hw()
63 	if (chip->device_id == DEVICE_ID_56361) {  in init_hw()
64 		chip->dsp_code_to_load = FW_GINA24_361_DSP;  in init_hw()
65 		chip->digital_modes =  in init_hw()
70 		chip->dsp_code_to_load = FW_GINA24_301_DSP;  in init_hw()
71 		chip->digital_modes =  in init_hw()
81 	chip->bad_board = false;  in init_hw()
90 	chip->digital_mode = DIGITAL_MODE_SPDIF_RCA;  in set_mixer_defaults()
91 	chip->professional_spdif = false;  in set_mixer_defaults()
92 	chip->digital_in_automute = true;  in set_mixer_defaults()
102 	/* Map the DSP clock detect bits to the generic driver clock  in detect_input_clocks()
104 	clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);  in detect_input_clocks()
130 	if (chip->asic_loaded)  in load_asic()
137 	if (chip->device_id == DEVICE_ID_56361)  in load_asic()
146 	chip->asic_code = asic;  in load_asic()
153 	/* Set up the control register if the load succeeded -  in load_asic()
154 	   48 kHz, internal clock, S/PDIF RCA mode */  in load_asic()
166 	u32 control_reg, clock;  in set_sample_rate()  local
169 		       chip->digital_mode == DIGITAL_MODE_ADAT))  in set_sample_rate()
170 		return -EINVAL;  in set_sample_rate()
172 	/* Only set the clock for internal mode. */  in set_sample_rate()
173 	if (chip->input_clock != ECHO_CLOCK_INTERNAL) {  in set_sample_rate()
174 		dev_warn(chip->card->dev,  in set_sample_rate()
175 			 "Cannot set sample rate - clock not set to CLK_CLOCKININTERNAL\n");  in set_sample_rate()
177 		chip->comm_page->sample_rate = cpu_to_le32(rate);  in set_sample_rate()
178 		chip->sample_rate = rate;  in set_sample_rate()
182 	clock = 0;  in set_sample_rate()
184 	control_reg = le32_to_cpu(chip->comm_page->control_register);  in set_sample_rate()
189 		clock = GML_96KHZ;  in set_sample_rate()
192 		clock = GML_88KHZ;  in set_sample_rate()
195 		clock = GML_48KHZ | GML_SPDIF_SAMPLE_RATE1;  in set_sample_rate()
198 		clock = GML_44KHZ;  in set_sample_rate()
199 		/* Professional mode ? */  in set_sample_rate()
201 			clock |= GML_SPDIF_SAMPLE_RATE0;  in set_sample_rate()
204 		clock = GML_32KHZ | GML_SPDIF_SAMPLE_RATE0 |  in set_sample_rate()
208 		clock = GML_22KHZ;  in set_sample_rate()
211 		clock = GML_16KHZ;  in set_sample_rate()
214 		clock = GML_11KHZ;  in set_sample_rate()
217 		clock = GML_8KHZ;  in set_sample_rate()
220 		dev_err(chip->card->dev,  in set_sample_rate()
222 		return -EINVAL;  in set_sample_rate()
225 	control_reg |= clock;  in set_sample_rate()
227 	chip->comm_page->sample_rate = cpu_to_le32(rate);	/* ignored by the DSP */  in set_sample_rate()
228 	chip->sample_rate = rate;  in set_sample_rate()
229 	dev_dbg(chip->card->dev, "set_sample_rate: %d clock %d\n", rate, clock);  in set_sample_rate()
236 static int set_input_clock(struct echoaudio *chip, u16 clock)  in set_input_clock()  argument
241 	/* Mask off the clock select bits */  in set_input_clock()
242 	control_reg = le32_to_cpu(chip->comm_page->control_register) &  in set_input_clock()
244 	clocks_from_dsp = le32_to_cpu(chip->comm_page->status_clocks);  in set_input_clock()
246 	switch (clock) {  in set_input_clock()
248 		chip->input_clock = ECHO_CLOCK_INTERNAL;  in set_input_clock()
249 		return set_sample_rate(chip, chip->sample_rate);  in set_input_clock()
251 		if (chip->digital_mode == DIGITAL_MODE_ADAT)  in set_input_clock()
252 			return -EAGAIN;  in set_input_clock()
260 		if (chip->digital_mode != DIGITAL_MODE_ADAT)  in set_input_clock()
261 			return -EAGAIN;  in set_input_clock()
273 		dev_err(chip->card->dev,  in set_input_clock()
274 			"Input clock 0x%x not supported for Gina24\n", clock);  in set_input_clock()
275 		return -EINVAL;  in set_input_clock()
278 	chip->input_clock = clock;  in set_input_clock()
284 static int dsp_set_digital_mode(struct echoaudio *chip, u8 mode)  in dsp_set_digital_mode()  argument
289 	/* Set clock to "internal" if it's not compatible with the new mode */  in dsp_set_digital_mode()
291 	switch (mode) {  in dsp_set_digital_mode()
295 		if (chip->input_clock == ECHO_CLOCK_ADAT)  in dsp_set_digital_mode()
299 		if (chip->input_clock == ECHO_CLOCK_SPDIF)  in dsp_set_digital_mode()
303 		dev_err(chip->card->dev,  in dsp_set_digital_mode()
304 			"Digital mode not supported: %d\n", mode);  in dsp_set_digital_mode()
305 		return -EINVAL;  in dsp_set_digital_mode()
308 	spin_lock_irq(&chip->lock);  in dsp_set_digital_mode()
311 		chip->sample_rate = 48000;  in dsp_set_digital_mode()
315 	/* Clear the current digital mode */  in dsp_set_digital_mode()
316 	control_reg = le32_to_cpu(chip->comm_page->control_register);  in dsp_set_digital_mode()
320 	switch (mode) {  in dsp_set_digital_mode()
325 		/* '361 Gina24 cards do not have the S/PDIF CD-ROM mode */  in dsp_set_digital_mode()
326 		if (chip->device_id == DEVICE_ID_56301)  in dsp_set_digital_mode()
339 	spin_unlock_irq(&chip->lock);  in dsp_set_digital_mode()
342 	chip->digital_mode = mode;  in dsp_set_digital_mode()
344 	dev_dbg(chip->card->dev,  in dsp_set_digital_mode()
345 		"set_digital_mode to %d\n", chip->digital_mode);  in dsp_set_digital_mode()