Lines Matching +full:2 +full:khz
34 * playback periods_min=2, periods_max=8
120 #define HCFG_PLAYBACK_ATTENUATION 0x00006000 /* Playback attenuation mask. 0 = 0dB, 1 = 6dB, 2 = 12…
124 #define HCFG_8_CHANNEL_PLAY 0x00000200 /* 1 = 8 channels, 0 = 2 channels per substream.*/
125 #define HCFG_8_CHANNEL_CAPTURE 0x00000100 /* 1 = 8 channels, 0 = 2 channels per substream.*/
137 /* Here pins 0,1,2,3,4,,6 are output. 5,7 are input */
144 * bit 12 0 = 48 Khz / 1 = 96 Khz Analog out on SB Live 24bit.
203 * Playback rate [23:16] (2 bits per channel) (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
208 * The jack has 4 poles. I will call 1 - Tip, 2 - Next to 1, 3 - Next to 2, 4 - Next to 3
209 * For Analogue: 1 -> Center Speaker, 2 -> Sub Woofer, 3 -> Ground, 4 -> Ground
210 * For Digital: 1 -> Front SPDIF, 2 -> Rear SPDIF, 3 -> Center/Subwoofer SPDIF, 4 -> Ground.
211 …* Standard 4 pole Video A/V cable with RCA outputs: 1 -> White, 2 -> Yellow, 3 -> Shield on all th…
219 /* A standard 2 pole mono mini-jack to RCA plug can be used for SPDIF Stereo PCM output from the Fr…
220 …* A standard 3 pole stereo mini-jack to 2 RCA plugs can be used for SPDIF AC3/DTS and Stereo PCM o…
224 #define SPCS2 0x43 /* SPDIF output Channel Status 2 register. For Center/LFE */
232 #define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
233 #define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
234 #define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
246 #define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
308 * When Channel = 2:
316 #define CAPTURE_SOURCE_CHANNEL2 0x00f00000 /* 1 - What you hear or . 2 - ?? */
319 …/* Record Map [7:0] (2 bits per channel) 0=mapped to channel 0, 1=mapped to channel 1, 2=mapped to…
322 * Record source select for channel 2 [26:24]
326 * 2 - SPDIF input.
336 #define ROUTING1_NULL 0x00770000 /* Channel_id 2 sends to 54, Channel_id 3 sends to …
338 #define ROUTING1_FRONT 0x00000077 /* Channel_id 2 to CENTER_LFE, Channel_id 3 to NULL. */
341 /* Host channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
343 * Host channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
353 /* SRC channel 0 [2:0] -> SPDIF Mixer/Router channel 0-7.
355 * SRC channel 2 [10:8] -> SPDIF Mixer/Router channel 0-7.
407 /* Estimated sample rate [19:0] Relative to 48kHz. 0x8000 = 1.0
416 * Sample output rate [1:0] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
417 * Sample input rate [3:2] (0=48kHz, 1=Not available, 2=96kHz, 3=192Khz)
419 * Record rate [9:8] (0=48kHz, 1=Not available, 2=96kHz, 3=192Khz)
421 * I2S input rate master mode [15:14] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
422 * I2S output rate [17:16] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
428 * SPDIF output rate [25:24] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
431 * Record Source 0 input [29:28] (0=SPDIF in, 1=I2S in, 2=AC97 Mic, 3=AC97 PCM)
432 * Record Source 1 input [31:30] (0=SPDIF in, 1=I2S in, 2=AC97 Mic, 3=AC97 PCM)
440 /* Sample rate output control register Channel=2
466 * Capture can only do 2 periods.
507 #define ADC_ALC_CTRL2 0x00000011 //ADC ALC Control 2
531 #define SET_CHANNEL 0 /* Testing channel outputs 0=Front, 1=Center/LFE, 2=Unknown, 3=Rear */
534 #define PCM_CENTER_LFE_CHANNEL 2
539 #define CONTROL_UNKNOWN_CHANNEL 2
560 #define SPI_PL_REG 2
563 #define SPI_PL_BIT_L_R (2<<5) /* left channel = right */
564 #define SPI_PL_BIT_L_C (3<<5) /* left channel = (L+R)/2 */
567 #define SPI_PL_BIT_R_R (2<<7) /* right channel = right */
568 #define SPI_PL_BIT_R_C (3<<7) /* right channel = (L+R)/2 */
569 #define SPI_IZD_REG 2
575 #define SPI_FMT_BIT_I2S (2<<0) /* I2S mode */
578 #define SPI_LRP_BIT (1<<2) /* invert LRCLK polarity */
584 #define SPI_IWL_BIT_24 (2<<4) /* 24-bit world length */
592 #define SPI_RATE_BIT_256 (2<<6)
605 #define SPI_DMUTE4_BIT (1<<2)
616 #define SPI_PDWN_REG 2 /* power down all DACs */
617 #define SPI_PDWN_BIT (1<<2)
623 #define SPI_DACD1_BIT (1<<2)
655 gpio_type = 2 -> shared side-out/line-in. */
687 u8 i2c_capture_volume[4][2];