Lines Matching +full:playback +full:- +full:dma
1 /* SPDX-License-Identifier: GPL-2.0 */
5 /* "PU" == "power-up value", as tested on PCI168 PCI rev. 10
15 * from 0x00 (playback codec), from 0x20 (recording codec)
27 * 0x0001 is the only bit that's able to start the DMA counter */
29 /* 0x0002 *temporarily* set during DMA stopping. hmm
30 * both 0x0002 and 0x0004 set in playback setup. */
52 /* start address of 1st DMA transfer area, PU:0x00000000 */
54 /* start address of 2nd DMA transfer area, PU:0x00000000 */
56 /* both lengths of DMA transfer areas, PU:0x00000000
59 #define IDX_IO_CODEC_DMA_CURRPOS 0x10 /* current DMA position, PU:0x00000000 */
60 /* offset within current DMA transfer area, PU:0x0000 */
85 …REQ_SUSPECTED_66200 0x06 | SOUNDFORMAT_XTAL2 /* 66200 (13240 * 5); 64000 may have been nicer :-\ */
111 #define IDX_IO_TIMER_VALUE 0x60 /* found this timer area by pure luck :-) */
122 /* some IRQ bit in here might also be used to signal a power-management timer
145 * And they change upon playback/stop, too:
146 * Writing a value to 0x68 will display this exact value during playback,
150 * in case playback is active? Or is this driver-induced?
154 * actually inhibits PCM playback!!! maybe power management??: */
162 /* bit 8; sure, this _pauses_ playback (later resumes at same spot!),
165 /* bit 9; sure, this _pauses_ playback (later resumes at same spot!),
168 /* BIT8 and BIT9 are _NOT_ able to affect OPL3 MIDI playback,
179 * --> FIFO/timing settings???) */
180 /* writing 0x0100 plus/or 0x0200 inhibits playback */
186 #define IDX_IO_6CH 0x6C /* unknown; fully read-writable */
253 * --> reserved bits? */
259 * 00 --> standard frequency
260 * 10 --> 1/2
261 * 01 --> 1/20
262 * 11 --> 1/200: */
285 * (especially since register 0x04 has a "non-empty" value 0xfe) */
328 …#define MIXER_ADVCTL2_LPBK 0x0080 /* Loopback mode -- Win driver: "WaveOut3DBypass"? mutes WaveOu…
329 #define MIXER_ADVCTL2_MS 0x0100 /* Mic Select 0=Mic1, 1=Mic2 -- Win driver: "ModemOutSelect"?? */