Lines Matching +full:system +full:- +full:clock +full:- +full:direction +full:- +full:out
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
16 #include <linux/blk-crypto-profile.h>
17 #include <linux/blk-mq.h>
19 #include <linux/fault-inject.h>
23 #include <linux/dma-direction.h>
68 * struct uic_command - UIC command structure
92 /* Host <-> Device UniPro Link state */
100 #define ufshcd_is_link_off(hba) ((hba)->uic_link_state == UIC_LINK_OFF_STATE)
101 #define ufshcd_is_link_active(hba) ((hba)->uic_link_state == \
103 #define ufshcd_is_link_hibern8(hba) ((hba)->uic_link_state == \
105 #define ufshcd_is_link_broken(hba) ((hba)->uic_link_state == \
107 #define ufshcd_set_link_off(hba) ((hba)->uic_link_state = UIC_LINK_OFF_STATE)
108 #define ufshcd_set_link_active(hba) ((hba)->uic_link_state = \
110 #define ufshcd_set_link_hibern8(hba) ((hba)->uic_link_state = \
112 #define ufshcd_set_link_broken(hba) ((hba)->uic_link_state = \
116 ((h)->curr_dev_pwr_mode = UFS_ACTIVE_PWR_MODE)
118 ((h)->curr_dev_pwr_mode = UFS_SLEEP_PWR_MODE)
120 ((h)->curr_dev_pwr_mode = UFS_POWERDOWN_PWR_MODE)
122 ((h)->curr_dev_pwr_mode = UFS_DEEPSLEEP_PWR_MODE)
124 ((h)->curr_dev_pwr_mode == UFS_ACTIVE_PWR_MODE)
126 ((h)->curr_dev_pwr_mode == UFS_SLEEP_PWR_MODE)
128 ((h)->curr_dev_pwr_mode == UFS_POWERDOWN_PWR_MODE)
130 ((h)->curr_dev_pwr_mode == UFS_DEEPSLEEP_PWR_MODE)
155 * struct ufshcd_lrb - local reference block
174 * @crypto_key_slot: the key slot to use for inline crypto (-1 if none)
194 u8 lun; /* UPIU LUN id field is only 8-bit wide */
209 * struct ufs_query_req - parameters for building a query request
219 * struct ufs_query_resp - UPIU QUERY
228 * struct ufs_query - holds relevant data structures for query request
240 * struct ufs_dev_cmd - all assosiated fields with device management commands
241 * @type: device management command type - Query, NOP OUT
254 * struct ufs_clk_info - UFS clock related info
255 * @list: list headed by hba->clk_list_head
256 * @clk: clock node
257 * @name: clock name
258 * @max_freq: maximum frequency supported by the clock
259 * @min_freq: min frequency that can be used for clock scaling
297 * struct ufs_hba_variant_ops - variant specific callbacks
308 * variant specific Uni-Pro initialization.
309 * @link_startup_notify: called before and after Link startup is carried out
310 * to allow variant specific Uni-Pro initialization.
312 * is carried out to allow vendor spesific capabilities
328 * @config_scaling_param: called to configure clock scaling parameters
329 * @fill_crypto_prdt: initialize crypto-related fields in the PRDT
389 /* clock gating state */
398 * struct ufs_clk_gating - UFS clock gating related info
403 * @clk_gating_workq: workqueue for clock gating work.
411 * @enable_attr: sysfs attribute to enable/disable clock gating
412 * @is_enabled: Indicates the current status of clock gating
413 * @is_initialized: Indicates whether clock gating is initialized or not
435 * struct ufs_clk_scaling - UFS clock scaling related data
441 * devfreq ->target() function is called then schedule "suspend_work" to
446 * @enable_attr: sysfs attribute to enable/disable clock scaling
454 * clock scaling which is not invoked from devfreq governor
455 * @is_initialized: Indicates whether clock scaling is initialized or not
484 * struct ufs_event_hist - keeps history of errors
498 * struct ufs_stats - keeps usage/err statistics
502 * reset this after link-startup.
517 * enum ufshcd_state - UFS host controller state
609 * auto-hibernate capability but it doesn't work.
638 * auto-hibernate capability but it's FASTAUTO only.
715 * This capability allows the device auto-bkops to be always enabled
731 * This capability allows the host controller driver to turn-on
745 * lpm mode aggressively during clock gating.
753 * support device hardware reset via the hba->device_reset() callback,
765 * Enable WriteBooster when scaling up the clock and disable
766 * WriteBooster when scaling the clock down.
798 * struct ufshcd_res_info_t - MCQ related resource regions
822 * struct ufshcd_mcq_opr_info_t - Operation and Runtime registers
843 * struct ufs_hba - per adapter private structure
858 * @spm_lvl: desired UFS power management level during system PM.
860 * @ahit: value of Auto-Hibernate Idle Timer register.
868 * @nortt - Max outstanding RTTs supported by controller
878 * @dev_ref_clk_freq: reference clock frequency
911 * @nop_out_timeout: NOP OUT timeout value
918 * @lanes_per_direction: number of lanes per data direction between the UFS
922 * @clk_gating: information related to clock gating
926 * @system_suspending: system suspend has been started and system resume has
928 * @is_sys_suspended: UFS device has been suspended because of system suspend
933 * @clk_scaling_lock: used to serialize device commands and clock scaling
991 /* Desired UFS power management level during system PM */
995 /* Auto-Hibernate Idle Timer register value */
1136 * struct ufs_hw_queue - per hardware queue structure
1180 return hba->mcq_opr[opr].offset + hba->mcq_opr[opr].stride * idx; in ufshcd_mcq_opr_offset()
1191 return hba->sg_entry_size; in ufshcd_sg_entry_size()
1197 hba->sg_entry_size = sg_entry_size; in ufshcd_set_sg_entry_size()
1225 return hba->caps & UFSHCD_CAP_CLK_GATING; in ufshcd_is_clkgating_allowed()
1229 return hba->caps & UFSHCD_CAP_HIBERN8_WITH_CLK_GATING; in ufshcd_can_hibern8_during_gating()
1233 return hba->caps & UFSHCD_CAP_CLK_SCALING; in ufshcd_is_clkscaling_supported()
1237 return hba->caps & UFSHCD_CAP_AUTO_BKOPS_SUSPEND; in ufshcd_can_autobkops_during_suspend()
1241 return hba->caps & UFSHCD_CAP_RPM_AUTOSUSPEND; in ufshcd_is_rpm_autosuspend_allowed()
1246 return (hba->caps & UFSHCD_CAP_INTR_AGGR) && in ufshcd_is_intr_aggr_allowed()
1247 !(hba->quirks & UFSHCD_QUIRK_BROKEN_INTR_AGGR); in ufshcd_is_intr_aggr_allowed()
1253 (hba->caps & UFSHCD_CAP_AGGR_POWER_COLLAPSE)); in ufshcd_can_aggressive_pc()
1258 return (hba->capabilities & MASK_AUTO_HIBERN8_SUPPORT) && in ufshcd_is_auto_hibern8_supported()
1259 !(hba->quirks & UFSHCD_QUIRK_BROKEN_AUTO_HIBERN8); in ufshcd_is_auto_hibern8_supported()
1264 return FIELD_GET(UFSHCI_AHIBERN8_TIMER_MASK, hba->ahit); in ufshcd_is_auto_hibern8_enabled()
1269 return hba->caps & UFSHCD_CAP_WB_EN; in ufshcd_is_wb_allowed()
1274 return hba->caps & UFSHCD_CAP_WB_WITH_CLK_SCALING; in ufshcd_enable_wb_if_scaling_up()
1278 writel((val), (hba)->mcq_base + (reg))
1280 readl((hba)->mcq_base + (reg))
1283 writel_relaxed((val), (hba)->mcq_base + (reg))
1285 readl_relaxed((hba)->mcq_base + (reg))
1288 writel((val), (hba)->mmio_base + (reg))
1290 readl((hba)->mmio_base + (reg))
1293 * ufshcd_rmwl - perform read/modify/write for a controller register
1339 * ufshcd_set_variant - set variant specific data to the hba
1346 hba->priv = variant; in ufshcd_set_variant()
1350 * ufshcd_get_variant - get variant specific data from the hba
1356 return hba->priv; in ufshcd_get_variant()
1430 return (pwr_info->pwr_rx == FAST_MODE || in ufshcd_is_hs_mode()
1431 pwr_info->pwr_rx == FASTAUTO_MODE) && in ufshcd_is_hs_mode()
1432 (pwr_info->pwr_tx == FAST_MODE || in ufshcd_is_hs_mode()
1433 pwr_info->pwr_tx == FASTAUTO_MODE); in ufshcd_is_hs_mode()
1474 if (hba->vops && hba->vops->init) in ufshcd_vops_init()
1475 return hba->vops->init(hba); in ufshcd_vops_init()
1482 if (hba->vops && hba->vops->phy_initialization) in ufshcd_vops_phy_initialization()
1483 return hba->vops->phy_initialization(hba); in ufshcd_vops_phy_initialization()